JPH0378850A - Data processor - Google Patents

Abstract

PURPOSE:To discriminate a data error due to a fault of a transfer control system from that of a data bus system by adding the serial number at the data input side and checking these number at the data output side. CONSTITUTION:A write of data a higher rank side serial number adding circuit 6 adds a serial number for each byte of the data 100 received from a host device 1. A device interface 5 writes the data 120 excluding the serial numbers included in the data 110 to a device 3 and at the same time checks the serial numbers added to the data 110 via a device side serial number detecting circuit 9. At read 110 via a device side serial number adding circuit 8 adds the serial numbers for each byte of the data 120 read out of the device 3. A host interface 4 transfers the data 100 to the device 1 excluding the serial numbers included in the data 120. At the same time, an upper rank side serial number detecting circuit 7 checks the serial numbers. Thus the occurrence of data errors can be discriminated between a data bus system and a transfer control system.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a data processing device, and more particularly to a data processing device having a function of checking the validity of written or read data.

(Prior Art) Conventionally, this type of data processing device checks the validity of data by generating and comparing LRC (a type of check code) for the data in the block in an upper interface section and a device interface section for each data block. was checking.

(Problem to be Solved by the Invention) The conventional data processing device described above has
The validity of the data is checked by comparing the data, but it is possible to check whether a data error occurred in the data bus system on the data transfer path, or if there is a data transfer error such as ``data dropout'' or ``data leakage''. The drawback is that it is not possible to distinguish whether the problem occurred in the control system or not.

SUMMARY OF THE INVENTION In view of the problems of the conventional device described above, an object of the present invention is to provide a data processing device that can distinguish whether a data error occurs in the data bus system or the transfer control system.

(Means for Solving the Problems) The present invention has the following means configuration to achieve the above object.

That is, the data processing apparatus of the present invention is a data processing apparatus having an upper level interface that controls data transfer with a higher level apparatus, and a device interface that controls data transfer with a device; an upper serial number adding circuit that adds a serial number to each byte or word of write data transferred from the device interface; a device-side serial number detection circuit that checks the number and indicates the number of bytes or words in which the discrepancy occurs and an error; and a device that adds a serial number to each byte or word of data read from the device within the device interface. and a side serial number addition circuit; an upper side serial number that checks the serial number added to the read data by the device side serial number addition circuit within the upper interface and displays the number and error of the byte or word where a mismatch has occurred; a detection circuit;
It is characterized by having the following.

(Example) Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention together with a host device 1 and a device 3. As shown in FIG. The data processing device 2 of the embodiment writes data transferred from the host device 1 to the device 3, or transfers data read from the device 3 to the host device 1.

The data processing device 2 has a high-level interface 4 that transfers data with the high-level device 1, a device interface 5 that transfers data with the device 3, and a byte or word of data transferred from the high-level device 1 into the high-level interface 4. an upper serial number addition circuit 6 that adds a serial number to each block; an upper serial number detection circuit 7 that checks the serial number added when transferring data read from the device 3 to the upper device 1; upper side LRC generation circuit 1 that generates LRC for data of
0, a device-side serial number addition circuit 8 that adds a serial number to each byte or word of data read from the device 3 in the device interface 5, and a device that checks the serial number added to the data written to the device 3. a side serial number detection circuit 9 and a device side LRC generation circuit 11 that generates an LRC for each block when writing and reading data to and from the device 3.
and an LRC comparison circuit 12 that compares the LRCs generated by the upper-side LRC generation circuit 10 and the device-side LRC generation circuit 11.

Here, since data checking by LRC is a well-known technique, its explanation will be omitted.

First, data writing will be explained. In the upper level interface 4, the upper side serial number adding circuit 6 outputs data 110 in which a serial number is added to each byte or word of the data 100 transferred from the higher level device 1. The device interface 5 is the data with the serial number added + data 1 excluding the serial number.
20 is written to the device 3, and the serial number added to the data 110 is checked by the device side serial number detection circuit 9. When the device side serial number detection circuit 9 detects a discrepancy between the expected serial number value and the start value of the upper side serial number addition circuit 6 at the time of startup, an error is displayed and the number of data at which the occurrence occurred is displayed. .

Next, reading data will be explained. In the device interface 5, the device side serial number adding circuit 8 adds a serial number to each byte or word of the data 120 read from the device 3.
Outputs 0. The host interface 4 transfers the data 100 excluding the serial number from the data 110 to which the serial number has been added to the host device 1, and the host side serial number detection circuit 7 checks the serial number added to the data 110. . When the upper serial number detection circuit 7 detects a discrepancy between the expected serial number value and the serial number addition circuit 8 on the device side at the time of startup, an error is displayed and the number of data at which the occurrence occurs is displayed. .

(Effects of the Invention) As explained above, the data processing device of the present invention adds a serial number on the data input side and checks the serial number on the output side, thereby preventing "data omission" and "data leakage". This has the advantage that data errors caused by failures in the transfer control system, such as "", can be distinguished from data errors occurring in the data bus system.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention together with host equipment and devices. 1... Upper device, 2... Data processing device, 3... Device, 4... Upper interface, 5... Device interface, 6...Upper side serial number addition circuit,
7...Upper side serial number detection circuit, 8...
...Device side serial number addition circuit, 9...
...Device side serial number detection circuit, 10...
... Upper side LRC generation circuit, 11 ... Device side LRC generation circuit, 12 ... LRC comparison circuit.

Claims (1)

[Claims] In a data processing device having a higher-level interface that controls data transfer with a higher-level device and a device interface that controls data transfer with a device; an upper-side serial number addition circuit that adds a serial number to a serial number; checks the serial number added to each byte or word of write data by the upper-side serial number addition circuit within the device interface, and identifies bytes or words in which a mismatch has occurred; a device-side serial number detection circuit that displays a word number and an error; a device-side serial number addition circuit that adds a serial number to each byte or word of data read from the device within the device interface;
and an upper-side serial number detection circuit that checks the serial number added to the read data by the device-side serial number addition circuit in the upper-layer interface and displays the number of byte or word in which a mismatch has occurred and an error. A data processing device characterized by: