JPH0376637B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a two-screen television receiver that displays images of other channels, VTR images, or video camera images as a sub-screen on a part of the main screen. .

BACKGROUND OF THE INVENTION In recent years, in order to make effective use of television receivers, so-called small screen display television receivers have been put on the market, which display a reduced image on a portion of the original television image. (Nikkei Electronics
April 14, 1980, pp. 57-67, etc.).

The concept of the video signal sampling method for displaying this small screen will be briefly described below with reference to FIGS. 4 and 5. FIG. 4 is a circuit diagram of the video signal sampling circuit, and FIG. 5 is a timing chart of each part in FIG. 4.

To reduce the sub screen to 1/3 of the original screen in the vertical direction,
Select one of the three horizontal scanning lines and use it as the horizontal scanning line of the sub-screen. In FIG. 4, the horizontal synchronizing signal 30 is passed through the frequency divider circuit 29 for one horizontal scanning period of the three horizontal scanning lines (here, H in FIG.
The gate circuit 26 outputs the clock 27 only during the period in which the control signal 28 is at the high level to serve as the sampling clock 24, and the input signal 22 is input to the A/D.
Digital data 25 is obtained by sampling by a converter 23.

Problems to be Solved by the Invention However, in this method, one of the three horizontal scanning lines is selected and this is used as the horizontal scanning line of the sub-screen. 2
If the book has video information, 1 of the child screen
This causes the inconvenience that information for horizontal scanning lines is lost.

Means for Solving the Problems In the two-screen television receiver of the present invention, each horizontal scanning period of the sub-screen is By obtaining the luminance signal and color difference signal for the scanning period, information for three horizontal scanning lines of the original screen of the child screen is included, thereby reducing missing information.

Function In the two-screen television receiver of the present invention, each of the luminance signals and color difference signals of the three horizontal scanning periods is weighted in the order of the scanning lines, and the sampling data of the first horizontal scanning period of the three is weighted. The sampling data is stored in the storage element in the sampling order, and the sampling data of the second horizontal scanning period and the data of the first horizontal scanning period stored in the storage element are sequentially added, and the addition result is stored in the storage element again. , by adding the sampling data of the third horizontal scanning period and the data stored in the storage element, and returning the addition result to the original amplitude level, each level of the luminance signal and color difference signal of the original screen is adjusted. and the level after sampling.

Embodiment A two-screen television receiver according to an embodiment of the present invention will be described below with reference to the drawings. Note that since luminance signal sampling and color difference signal sampling are basically the same method, luminance signal sampling will be described first.

FIG. 1 is a circuit diagram of a luminance signal sampling circuit of the present invention, and FIG. 2 is a timing chart of each part in FIG.

In FIG. 1, the horizontal synchronizing signal 21 is frequency-divided by the 3 frequency divider circuit 20, and during the horizontal scanning period, the selector control signal 15 is at a high level, and the frequency is (3n-1).
Bit shift control signal 6 is at high level during the horizontal scanning period, and data output control signal 1 is at high level during the (3n) horizontal scanning period.
A three-phase control signal is obtained in which each signal has a high level. Here, n is the horizontal scanning line number of the child screen. These control signals are each sent to a selector circuit 14.
a, bit shift circuit 5a, data output gate 1
7a as a control signal.

The luminance input signal 1a is converted into digital data 4a to 4a by the sampling clock 3a at the A/D converter 2a.
4e. (3n-2) During the horizontal scanning period, the bit shift control signal 6 is at a low level, and the data outputs 7b to 7f of the bit shift circuit 5a are
(7a is a low level) is applied to the A input side of the adder circuit 8a. At this time, the selector control signal 15 is at a high level, and the B-side input signals 13a to 13g (low level) of the selector circuit 14a become the output signals 16a to 16g of the selector circuit 14a and are added to the B-side input of the adder circuit 8a. The addition result is stored in the N-stage shift register 10a at the timing of the shift clock 11a.

Next, in the (3n-1) horizontal scanning period, the bit shift control signal 6 is at a high level, the digital data 4a to 4e are shifted upward by one bit, and the data output signal 7a of the bit shift circuit 5a is
~7e (7f is a low level) is applied to the A input side of the adder circuit 8a. During this time, the selector control signal 15
is at a low level, and in the selector circuit 14a, the output signals 12a to 12a of the N-stage shift register 10a are
12g is selected and added as the B input signal 13 of the adder circuit 8a, and the addition result is stored again in the N-stage shift register 10a.

Furthermore, in the (3n) horizontal scanning period, the bit shift control signal 6 is at a low level and the selector control signal 15 is also at a low level, so the output signals 7b to 7f (7a is at a low level) of the bit shift circuit 5a are transferred to the adder circuit 8a. The output signals 12a to 12g of the N-stage shift register 10a are added to the B input side of the adder circuit 8a. Further, only during this (3n) horizontal scanning period, the data output control signal 18 becomes high level, and the addition result is output from the data output gate 17a.

In this way, since the sampling data of three horizontal scanning line periods are added with weighting of 1:2:1, the addition result is digitally amplified by four times the luminance signal input 1a, and in the embodiment, it is amplified by 5 bits. The sampling data becomes 7 bits. Therefore, the data output gate 17a extracts the upper 5 bits as the data output signals 19a to 19e and outputs the addition result as 1/4.
I'm trying to double it to match the level. In addition,
The number of stages of the N-stage shift register 10a is the same as the number of samplings N in one horizontal scanning period.

FIG. 3 shows an overall block diagram including the color difference signal sampling section. The sampling method for the chrominance input signal is the same as the sampling method for the luminance signal, but since the number of samplings per horizontal scanning period is M, the N-stage shift register 10a used in the luminance signal sampling is replaced by the sampling circuit for the chrominance signal. M-stage shift registers 10b, 10
Let it be c. In this example, the ratio of N to M is selected to be 4 to 1. For this reason, the shift clock 11b is set to 4 in 11a.
Use a clock with twice the frequency.

Effects of the Invention As described above, according to the two-screen television receiver of the present invention, by correlating the luminance signals and color difference signals of the three horizontal scanning periods, the original screen of the sub-screen can be Even if it is reduced to 1/3 in the vertical direction, it is possible to reduce the loss of luminance information and color difference signals, which is extremely advantageous in practice for improving the image quality of the sub-screen.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a luminance signal sampling portion of a two-screen television receiver according to an embodiment of the present invention, FIG. 2 is a timing chart of each part thereof, and FIG. 3 is a block diagram including color difference signal sampling. FIG. 4 is a circuit diagram of a conventional video signal sampling circuit, and FIG. 5 is a timing chart of each part thereof. 1... Luminance input signal, 2a... A/D converter,
3... Sampling clock, 4... Digital data, 5a... Bit shift circuit, 6... Bit shift control signal, 7... Data output signal of bit shift circuit, 8a... Addition circuit, 9a... Addition output signal, 10a ...Shift register, 11...Shift clock, 12...Output signal of shift register, 13...B side input signal of selector circuit, 14
a... Selector circuit, 15... Selector control signal, 16... Output signal of selector circuit, 17a...
...Data output gate, 18...Data output control signal, 19...Data output signal, 20...3 frequency divider circuit, 21...Horizontal synchronization signal.

Claims (1)

[Claims] 1. Weighting the luminance signal and color difference signal of the television signal for three horizontal scanning periods to be displayed on the child screen into the luminance signal and color difference signal of each of the first, second, and third horizontal scanning periods. By performing and adding the luminance signals and color difference signals of three horizontal scanning periods, a correlated luminance signal and a color difference signal are obtained, and a sub screen is displayed using the luminance signal and color difference signal as a result of the addition. A two-screen television receiver. 2. Storage means for temporarily storing sampling data obtained by sampling the luminance signal and the color difference signal converted into digital signals by the A/D converter N times and the color difference signal M times in one horizontal scanning period;
(3n-2) means for storing sampling data of the original screen horizontal scanning period of the (3n-1)th child screen in the sampling order in the original screen horizontal scanning period of the (3n-1)th child screen; means for doubling the sampling data during the original screen horizontal scanning period;
means for adding the doubled data and the data stored in the storage means in the sampling order and storing the same in the storage means; and sampling data for the original screen horizontal scanning period of the 3nth child screen and storage in the storage means. and means to multiply the added data by 1/4, and add the data correlated with the three horizontal scanning periods of the original screen of the sub-screen to the reduced luminance signal and color difference of the sub-screen. A two-screen television receiver according to claim 1, characterized in that the signal is a signal.