JPH0373615A - A/d conversion circuit - Google Patents

Abstract

PURPOSE:To decrease the time required for A/D conversion and to speed up the A/D conversion by adding an adder/subtractor, an input terminal and plural switches to a conventional A/D conversion circuit, and controlling the switch so that a difference between the input and a reference voltage is charged, and also discharged. CONSTITUTION:When an input voltage is larger than a reference voltage, switches 9, 10, 13 are turned on and switches 8, 11, 12 are turned off to discharge. When the output of an amplifier 1 crosses a GND level, it is judged by a comparator 2, resulting that a counter 6 is stopped. On the other hard, the most significant bit is '1' when the input voltage is larger than the reference voltage and '0' when the input voltage is smaller than the reverence voltage. When the input voltage is smaller than the reference voltage, the switches 8, 11, 13 are turned on and the switches 9, 10, 12 are turned off, and A/D conversion is similarly applied. Thus, the conversion speed is twice that of a conventional A/D converter, and the resistance and capacitance are reduced in value.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an A/D conversion circuit, and particularly to an integral type A/D conversion circuit in an LSI.

[Conventional technology]

Conventionally, such an integrating type A/D conversion circuit is composed of an amplifier, a humpator, and the like.

FIG. 4 is a diagram of an integral type A/D conversion circuit showing an example of such a conventional method.

As shown in Figure 4, the conventional integral type A/D conversion circuit is
Amplifier (AMP)1. Hmph; Crater 2° Resistor 3. Capacity 4. A switch 12 connected to the control circuit 5, the counter 6, and the input terminal and reference voltage terminal, respectively.
and 8. In particular, switches 8, 1
2 is controlled to turn on and off by a control circuit 5 that operates based on the output of the comparator 2, the clock, and the signal from the counter 6.

FIG. 5 is an explanatory diagram of the operation of the conversion circuit in FIG. 4.

As shown in FIG. 5, here, the clock period T, A
This shows the operation when the output of the /D converter circuit is set to 2 (k: integer).

First, switch 8 is turned off, switch 12 is turned on, and integration (charging) is performed according to the input until the counter 6 counts N (±2k). Next, the switch 8 is turned ON and the switch 12 is turned OFF to discharge the voltage stored in the capacitor 4 using the reference voltage, and the output of the amplifier 1 becomes G.
The comparator 2 determines when the ND potential is crossed.

Next, based on the output of the comparator 2, the control circuit 5 controls the switches 8 and 12 and stops the counter 6 from counting. In this way, n (n: integer) counted from the start of discharge until the counter 6 is stopped is A
/D conversion circuit output.

[Problem to be solved by the invention]

In the conventional integral type A/D conversion circuit described above, when k-bit output is required, an A/D conversion time of at least (2 x 2) x (clock period) is required, and the conversion speed is low. The disadvantage is that it is slow.

This slow conversion speed also has the disadvantage of requiring larger values of capacitance and resistance to obtain the required accuracy.

An object of the present invention is to provide an A/D conversion circuit that achieves high-speed A/D conversion and reduces resistance and capacitance.

[Means to solve the problem]

The A/D conversion circuit of the present invention includes a first switch having one end connected to an input terminal, and a second switch having one end connected to GND and the other end connected to the other end of the first switch. a third and a fourth switch each having one end connected to a reference voltage terminal; and an input side connected to the other end of the third switch directly or through another switch means, and the first switch The adder/subtracter integrates the difference between the input obtained through the reference voltage and the reference voltage; a resistor has one end connected to the output of the adder/subtracter; a (-) input terminal is connected to the other end of the resistor; +) An amplifier whose input terminal is connected to GND, and an amplifier whose (-) input terminal is connected to GND.
) a capacitor whose one end is connected to the input terminal and the output side, and a comparator whose (-) input terminal is connected to the output of the amplifier and whose (+) input terminal is connected to GND;
a counter whose output terminal is connected to the output of the A/D conversion;
and a control circuit that controls the counter.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is an A/D conversion circuit diagram showing a first embodiment of the present invention.

As shown in FIG. 1, this embodiment includes a switch 12 with one end connected to an input terminal, a switch 13 with one end connected to GND and the other end connected to the other end of the switch 12, and a switch 12 with one end connected to the input terminal. Switches 10.11 each have one end connected to the connection point 12.13, switches 8 and 9 each have one end connected to the reference voltage terminal, and switches 8 and 1.
(+) input terminals are connected to the other end of 0, and switch 9
an adder/subtractor 7 having (-) input terminals connected to the other end of the adder/subtractor 7; a resistor 3 having one end connected to the output of the adder/subtractor 7;
(-) input terminals are connected to the other end of the resistor 3, and (+)
An amplifier 1 whose input terminals are connected to GND, a capacitor 4 whose one end is connected to the (-) input terminals and output side of the amplifier 1, and a (-) input terminal connected to the output of the amplifier 1. A comparator (COMP) 2 which is connected and has (+) input terminals connected to GND, a counter 6 whose output side is connected to the output terminal of the A/D conversion, and signals from the clock, the output of the comparator 2, and the counter. It has a control circuit 5 that controls the switches 8 to 13 and the counter 6 based on the following.

FIG. 2 is an explanatory diagram of the operation of the conversion circuit in FIG. 1.

As shown in Figure 2, the operation is shown when the ripple cycle is T and the output of the A/D conversion circuit is set to (k: integer), and the amplifier output characteristic 14 shows that the input voltage is the reference voltage. , and the output characteristic 15 is the opposite case. In addition, when M=2, -10≦m≦M.

The operation of the A/D conversion circuit will be described below with reference to FIGS. 1 and 2.

First, turn on switches 8, 11 and 12, switch 9, 1
0 and 13 are turned off, counter 6 becomes M (= 2
'-') It is integrated according to the output voltage of the adder/subtractor 7, that is, (reference voltage - input terminal) until it counts. Note that the reference voltage is 1/2 of the maximum input voltage. When the input voltage is higher than the reference voltage, the switches 9, 10, 13 are turned on, and the switches 8, 11, .
12 is turned off to discharge, and the output of amplifier l becomes GN.
Determine when the D potential is crossed by the Hump Palator 2,
As a result, the counter 6 is stopped. The value m (m: integer 0≦m≦M) counted by the counter 6 from the start of this discharge until the counter 6 stops is the lower bit of A/D conversion) [(k-1) bits] become. on the other hand,
- The most significant bit is determined to be 1 when it is large and O when it is small, depending on the magnitude relationship between the input voltage and the reference voltage.

Next, when the input voltage is lower than the reference voltage -, switches 8, 11.13 are turned on, switches 9, 10 .
12 is turned off, and A/D conversion is performed in the same manner.

According to the above-described embodiment, the conversion speed is twice that of the conventional method, and the values of resistance and capacitance can be reduced.

FIG. 3 is an A/D conversion circuit diagram showing a second embodiment of the present invention.

As shown in FIG. 3, this embodiment is the same as the first embodiment described above, except that the configuration of the switch section that switches between the input voltage and the reference voltage and performs charging and discharging, and the configuration of the adder/subtractor 7 are different. It is.

That is, the A/D conversion circuit of this embodiment includes an amplifier 1, a comparator 2. Resistance 3. Capacity 4. Control circuit 5, counter 6
In addition to switches 8, 9, 12° 13 and 18.19
and a capacitor 17. In particular, by configuring the adder/subtracter 7 by arranging the amplifier 16 and the capacitor 17,
Even in MO8LSI, A/D conversion with high conversion speed is possible by adding a small amount of circuitry.

〔Effect of the invention〕

As explained above, the A/D conversion circuit of the present invention is connected to a conventional A/D conversion circuit consisting of an amplifier, a comparator, a resistor, a capacitor, a control circuit, and a counter, an adder/subtractor, an input terminal, and a reference voltage terminal. While integrating (charging) the difference between the input and the reference voltage (172 of the maximum A/D conversion input voltage),
By controlling the switch so that it can be discharged by the reference voltage, the time required for A/D conversion is reduced compared to the conventional one.
/2, which has the effect of speeding up A/D conversion. Furthermore, by shortening the conversion time, the resistance and capacitance required to obtain the same accuracy can be made smaller than before.

[Brief explanation of drawings]

FIG. 1 is an A/D conversion circuit diagram showing a first embodiment of the present invention, FIG. 2 is an explanatory diagram of the operation of the conversion circuit in FIG. 1, and FIG.
The figure is an A/D conversion circuit diagram showing a second embodiment of the present invention, FIG. 4 is an integral type A/D conversion circuit diagram showing a conventional example, and FIG.
This figure is an explanatory diagram of the operation of the conversion circuit in FIG. 4. 1, IB... Increase IW, (AMp), 2...
... Comparator (COMF), 3... Resistor,
4, 17... Capacity, 5... Control circuit,
6... Counter, 7... Addition/subtraction device, 8
~13,18,19... Switch.

Claims (1)

[Claims] A first switch with one end connected to the input terminal, and a GND
a second switch having one end connected to the first switch and the other end connected to the other end of the first switch; third and fourth switches each having one end connected to a reference voltage terminal; the adder/subtractor whose input side is connected directly or through another switch means to the other end of the switch, and which integrates the difference between the input obtained via the first switch and the reference voltage; and the output of the adder/subtractor. an amplifier having a (-) input terminal connected to the other end of the resistor and a (+) input terminal connected to GND; One end of each capacitor is connected to the output of the amplifier (−
) a comparator whose input terminal is connected and whose (+) input terminal is connected to GND; a counter whose output terminal is connected to the output of the A/D conversion; and a clock, the output of the comparator, and the signal from the counter. An A/D conversion circuit comprising: a control circuit that controls the first to fourth switches and the counter based on the above-mentioned signals.