JPH0358614A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent an erroneous signal from being outputted from an integration circuit when a power voltage is fluctuated by providing a power voltage detection circuit and a control circuit controlling the output of the integration circuit with the output of the power voltage detection circuit. CONSTITUTION:When power fluctuation takes place due to a heavy load or external noise, a pulse signal is outputted from an output terminal out of an integration circuit 5 similarly at the time of turning on a power supply. When a range of power fluctuation is over a detection voltage of a power voltage detection circuit 2, an H level (high level) is outputted at the output terminal out of the power voltage detection circuit 2. When the signal is inputted to an input terminal (c) of a control circuit 6, since the control circuit 6 inhibits the output of the signal at an input terminal (d) to the output terminal out, no pulse signal is outputted from the output terminal out of the control circuit 6. Thus, the effect onto other circuit is evaded and stable circuit operation is warranted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application in Industry] The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which an integrating circuit composed of a capacitor and a resistor is connected between power supplies.

[Conventional technology]

Conventionally, this type of semiconductor device uses a complementary MO
Connected to an inverter composed of SFETs, and a pulse of H level (high potential level) for a period of time from when the power is turned on until the charging voltage to the capacitor of the integrator circuit reaches the logic threshold voltage level of the inverter, It is generated from the output of an inverter made up of the complementary MOSFETs.

[Problem to be solved by the invention]

The conventional semiconductor device described above uses a pulse output from an integrating circuit to change the circuit state of a flip-flop circuit, etc. to L level (low potential level) or H level (low potential level) immediately after power is turned on.
It is used as an initialization signal to initialize to a high potential level. However, if the level of the power supply voltage fluctuates due to a heavy load or external noise, this fluctuation is considered to be an operation immediately after the power is turned on, and an incorrect signal is output from the integrator circuit, causing the flip-flop circuit etc. to initialize. There is a drawback that it can be done.

SUMMARY OF THE INVENTION In order to solve the above-mentioned drawbacks, an object of the present invention is to prevent fluctuations in power supply voltage from affecting flip-flop circuits, etc. even when unnecessary pulses are generated from the pulse generation circuit due to fluctuations in power supply voltage. An object of the present invention is to provide a semiconductor device in which generated pulses are controlled.

[Means to solve the problem]

The semiconductor device of the present invention has a configuration including an integrating circuit composed of a capacitor and a resistor, a power supply voltage detection circuit that detects whether a power supply voltage is higher than a certain voltage, and an output of the integrating circuit that detects the power supply voltage. The present invention is characterized by comprising a control circuit that performs control based on the output of the circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings. FIG. 1 is a circuit diagram showing a semiconductor device according to an embodiment of the present invention.

In FIG. 1, in this embodiment, the positive side of a battery power supply 1 is connected to the a input terminal of a power supply voltage detection circuit 2 and one end of a resistor 4. The negative side of the battery power supply 1 is connected to the b input terminal of the power supply voltage detection circuit 2 and one end of the capacitor 3. The other end of the resistor 4 and the other end of the capacitor 3 are connected. capacitance 3 and resistance 4
are connected in series as an integrating circuit 5, and this integrating circuit 5 has one end of the resistor 4 and one end of the capacitor 3 as input terminals, and the other end of the resistor 4 and the other end of the capacitor 3 are connected. The connection point located there is defined as the output terminal OUT of the integrating circuit 5.

The output terminal out of the power supply voltage detection circuit 2 is connected to the input terminal C of the control circuit 6, and the output terminal out of the integrating circuit 5 is connected to the input terminal d of the control circuit 6. The output terminal OUT of the control circuit 6 is assumed to be the output of the semiconductor device.

Next, the operation of this embodiment will be explained. First, when the power is turned on, a pulse signal is output from the output terminal OUT of the integrating circuit 5. Immediately after the power is turned on, the power supply voltage is lower than the detection voltage of the power supply voltage detection circuit 2, so the power supply voltage detection circuit 2
For example, an L level (low potential level) is output to the output terminal OUT.

From the output terminal out of the power supply voltage detection circuit 2, the L level (
When the low potential level) is input to the control circuit 6, the signal at the input terminal d, that is, the output pulse signal of the integrating circuit 5, is output to the output terminal OUT of the control circuit 6.

Next, if there is a power fluctuation due to a heavy load or external noise while the power is turned on, a pulse signal is output from the output terminal OUT of the integrating circuit 5 in the same way as when the power is turned on. However, if the range of power supply fluctuation is equal to or higher than the detection voltage of the power supply voltage detection circuit 2, an H level (high potential level) is output to the output of the power supply voltage detection circuit 2. This signal is transmitted to the control circuit 60
When the pulse signal is input to the input terminal C, the control circuit 6 prohibits outputting the signal of the input terminal d to the output terminal out, so that no pulse signal is output to the output terminal out of the control circuit 6.

〔Effect of the invention〕

As explained above, in the present invention, an integrating circuit composed of a capacitance and a resistor is connected between power supplies, and the output of the integrating circuit is controlled by the output of the power supply voltage detection circuit. Detects the level of fluctuation in the voltage of the battery power supply due to noise, outputs a control signal from the power supply voltage detection circuit, invalidates the signal generated by the integration circuit due to fluctuations in the power supply, and is particularly effective in flip-flop circuits. This has the effect of eliminating the influence on other circuits, such as this, and allowing it to be built into an integrated circuit with a heavy load on the power supply, ensuring stable circuit operation.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a semiconductor device according to an embodiment of the present invention. ■...Battery power supply, 2...Power supply voltage detection circuit, 3...Resistance, 4...Capacity, 5.
...Mountain integral circuit, 6...Control circuit.

Claims (1)

[Claims] an integrating circuit composed of a capacitor and a resistor; a power supply voltage detection circuit that detects whether a power supply voltage is higher than a certain voltage; and a control circuit that controls the output of the integration circuit by the output of the power supply voltage detection circuit. A semiconductor device comprising: