JPH0373073U - - Google Patents
Info
- Publication number
- JPH0373073U JPH0373073U JP13436889U JP13436889U JPH0373073U JP H0373073 U JPH0373073 U JP H0373073U JP 13436889 U JP13436889 U JP 13436889U JP 13436889 U JP13436889 U JP 13436889U JP H0373073 U JPH0373073 U JP H0373073U
- Authority
- JP
- Japan
- Prior art keywords
- video signal
- level
- low
- circuit
- absence
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 5
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
Landscapes
- Synchronizing For Television (AREA)
Description
第1図及び第2図はこの考案に係るビデオ信号
の入力検出回路の実施例を示し、第1図は回路図
、第2図Aは演算増幅器(+)入力端子に加わる
信号の波形図、第2図Bは演算増幅器の出力端子
電圧の波形図、第2図Cは演算増幅器が安定した
状態での出力端子の最終信号レベルの波形図であ
る。第3図は従来例の回路図である。
主な符号の説明、1……演算増幅器、2……信
号検出用トランジスタ、C1……入力カツプリン
グコンデンサ、C2……積分用コンデンサ、R1
……積分用抵抗、R2……コレクタ抵抗。
1 and 2 show an embodiment of the video signal input detection circuit according to this invention, FIG. 1 is a circuit diagram, FIG. 2A is a waveform diagram of a signal applied to the operational amplifier (+) input terminal, FIG. 2B is a waveform diagram of the output terminal voltage of the operational amplifier, and FIG. 2C is a waveform diagram of the final signal level at the output terminal when the operational amplifier is in a stable state. FIG. 3 is a circuit diagram of a conventional example. Explanation of main symbols: 1...Operation amplifier, 2...Signal detection transistor, C1 ...Input coupling capacitor, C2 ...Integration capacitor, R1
... Integral resistance, R 2 ... Collector resistance.
Claims (1)
wレベルの信号を出力するビデオ信号の入力検出
回路において、 前記ビデオ信号の直流分をカツトするコンデン
サと、バツフア回路と、ローパスフイルタ回路に
よりビデオ信号の中の同期信号パルスを直流レベ
ルに変換しこの直流レベルにより動作するスイツ
チ回路とを設け、ビデオ信号の有無をHigh或
はLowレベルで出力させるように構成したこと
を特徴とするビデオ信号の入力検出回路。[Claims for Utility Model Registration] Detects the presence or absence of a video signal and detects High or Low
In a video signal input detection circuit that outputs a W-level signal, a capacitor that cuts the DC component of the video signal, a buffer circuit, and a low-pass filter circuit convert the synchronizing signal pulse in the video signal to a DC level. 1. A video signal input detection circuit comprising a switch circuit that operates based on a DC level, and configured to output the presence or absence of a video signal at a High or Low level.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13436889U JPH0373073U (en) | 1989-11-21 | 1989-11-21 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13436889U JPH0373073U (en) | 1989-11-21 | 1989-11-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0373073U true JPH0373073U (en) | 1991-07-23 |
Family
ID=31681708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13436889U Pending JPH0373073U (en) | 1989-11-21 | 1989-11-21 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0373073U (en) |
-
1989
- 1989-11-21 JP JP13436889U patent/JPH0373073U/ja active Pending
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