JPH0373033U - - Google Patents

Info

Publication number
JPH0373033U
JPH0373033U JP13422889U JP13422889U JPH0373033U JP H0373033 U JPH0373033 U JP H0373033U JP 13422889 U JP13422889 U JP 13422889U JP 13422889 U JP13422889 U JP 13422889U JP H0373033 U JPH0373033 U JP H0373033U
Authority
JP
Japan
Prior art keywords
input signal
resonator
signal
main input
slider
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13422889U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13422889U priority Critical patent/JPH0373033U/ja
Publication of JPH0373033U publication Critical patent/JPH0373033U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案になるラウドネス・コントロー
ル回路の原理図、第2図は本考案になるラウドネ
ス・コントロール回路の一実施例構成図、第3図
は第2図に示す回路のラウドネス特性図、第4図
は従来のラウドネス・コントロール回路の原理図
、第5図は従来のラウドネス・コントロール回路
の具体的構成図、第6図は第5図に示す回路のラ
ウドネス特性図である。 1……入力端子、2,20……ボリユーム、3
,7,8……抵抗、4……共振回路、9……バツ
フアアンプ、20a……タツプ、20b……摺動
子、20c……一端、20d……他端。
FIG. 1 is a principle diagram of the loudness control circuit according to the present invention, FIG. 2 is a configuration diagram of an embodiment of the loudness control circuit according to the present invention, and FIG. 3 is a loudness characteristic diagram of the circuit shown in FIG. 2. FIG. 4 is a principle diagram of a conventional loudness control circuit, FIG. 5 is a concrete configuration diagram of a conventional loudness control circuit, and FIG. 6 is a loudness characteristic diagram of the circuit shown in FIG. 1...Input terminal, 2, 20...Volume, 3
, 7, 8...Resistor, 4...Resonance circuit, 9...Buffer amplifier, 20a...Tap, 20b...Slider, 20c...One end, 20d...Other end.

Claims (1)

【実用新案登録請求の範囲】 メイン入力信号が供給される一端と、接地され
る他端と、前記一端から前記他端に至る抵抗の3
0%以下の抵抗値を有するタツプと、摺動子とを
有し、この摺動子を摺動させることにより前記摺
動子から前記メイン入力信号の信号レベルを連続
的に可変して得た出力信号が出力されるボリユー
ムと、 この出力信号の低域周波数特性を補正する補正
信号を前記ボリユームのタツプへ供給する共振器
と、 前記ボリユームの一端に接続され前記メイン入
力信号または前記メイン入力信号と相関があるサ
ブ入力信号を前記共振器に供給する抵抗器とから
構成されたことを特徴とするラウドネス・コント
ロール回路。
[Claims for Utility Model Registration] One end to which the main input signal is supplied, the other end to be grounded, and a resistor extending from the one end to the other end.
It has a tap having a resistance value of 0% or less and a slider, and by sliding the slider, the signal level of the main input signal from the slider is continuously varied and obtained. a volume from which an output signal is output; a resonator that supplies a correction signal for correcting the low frequency characteristics of the output signal to a tap of the volume; and a resonator connected to one end of the volume and connected to the main input signal or the main input signal. and a resistor that supplies a sub-input signal correlated with the resonator to the resonator.
JP13422889U 1989-11-17 1989-11-17 Pending JPH0373033U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13422889U JPH0373033U (en) 1989-11-17 1989-11-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13422889U JPH0373033U (en) 1989-11-17 1989-11-17

Publications (1)

Publication Number Publication Date
JPH0373033U true JPH0373033U (en) 1991-07-23

Family

ID=31681579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13422889U Pending JPH0373033U (en) 1989-11-17 1989-11-17

Country Status (1)

Country Link
JP (1) JPH0373033U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58223909A (en) * 1982-06-14 1983-12-26 ボ−ズ・コ−ポレ−シヨン Dynamic equalizing circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58223909A (en) * 1982-06-14 1983-12-26 ボ−ズ・コ−ポレ−シヨン Dynamic equalizing circuit

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