JPS61320U - Frequency characteristic adjustment circuit - Google Patents

Frequency characteristic adjustment circuit

Info

Publication number
JPS61320U
JPS61320U JP8312384U JP8312384U JPS61320U JP S61320 U JPS61320 U JP S61320U JP 8312384 U JP8312384 U JP 8312384U JP 8312384 U JP8312384 U JP 8312384U JP S61320 U JPS61320 U JP S61320U
Authority
JP
Japan
Prior art keywords
amplifier
input terminal
signal
resistor element
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8312384U
Other languages
Japanese (ja)
Inventor
正司 有熊
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP8312384U priority Critical patent/JPS61320U/en
Publication of JPS61320U publication Critical patent/JPS61320U/en
Pending legal-status Critical Current

Links

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示す図、第２図は従来例を
示す図である。 １０・・・増幅器、２０・・・可変抵抗器、３０・・・
直列一 共振回路。FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing a conventional example. 10...Amplifier, 20...Variable resistor, 30...
Series one resonant circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 非反転入力端子が信号入力端に接続された増幅器と、こ
の増幅器の反転入力端子と信号出力端間に接続されその
所定点が前記増幅器の出力端子に接続された抵抗素子と
、その一端がこの抵抗素子ぺの接続位置を変化させ得る
よう接続され、その他端が接地された直列共振回路とを
具備し、該直列共振回路の前記抵抗素子への接続位置が
、前記抵抗素子の前記所定点より反転入力端子側である
ときには前記増幅器の負帰還量を減少させることにより
前記増幅器の利得を増強させ、前記直列共振回路の前記
抵抗素子への接続位置が、前記抵抗素子の前記所定点よ
り信号出力端側であるときには前記増幅器の出力信号を
減衰するようにしたことを特徴とする周波数特性調整回
路。an amplifier whose non-inverting input terminal is connected to the signal input terminal; a resistor element connected between the inverting input terminal and the signal output terminal of this amplifier and whose predetermined point is connected to the output terminal of the amplifier; a series resonant circuit connected so as to be able to change the connection position of the resistor element, the other end of which is grounded; When the input terminal is on the inverting input terminal side, the gain of the amplifier is increased by reducing the amount of negative feedback of the amplifier, and the connection position of the series resonant circuit to the resistor element is set to output a signal from the predetermined point of the resistor element. A frequency characteristic adjustment circuit characterized in that the output signal of the amplifier is attenuated when the output signal is on the end side.
JP8312384U 1984-06-05 1984-06-05 Frequency characteristic adjustment circuit Pending JPS61320U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8312384U JPS61320U (en) 1984-06-05 1984-06-05 Frequency characteristic adjustment circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8312384U JPS61320U (en) 1984-06-05 1984-06-05 Frequency characteristic adjustment circuit

Publications (1)

Publication Number Publication Date
JPS61320U true JPS61320U (en) 1986-01-06

Family

ID=30631462

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8312384U Pending JPS61320U (en) 1984-06-05 1984-06-05 Frequency characteristic adjustment circuit

Country Status (1)

Country Link
JP (1) JPS61320U (en)

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