JPH0356217U - - Google Patents
Info
- Publication number
- JPH0356217U JPH0356217U JP11699789U JP11699789U JPH0356217U JP H0356217 U JPH0356217 U JP H0356217U JP 11699789 U JP11699789 U JP 11699789U JP 11699789 U JP11699789 U JP 11699789U JP H0356217 U JPH0356217 U JP H0356217U
- Authority
- JP
- Japan
- Prior art keywords
- inverting input
- differential amplifier
- resistor
- control circuit
- tone control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 7
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
第１図は本考案のトーンコントロール回路の代
表的に実施例（高域のトーンコントロール回路）
の構成を示す図、第２図は同、周波数特性図、第
３図は同、代表的な実施例（低域のトーンコント
ロール回路）の構成を示す図、第４図は従来のト
ーンコントロール回路の代表的な例（高域のトー
ンコントロール回路）の構成を示す図、第５図は
同、周波数特性図、第６図は同、他の代表的な例
（低域のトーンコントロール回路）の構成を示す
図、第７図は同、等価回路を示す図である。
１…入力端子、２…第１の抵抗、３…差動型増
幅器、３ａ…非反転入力、３ｂ…反転入力、４…
出力端子、５…帰還用抵抗、７…トーンコントロ
ール回路部、７ａ…可変抵抗、７ｂ…第２の抵抗
、７ｃ…キヤパシタンス、７ｄ…インダクタンス
、８…放電用抵抗である、９，１０…第１、第２
のスイツチ、１１…補償回路、１１ａ…第２の可
変抵抗、１１ｂ…第３の抵抗。
Figure 1 is a representative example of the tone control circuit of the present invention (high frequency tone control circuit).
Figure 2 is a frequency characteristic diagram, Figure 3 is a diagram showing the configuration of a typical embodiment (low frequency tone control circuit), Figure 4 is a conventional tone control circuit. Figure 5 is a diagram showing the configuration of a typical example (high-frequency tone control circuit), Figure 5 is a frequency characteristic diagram, and Figure 6 is a diagram showing the configuration of another typical example (low-frequency tone control circuit). A diagram showing the configuration, and FIG. 7 is a diagram showing an equivalent circuit. DESCRIPTION OF SYMBOLS 1... Input terminal, 2... First resistor, 3... Differential amplifier, 3a... Non-inverting input, 3b... Inverting input, 4...
Output terminal, 5... Feedback resistor, 7... Tone control circuit section, 7a... Variable resistor, 7b... Second resistor, 7c... Capacitance, 7d... Inductance, 8... Discharge resistor, 9, 10... First , second
11... Compensation circuit, 11a... Second variable resistor, 11b... Third resistor.
Claims (1)
器３の非反転入力３ａに接続し、当該差動型増幅
器３の出力を出力端子４とし、当該出力端子４を
帰還用抵抗５を介して上記差動型増幅器３の反転
入力３ｂに接続するとともに、当該反転入力３ｂ
と上記非反転入力３ａとを第１のスイツチ９によ
つて選択的に切り換えて第１の可変抵抗７ａと、
第２の抵抗７ｂ、キヤパシタンス７ｃおよび／ま
たはインダクタンス７ｄからなるトーンコントロ
ール回路部７を介して接地した構成において、 上記第１の可変抵抗７ａと連動する第２の可変
抵抗１１ａと第３の抵抗１１ｂとを直列に接続し
た補償回路１１と、当該補償回路１１を選択的に
切り換えて上記差動型増幅器３の非反転入力３ａ
、反転入力３ｂに接続し、かつ、上記第１のスイ
ツチ９に連動する第２のスイツチ１０とを具備し
、 上記トーンコントロール回路部７を上記差動型
増幅器３の反転入力３ａに接続したブーストモー
ドにおいて上記補償回路１１を上記差動型増幅器
３の非反転入力３ａに接続し、 上記トーンコントロール回路部７を上記差動型
増幅器３の非反転入力３ａに接続したカツトモー
ドにおいて上記補償回路１１を上記差動型増幅器
３の反転入力３ｂに接続するようにしたことを特
徴とするトーンコントロール回路。[Claims for Utility Model Registration] The input terminal 1 is connected to the non-inverting input 3a of the differential amplifier 3 via the first resistor 2, and the output of the differential amplifier 3 is set as the output terminal 4. The terminal 4 is connected to the inverting input 3b of the differential amplifier 3 via the feedback resistor 5, and the inverting input 3b
and the non-inverting input 3a are selectively switched by the first switch 9 to form a first variable resistor 7a;
In a configuration that is grounded via the tone control circuit section 7 consisting of a second resistor 7b, capacitance 7c and/or inductance 7d, a second variable resistor 11a and a third resistor 11b are interlocked with the first variable resistor 7a. and a compensation circuit 11 connected in series, and a non-inverting input 3a of the differential amplifier 3 by selectively switching the compensation circuit 11.
, a second switch 10 connected to the inverting input 3b and interlocked with the first switch 9, and a boost in which the tone control circuit section 7 is connected to the inverting input 3a of the differential amplifier 3. In the cut mode, the compensation circuit 11 is connected to the non-inverting input 3a of the differential amplifier 3, and in the cut mode, the tone control circuit 7 is connected to the non-inverting input 3a of the differential amplifier 3. A tone control circuit characterized in that it is connected to an inverting input 3b of the differential amplifier 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989116997U JP2549985Y2 (en) | 1989-10-03 | 1989-10-03 | Tone control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989116997U JP2549985Y2 (en) | 1989-10-03 | 1989-10-03 | Tone control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0356217U true JPH0356217U (en) | 1991-05-30 |
| JP2549985Y2 JP2549985Y2 (en) | 1997-10-08 |
Family
ID=31665247
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989116997U Expired - Fee Related JP2549985Y2 (en) | 1989-10-03 | 1989-10-03 | Tone control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2549985Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001284999A (en) * | 2000-03-31 | 2001-10-12 | Aiwa Co Ltd | Sound quality control circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55118531U (en) * | 1979-02-13 | 1980-08-21 | ||
| JPS59140512U (en) * | 1983-03-10 | 1984-09-19 | オンキヨー株式会社 | equalizer amplifier |
| JPS6145634U (en) * | 1984-08-29 | 1986-03-26 | 川崎重工業株式会社 | wet multi-plate clutch |
| JPS6310623U (en) * | 1986-07-08 | 1988-01-23 | ||
| JPS6397918U (en) * | 1986-12-17 | 1988-06-24 |
-
1989
- 1989-10-03 JP JP1989116997U patent/JP2549985Y2/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55118531U (en) * | 1979-02-13 | 1980-08-21 | ||
| JPS59140512U (en) * | 1983-03-10 | 1984-09-19 | オンキヨー株式会社 | equalizer amplifier |
| JPS6145634U (en) * | 1984-08-29 | 1986-03-26 | 川崎重工業株式会社 | wet multi-plate clutch |
| JPS6310623U (en) * | 1986-07-08 | 1988-01-23 | ||
| JPS6397918U (en) * | 1986-12-17 | 1988-06-24 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001284999A (en) * | 2000-03-31 | 2001-10-12 | Aiwa Co Ltd | Sound quality control circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2549985Y2 (en) | 1997-10-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |