JPH0370270B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a division circuit used in automatic control systems and the like.

Prior Art When normalizing signals in an automatic control system, a division circuit is used. As shown in FIG. 3, the conventional dividing circuit is mainly one using a multiplier 10 and an operational amplifier 11, and various ICs are commercially available. (References
ICL8013 in INTERSIL manual,
MOTOROLA LINEAR/INTERFACE
MC1495L/MC1594L in the DEVICES manual) The operation will be explained with reference to Figure 3. Multiplier circuit 1
The output of 0 is a current source output, and the output current (I ₀ ) is expressed as I ₀ =k·(x input)·(divided output)...Equation (1). In addition, in Fig. 3, 13 is x input, 1
4 is the z input, and 15 is the division output.

Since the two inputs of the operational amplifier 11 are fed back to be equivalently equal, both ends are oV, and if the resistance value of the resistor 12 is R, (z input)=I ₀ ·R...Equation (2). Calculating the division output from equations (1) and (2), we get: Division output = I ₀ /k・(x input)=1/k・R・(z input)/(x input) …Equation (3) ), and the output obtained by dividing the z input signal 14 by the x input signal 13 is obtained.

Problems to be Solved by the Invention However, in this type of division circuit, x input 13,
In order to remove the offset of the 3-circuit input that feeds the z input 14 and the division output 15 back to the multiplier 10, three offset adjustment adjusters are required. There are problems such as the need for resistor trimming and the need for special processes when integrated into an IC.
For this reason, the conventional divider circuit can be used as a single IC.
Although it has been commercialized, it is not suitable for being incorporated into some automatic control ICs.

The present invention has fewer offset adjustment points, can easily improve accuracy, and can be installed on the same IC as other circuits.
The purpose of this invention is to provide a division circuit that can be manufactured within the same time period.

Means for Solving the Problems The divider circuit of the present invention includes an AGC detection circuit and two gain control amplifiers, first and second, having the same characteristics, and has a gain control voltage of the AGC circuit. , the first and second gain control amplifiers are simultaneously controlled to perform a division operation.

Effects According to the present invention, since the AGC circuit and the gain control amplifier are circuits that are very often used as IC circuits, they can be easily implemented without requiring special processes, and can be implemented as an IC with fewer adjustment points. can.

Embodiment FIG. 1 shows an example of the configuration of a division circuit according to the present invention. Gain control amplifier 2 and (first gain
control amplifier) and AGC detection circuit 3,
It constitutes the AGC circuit. The x input signal 6 is amplified with a gain=G by the gain control amplifier 2 and outputted as an AGC output signal 8. The AGC detection circuit 3 compares the reference input signal 9 and the AGC output signal 8, and controls the gain of the gain control amplifier 2 using a gain control signal so that the AGC output signal 8 and the reference input signal 9 are equal.

(x input signal)・G=V ₈ = (reference input signal)
...(4) Gain control amplifier 1 (second gain control amplifier) is controlled by the gain control signal from AGC detection circuit 3 so as to have the same gain as gain control amplifier 2, and (z input signal)・G=(divided output signal)...Equation (5) is obtained. That is, (divider output signal)=(z input signal)・G=(z input signal)/(x input signal)・(reference input signal)...Equation (6) is obtained, and a division operation is performed.

Hereinafter, a concrete example of the division circuit of the present invention will be explained as a second example.
This will be explained with reference to the diagram. Transistors Q ₉ , Q ₁₀ ,
Q ₁₁ , Q ₁₂ , resistors R ₆ , R ₇ constitute a Darlington differential amplifier, transistors Q ₁₅ , Q ₁₆ , resistors R ₉ ,
R ₁₀ , transistors Q ₁₈ , Q ₁₇ , resistors R ₁₂ , R ₁₃ ,
R ₁₄ and diodes D ₈ and D ₉ constitute a current source. Transistors Q ₃ , Q ₄ , Q ₅ , and Q ₆ constitute a gain control stage, and when the base potential of transistors Q ₃ and Q ₆ is made higher than the base potential of transistors Q ₄ and Q ₅ , the z input signal 4 becomes a current mirror. The amount transmitted to the load increases, increasing the gain. The base potential of these transistors Q ₃ , Q ₆ and the transistors Q ₄ ,
Gain control is possible by controlling the base potential of _Q5 . Here, transistors Q ₁ , Q ₂ , diode D ₁ , resistors R ₁ , R ₂ and
Transistor Q ₇ , Q ₈ , diode D ₆ , resistor R ₃ ,
R ₄ , transistors Q ₁₄ , Q ₁₃ , diode D ₇ ,
The resistors R ₈ and R ₁₁ each constitute the above-mentioned current mirror load, and the collector current flowing to the transistor Q ₁₀ is distributed between the transistors Q ₃ and Q ₄ and then transferred to the transistors Q ₁ , Q ₂ , the diode D ₁ , and the transistor Q ₁₃ , Q ₁₄ and diode D ₇ are transmitted with the same current and work to lower the divided output signal 5, and the collector current flowing to transistor Q ₁₁ is
After being distributed by Q ₅ , Q ₆ , transistors Q ₇ , Q ₈ ,
It is transmitted with the same current as the diode D ₆ and serves to raise the divided output signal 5. Diodes D ₂ , D ₃ ,
D ₄ and D ₅ are level shifting diodes for matching the Early effect of transistor Q ₂ with that of transistor Q ₈ . The above circuit constitutes the gain control amplifier 1.

Transistor Q ₆₉ ~ Q ₈₅ , Diode D ₂₃ ~ _{D 31} ,
Resistors R ₆₅ to R ₇₇ and R ₁₅₃ similarly constitute a gain control amplifier 2 included in the AGC circuit.

Also, transistors Q ₈₆ to Q ₉₉ and diodes D ₃₂ to
D ₃₇ and resistors R ₇₈ to _{R 80} constitute the AGC detection circuit 3. The output signal 8 of the gain control amplifier 2 included in the AGC circuit is compared with the reference input signal 9 by differential amplifiers Q ₉₇ to _{Q 98} having active loads.
The outputs of the differential amplifiers Q ₉₇ and Q ₉₈ are supplied to the smoothing filters C ₁ and R ₁₉ by transistors Q ₉₄ and Q ₉₅ , and the differential amplifiers Q ₉₀ and Q whose loads are the diodes D ₃₄ and D _{35 91} becomes the gain control signal.

In this circuit, the input signal 6 of x is a load signal, and the more negative the input signal, the higher the signal level. If we consider the case where the output signal 8 is negative and larger than the reference input signal 9, the transistor Q ₉₇ is turned off and the transistor Q ₉₈ is turned on. Also, diode D ₃₇ and transistor Q ₉₆ are turned off, and transistors Q ₉₄ and Q ₉₅ are turned on.
Therefore, the capacitor _C1 is charged with charge, and the base potential of the transistor _Q91 increases. The collector potential of transistor Q ₉₁ increases from the collector potential of transistor Q ₉₀ , and the cathode potential of diode D ₃₅ and the emitter potential of transistor Q ₈₈ decrease. The base potential of transistors Q ₇₄ and Q ₇₁ decreases, the gain of gain control amplifier 2 decreases, and negative output signal 8 becomes the same as reference input signal 9. The opposite is true if the output signal 8 is more negative and smaller than the reference input signal 9. The gain control signals 7a and 7b are also supplied to the bases of the transistors _Q3 to _Q6 constituting the gain control amplifier 1, and are controlled to have exactly the same gain. In this circuit, the polarity is reversed by signal transmission from the z input signal 4 to the divided output signal 5.

The range in which the divider circuit operates is (x input signal)・(maximum gain)≧(reference input signal)
...Formula (7) (maximum gain) = R ₁₅₃ /R ₇₀ ×2 ...Formula (8), the x input signal and the z input signal must be within the dynamic range of the gain control amplifiers 1 and 2.

Effects of the Invention As described above, according to the division circuit of the present invention, the IC
The circuit configuration is suitable for This is because in the conventional division circuit, the x input, the z input, and the input to the multiplier of the division output all affect the offset of the division output, whereas in the division circuit of the present invention, the z input This is because only the input affects the offset of the division output, and the offset of the z input only slightly affects the division error.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a division circuit according to an embodiment of the present invention, FIG. 2 is a circuit diagram showing a specific example of the invention, and FIG. 3 is a circuit diagram of a conventional division circuit. 1, 2...gain control amplifier, 3...
AGC detection circuit.

Claims (1)

[Claims] 1. A first gain control amplifier to which the x input signal is input, controls its gain and outputs it; a second gain control amplifier to which the z input signal is input, controls its gain and outputs it; The output signal of the first gain control amplifier is input, and the gain control signal for controlling the first gain control amplifier is input to the first and second gain control amplifiers so that the output signal and the reference input signal are equal to each other. AGC that simultaneously outputs to the gain control amplifier of
A division circuit comprising a detection circuit and obtaining the output signal of the second gain control amplifier as a division output signal.