JPH0369182B2 - - Google Patents

Info

Publication number
JPH0369182B2
JPH0369182B2 JP60045867A JP4586785A JPH0369182B2 JP H0369182 B2 JPH0369182 B2 JP H0369182B2 JP 60045867 A JP60045867 A JP 60045867A JP 4586785 A JP4586785 A JP 4586785A JP H0369182 B2 JPH0369182 B2 JP H0369182B2
Authority
JP
Japan
Prior art keywords
well
film
insulating film
epitaxial
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60045867A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61204962A (ja
Inventor
Yoshio Tsuruta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP60045867A priority Critical patent/JPS61204962A/ja
Publication of JPS61204962A publication Critical patent/JPS61204962A/ja
Publication of JPH0369182B2 publication Critical patent/JPH0369182B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Recrystallisation Techniques (AREA)
JP60045867A 1985-03-08 1985-03-08 Cmosの製造方法 Granted JPS61204962A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60045867A JPS61204962A (ja) 1985-03-08 1985-03-08 Cmosの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60045867A JPS61204962A (ja) 1985-03-08 1985-03-08 Cmosの製造方法

Publications (2)

Publication Number Publication Date
JPS61204962A JPS61204962A (ja) 1986-09-11
JPH0369182B2 true JPH0369182B2 (US20100223739A1-20100909-C00005.png) 1991-10-31

Family

ID=12731154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60045867A Granted JPS61204962A (ja) 1985-03-08 1985-03-08 Cmosの製造方法

Country Status (1)

Country Link
JP (1) JPS61204962A (US20100223739A1-20100909-C00005.png)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100365738B1 (ko) * 1998-06-29 2003-03-04 주식회사 하이닉스반도체 반도체소자의소자분리막형성방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4984587A (US20100223739A1-20100909-C00005.png) * 1972-12-19 1974-08-14
JPS58169964A (ja) * 1982-03-30 1983-10-06 Fujitsu Ltd 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4984587A (US20100223739A1-20100909-C00005.png) * 1972-12-19 1974-08-14
JPS58169964A (ja) * 1982-03-30 1983-10-06 Fujitsu Ltd 半導体装置

Also Published As

Publication number Publication date
JPS61204962A (ja) 1986-09-11

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