JPH0368163A - Semiconductor device - Google Patents

Abstract

PURPOSE:To protect a connection part between a lead and a package against breakage by a method wherein the deformation strength of the lead which connects a package provided with a semiconductor chip inside it to an electrode is made smaller than the joining strength of a joint between the lead and the electrode. CONSTITUTION:A large number of electrodes 3 connected to a multilayered wiring 14B provided inside a printed wiring board 1 are arranged on the surface of the printed wiring board 1 at a prescribed interval. A microchip carrier 2 is possessed of a package structure composed of an insulating board 4 and a cap 5 and a semiconductor chip 6 is hermetically enveloped in the carrier 2. A large number of electrodes 8 are arranged in gridirons on the whole underside of the board 4 and connected to the upper electrodes 3 through the intermediary of a wiring 14A which runs through the inside of the insulating board 4. The upper ends of lead pins 11 are joined to the lower electrodes 8 of the board 4 through the intermediary of bonding agent 12, and the lower ends of the pins 11 are connected to the electrodes 3 through the intermediary of solders 13. The lead pin 11 is so designed as to make its bending strength to a compression load applied in an axial direction smaller than both the bonding strengths of the bonding agent 12 and the solder 13.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to packaging technology for semiconductor devices, and in particular,
Effective when applied to multi-bin surface mount packages.
It's all about technology.

[Conventional technology]

In order to increase the storage capacity and speed of combination products, packages mounting logic LSIs and image processing LSIs are rapidly increasing in number of bins.

As a package suitable for multiple bins, the bin grid array (hereinafter referred to as PGA) is a bin insertion type.
However, surface mount types such as PLCC (Plastic Leap-It Chip Carrier) and QFP (Quad Flat Package) are known, and their trends and technologies can be found in, for example, Kogyo Kenkyukai Co., Ltd., September 1988. Published on the 1st of the month, “Electronic Materials JP40-P5
0, and JP-A No. 63-132465.

In particular, the PGA method allows the entire back side of the package to be used for taking out the lead bin.
It is said to be an optimal package structure for LSIs that require winterization bins such as zero bins, and has been attracting particular attention in recent years.

[Problem to be solved by the invention]

The present inventor studied the problems in promoting the increase in the number of bins in the above-mentioned package. The outline is as follows.

In other words, in order to mount a PGA on a printed wiring board, conventionally,
It was necessary to insert approximately 0.46 m diameter glue dobbin into a 0.7 to 0.8 B diameter through hole.

At that time, a land is formed around each through hole, so the effective through hole diameter is approximately 0.85 to 1.0
m, and the through hole is standard 2.54 m (100 m).
When the lands are arranged in a grid pattern with a pitch of 1.5n, the pitch of adjacent lands is approximately 1.5n.

In this case, if wires are drawn on the surface of the printed wiring board at a pitch of, for example, 0.18, seven wires can pass between each land, but in a PGA with 300 to 500 bins, due to the design, Since it is necessary to pass 10 to 15 wires, it is no longer possible to design wiring using a single-layer printed wiring board.

However, if we design a multilayer printed wiring board that can insert 300 to 500 lead bins at 2.54 inch pitch, the internal wiring length of the PGA package and the internal wiring length of the printed wiring board will become longer, and the transmission characteristics will deteriorate. I end up.

Therefore, by optimizing the through-hole pitch taking this transmission characteristic into account, the pitch is 1.78 m1i (70 m1l),
Or, since the pitch needs to be 1.27am (50ml), the wiring pitch is Q, 78111 or 0.2
7fi, which ultimately exceeds the limit of wiring design even when a multilayer printed wiring board is used.

As described above, in order to promote the increase in the number of pins in PGAs, the bottle insertion method has reached its limits, so it is essential to adopt a surface mounting method instead of the bottle insertion method.

In other words, by using the surface mount method in which the tip of the lead bin of the PGA is soldered or brazed to the surface electrode of the printed wiring board, there is no need for a through hole on the printed wiring board for inserting the bin, and it is easier to route the wiring. In this case, it is only necessary to arrange surface electrodes with a diameter equal to or slightly larger than the diameter of the lead bin only at the necessary locations of the pier hole.
Since the diameter of the surface electrodes may be 0.46 to 0.6B, the wiring pitch when arranged in a grid with a standard pitch of 2.54 m is approximately 2 m, which means that a wintering bin PGA with approximately 300 to 500 pins can be used. However, you can get enough space to arrange the pongee. Also,
Since the lead bin is not an insertion type, its diameter should be 0.1~
It can be made as thin as 0.3 sum, and the surface electrode can be made as thin as 1.
Even when arranged at a pitch of 271jI, an arrangement space of about 1,On can be obtained.

Furthermore, since the package can be made smaller, PGA
There is also the effect that the internal wiring length of the package and the internal wiring length of the printed wiring board are shortened and the transmission characteristics are improved.

However, in the method of surface mounting the PGA on the printed wiring board using solder or brazing material, thermal mismatch occurs between the PGA buff cage and the printed wiring board due to the heat generated by the semiconductor chip. There is a problem in that mechanical stress is concentrated at the soldering (or brazing) points of the lead bin, causing broken joint lines. This potential for failure increases in proportion to the increase in the degree of integration of integrated circuits, and becomes a serious factor that prevents PGAs from increasing the number of bins.

In addition, when mounting a QFP among the above packages on a wiring board, as the number of bins increases, the leads become thinner and twisted, and the stress due to thermal mismatch is similarly concentrated in the soldered parts of the lead bins, resulting in vibration failure. cause.

Furthermore, in recent years, the applicant has previously filed U.S. Patent Application No.
MCC (microchip carrier) packages such as those listed in No. 41,204 are connected to the mounting board by melting solder balls, making it difficult to remove and analyze failures. There's a problem.

On the other hand, in recent years, semiconductor devices incorporated into combinators have been required to operate at higher speeds and have higher density packaging, and inspections to further improve their reliability have become increasingly important. As for the inspection method, for the bottle insertion type PGA package, the bottle is connected to a measurement pad, and for the different surface mounting type MCC package,
Inspection and measurements are being carried out using a glove needle.

However, in the case of a PGA barcouge, not all pins have the same length, so some pins are not connected to the measurement pad. In addition, in the case of MCC packages, the glove needle may crush the solder bumps.
The probe needle itself was easily deformed and had a short lifespan.

The present invention has been made focusing on the above problems,
The purpose is to provide a technology that can improve the connection reliability by preventing breakage at the bottle-board connection part when surface mounting PGA on a printed distribution board, thereby promoting the increase in the number of PGA bins. There is a particular thing.

One object of the present invention is to provide a pin (lead) that is easily deformable and has spring properties in a surface mount type package.

One object of the present invention is to provide a technique that improves the selectivity of materials for the package and the substrate by using pins that have a stress-absorbing function.

The purpose of the present invention is to provide a lead bin and a package using the same.

Furthermore, one object of the present invention is to provide a semiconductor memory module that is equipped with a plurality of packages using lead bins that alleviate thermal and mechanical stress, and that improves connection reliability during mounting. .

A further object of the present invention is to provide a package that allows for easy removal and failure analysis.

A further object of the present invention is to provide a technique for preventing permanent deformation of a probe needle and increasing its lifespan.

Another object of the present invention is to use a glove needle made of a material with a wide elastic range to ensure reliable contact even when the height of the inspection position varies, thereby improving the reliability of inspection.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

One end of the lead bin is brazed to electrodes arranged at a predetermined interval on the back of the board, and the other end of the lead bin is soldered or brazed to the electrode on the main surface of the printed rice distribution board. In addition, the semiconductor device has a structure in which the deformation strength of the lead bin is made weaker than the alignment strength at both ends thereof.

(2) The shape of the lead bin is such that it is easily deformed when thermal or mechanical stress is applied, that is, the center portion of the lead bin is curved into an arcuate shape.

(3) The material of the lead bin has the property of transformation pseudoelasticity, that is, the property of transforming from martensite to austenite immediately (at room temperature) when the stress is reduced to zero.

(4) The material of the lead bin is a material with high resiliency;
That is, austenite, which has low resilience, was changed to martensite, which has high resilience, and was returned to the original TG material.

(5) For lead bins made of the materials mentioned in (3) and (4) above,
Furthermore, in order to improve adhesion with solder, nickel (
Nf).

It was plated with gold (Au).

(6) Add (3) above to the glove needle used during the % sex test.

(J, The needle was made of a material having the material of (5).

(7) The central part of the lead bin is curved into an arched shape so that the shape of the lead bin can be easily deformed. Specifically, the displacement from the axial direction (ΔX) was set to be 1/2 or more of the diameter (d) of the lead bin. Furthermore, at this time, the glue-dobbin materials are
The material had a Young's modulus of 15×10 10 Pa or less.

[For production]

By the above-mentioned means, the warping can be avoided because the thermal and mechanical stress caused by the thermal mismatch between the insulating substrate of the microchip carrier and the printed mounting plate can be alleviated by the deformation of the lead bin. Bond breakdown is effectively prevented.

Furthermore, connection reliability can be improved by preventing breakage at the connection between the pins and leads and the board.

Furthermore, by using a material that is easily deformable and has spring properties and has the ability to absorb thermal and mechanical stress for the lead bin of the package, we can improve the selectivity of the materials for the package and the substrate. , even higher density/integration/
A highly reliable semiconductor integrated circuit device can be provided.

Furthermore, it is possible to provide a technique that prevents permanent deformation of the glove needle and further improves the reliability of inspection.

〔Example〕

Hereinafter, the present invention will be explained based on embodiments shown in the drawings.

Note that the same reference numerals are used for parts having the same function.

[Embodiment 1] Figures 1-5 are sectional views of essential parts showing a semiconductor device which is an embodiment of the present invention.

The first embodiment is a semiconductor device having a mosier structure in which a microchip carrier 2 is mounted on the upper surface of a printed wiring board 1.

The printed wiring board 1 is made of glass fiber-impregnated epoxy resin or polyimide resin, and its surface is coated with internal copper (C).
u) A large number of electrodes 3 connected to the multilayer arrangement M14B are arranged at predetermined intervals.

FIG. 1 (4) shows a so-called ceramic package, in which the microchip carrier 2 has a package structure consisting of an insulating substrate 4 and a cap 5, and inside thereof is a semiconductor chip 6 on which a predetermined integrated circuit is formed. is hermetically sealed.

The semiconductor chip 6 is attached to the upper surface of the insulating substrate 4 via a solder bang 7 bonded in the direction in which the integrated circuit is formed. 7-eight down bonded to pole 8.

Further, the back surface of the semiconductor chip 6 is bonded to the inside of the cap 5 via a bonding material 9 such as solder, so that the heat generated from the semiconductor chip 6 during operation is dissipated to the outside through the cap 5. .

The insulating substrate 4 of the microchip carrier 2 is made of a ceramic material such as mullite, and the cap 5 is made of a ceramic material such as aluminum nitride (AIN). The insulating substrate 4 and the cap 5 are bonded to each other via a bonding material 9 such as solder applied to the peripheral edge of the insulating substrate 40, so that the inside of the microchip carrier 2 is kept airtight.

Wiring made of a thin film is formed on the surface of the insulating substrate 4,
If necessary, a chip capacitor 1
Passive elements such as 0 are soldered.

A large number of electrodes 8 are arranged in a grid pattern on the entire lower surface of the insulating substrate 4 at predetermined intervals.
Tungsten (W) distribution passing through the inside of the insulating substrate 4
It is connected to the t-pole 8 on the top surface via A.

The upper ends of lead bins 11 are bonded to the electrodes 8 on the lower surface of the insulating substrate 4 through soldering materials such as silver (Ag)/copper (Cu) alloy or adhesives 12 and 12 such as solder.
The lower end of is joined to the electrode 3 of the printed wiring board 1 via the solder 13. Further, the lead bin 11 is formed by ordinary wood processing, plate processing, cutting/punching processing, or etching processing.

The lead bin 11 that connects the insulating substrate 4 and the printed wiring board 1 has a bending strength (buckling strength) when subjected to a compressive load from the axial direction, which is equal to the bonding strength of the brazing material 12 and the solder 13.
It is designed to have a value smaller than either of the bonding strengths of .

Figure 1 (■) is a so-called plastic package.

The microchip carrier 2' has a package structure consisting of an insulating substrate 21 made of glass epoxy and a cap 15 made of the same material, and the above-described semiconductor chip is sealed inside.

The semiconductor Chikupro has silver (Ag) in the center of the insulating substrate 21.
It is attached with a bullet through an adhesive 1b such as a resin-containing epoxy resin. In order to extract signals from the integrated circuit formed on the semiconductor chip 6 to the outside, wiring 17 made of copper (Cu) formed on the surface of the insulating substrate 210 and external terminals (bonding pads) 38 are connected with gold. Alternatively, they are electrically connected using a wire 18 made of copper.

The bulleted and wire-bonded semiconductor chip is sealed with a cap 15 using a bonding material such as epoxy or solder.

Each lead bin 11 is attached to the insulating substrate 21 by forming a through hole inside the insulating substrate 21, inserting the lead bin 11, and filling it with solder. The inserted tip of the lead bin 11 is electrically connected to the MA 17.

Further, the lower end of the lead bin 11 and the printed wiring board 1 are joined by the same method as the above-mentioned ceramic package.

Next, we will discuss a mounting method that takes into account buckling strength and bonding strength.

In Example 1, the strength of the lead bin 11 is Pl.

Brazing filler metal 12. The solder joint strength is S and #s, respectively.

In this case, it has a buckling strength that satisfies PI < SS e SS.

Here, the definition of solder joint strength S (kgf) is: S, = σS - A σS: Joint stress (kgf/-) A
This definition includes the following conditions: σ=E−g(ff)−(1) E: Young’s modulus of solder C: Function of stress (σ) Here, in materials such as solder that do not have a clear yield point that separates the elastic state from the plastic state, empirically, the strain is expressed as 0.
The stress that produces an apparent yield point of 2% is used instead of the yield stress. Therefore, this is expressed as #8(σ) (stress function).Furthermore, the pure yield point g,(σ) is considered first, but since solder also has a creep phenomenon, εC(
If σ is the creep strain expressed as a function of stress σ, then 68(σ) = g p (σ) + t c (σ)
=0.2(%)-(2), which is the apparent amount of strain at yield.

(If we put the distortion amount obtained from Equation 21 into Equation (1), σ$
=EX0.2%, and it is necessary to satisfy the following conditions: S, =EX0.2%XA.

Further, when the lead bin 11 is attached, stress distribution occurs depending on the shape of the part. A crank occurs at the maximum stress portion σmaw. Therefore, in order to set S in consideration of the life span, □ must satisfy the condition: Ceq≦0.2% model C, where M eq is defined as the equivalent strain amount obtained by stress calculation using the finite element method.

Furthermore, the bonding strength S is similarly defined.

On the other hand, the strength of the lead bin 11 is Pl, and Pl is obtained by 4 from the second moment of area I.

As shown in Figure 1 (Q), when a displacement υ is caused, the reaction force R acts on the bottle to return it to its original position.If we define R=P, then R=u-Kodan Knee (3) J : The length of the lead bin S. Here, the moment of inertia of area is i = -d4 in the case of a bottle (cylindrical cylinder). d : The diameter of the bottle is 4. Substituting this into equation (3) yields: defined.

Next, create a lead bin 1 that satisfies the above conditions.
Let's talk about 1.

Materials (1): Yu/Gesten, molybdenum, carbon,
Examples include amorphous metal and thin wire with strong spring properties. In addition, the above thin wire is made of copper (C
Composite wire rod 11A made by bundling soft metals such as u) as a binding material
But that's fine. Furthermore, plating 11B is applied. The plating is usually gold (Au) plating or gold (Au)/
Although nickel (Ni 2 ) plating or the like is applied, since the plate thickness of the plating is extremely thin, the effect on the buckling strength can be ignored.

Further, the plating is to facilitate soldering, and specifically, it is preferable to apply Ni 1 to 4 μm and AuO 1 to 1 μm.

Material (2): A material having a property of transformed pseudoelasticity (or called superelasticity) is used. For example, TL(51wt%)-N
l(49wt%')eAg(45yj%)-Cd(
55wt%), Cu (14,5wt%)-Ajj(4
,4wt%) -N i (81,1wt%), T17
7j, 47wt%) - Old (3wt%) Fe (50wt%
%).

A transformed pseudoelastic material is an alloy system that undergoes martensitic transformation, which can be used at room temperature (1
It returns to its original shape at a temperature of 5 to 30°C. this is,
This is because the crystal structure changed (transformed) from austenite (4) to martensite (H) rather than permanent deformation due to stress. Depending on the direction of stress, contraction and expansion (
For example, a body-centered cubic lattice (bee) contracts by 20% on the Z axis and expands by 12% on the x and y axes, so the large f,
Even if it transforms, it will be absorbed within the blunder, and when it disbands, it will return to its original state.

Also, this pervert! I! In terms of elasticity, shape memory alloys are crimson red, and shape memory alloys return to their original shape by applying heat above room temperature. ) The content related to this was published in 1982 (
1984) Published by Sangyo Tosho Co., Ltd. on June 7, 1984, "Shape Memory Alloys JP 1-3. It is described in pages 34-36, and detailed explanation will be omitted here and here.

4 (3) Use a material with a high elastic limit strength (yield index) and a low elastic modulus (that is, a material with high springiness). Examples of materials with such properties include Tables 1 and 2. ) shown at the end of the text.

Table 1° shows ultra-high tensile strength materials. This is a material with a wide recovery range; it becomes martensitic when stress is applied and does not return to its original state.

In the present invention, in particular, the LSI assembly and mounting process
(max) temperature is usually applied, so we used a material whose martensite formation and tempering temperature is 500°C or higher.

Table 2. In addition, materials that are effective for high-temperature processing and heat-resistant ultra-high tensile strength materials are shown. In particular, since glass sealing is processed at a temperature of about 450° C., this is designed to be able to withstand this temperature sufficiently. For example, material D in Table 2 is heated to approximately 600°C.
It has heat resistance.

Furthermore, as the reed and bottle material in the present invention,! i!
2.0B material is the most effective. This is because material B has a lower modulus of elasticity than the others, so the transformation from austenite to martensite takes place with less stress. be.

As described above, the strength P of the lead bin 11 connecting the insulating substrates 4 and 21 and the printed wiring board 1 is expressed as the bonding strength S, , S of the brazing material 12 and the solder 13.

(P<81-St), or, after satisfying that condition, use the thin wire with strong resiliency.
According to this embodiment 1, which uses bottles with high resilience such as composite wire rods (m-fiber reinforced bottles), transformed pseudoelastic (superelastic) bottles, ultra-high tensile strength material bottles, heat-resistant ultra-high tensile strength material bottles, etc., semiconductor chips 6 Even if a thermal mismatch occurs at the threshold between the insulating substrate 4 and the printed wiring board 1 due to heat generation, the thermal and mechanical stress caused by this thermal mismatch can be alleviated by deforming the lead bin 11. , breakage of the joint at the end of the lead bin 11 is effectively prevented.

This ensures connection reliability when surface mounting the microchip carrier 2 equipped with the lead bin 11 on the printed wiring board l, and promotes the increase in the number of bins. It becomes possible to realize this.

Furthermore, as shown in FIGS. 2(4) and 2(b), the PGA type package of Example 1 is equipped with a plurality of printed distribution boards IK made of ceramic such as mullite formed by floating printing and firing technology. and forms a module 61. 50 is Mike.

The lead bins 11 and 12 of the chip carrier 2 are electrically connected to the electrodes 3 to which they are bonded through the internal wiring H14B, and are made of, for example, 4270I gold-plated material.

Furthermore, as shown in FIG. 2(6), the module 61 has lower heat dissipating fins 60 formed in a comb-teeth shape on the entire upper surface of the cap 5 in contact with each other without creating a gap. and,
The upper radiation fin 59B is formed integrally with the cap 59A so as to fit into the recessed portion of the lower radiation fin 60.

C/'59A/upper heat dissipation fin 59B is cu and M
The microchip carrier 2 on the printed wiring board 1 can be sealed, and has a box shape surrounding the top and west side. The periphery of the cap 59A is bonded to the printed wiring board 1 with solder (for example, 60 wt% Pb-40 vt% Pb). Further, the cap 59A is provided with a plurality of water channels 58, and by flowing cooling water therein, the heat generated in the microchip carrier 2 is effectively cooled.

[Embodiment 2] FIGS. 2(4) to 2C) are diagrams showing a semiconductor device which is an embodiment of the present invention.

The second embodiment is a semiconductor device having a module structure in which a QFP type package 24 is mounted on the upper surface of a printed wiring board 1.

The QFP package 24 includes a lead frame 22 formed by punching or etching a Cu-based thin plate.
By attaching a semiconductor chikupro on the ground lead part (or tab part) 25 of the semiconductor chip, electrically connecting the inner lead part 22A and the semiconductor chikupro through the wire 18, and further sealing with epoxy resin. can get.

Further, this QFP package 24 is mounted on the printed wiring board 1 via the outer lead portion 22B.

Similarly to the first embodiment, the lead 22B connecting the printed wiring board 1 and the package 24 has a bending strength Pl.
is designed to have a value smaller than the bonding strength of the solder 13.

When the bonding strength of the strength Pie solder of the lead 22B is Ss, the lead 22B has a buckling strength that satisfies Pg<Ss.

Here, the bonding strength S1 is the bonding strength S in Example 1,
Since it can be defined under the same conditions as , we omit the explanation.

On the other hand, the strength Pt of the lead 22B is defined as follows when a displacement U occurs as shown in FIG. 30.

In the case of a lead (prismatic), the moment of inertia of area is: 〈〉〉〉〉〈b−h′ b: Width of the lead 2 h: Thickness of the lead. By substituting this into equation (3) of Example 1, it can be defined as follows.

Furthermore, this lead 22 is made of the material (1) described in Example 1.
, (2,), and (3). That is, materials with high multi-dimensional strength were used as leads, such as thin strings with strong resiliency, composite wires, transformed pseudo-elastic leads, ultra-high tensile strength material leads, and heat-resistant ultra-high tensile strength material leads. As a result, even if a thermal mismatch occurs between the package 24 and the printed wiring board l, the stress caused by this thermal mismatch is reduced to the lead 22B.
The lead 22 can be relaxed by deformation of the lead 22.
Bond breakage at the end of B is effectively prevented.

[Example 3] Figures 4 and 5 show thin strings with strong resilience, composite braided materials, transformed pseudo-elastic materials, ultra-high strength materials, heat-resistant ultra-high tensile strength materials, etc. used as lead pins in Example 1. This shows another example using .

In Figure h4, 62 is a wafer prober. 2
6 is a coaxial connector, 27 is a printed circuit board with impedance matching written on it, #28 is a globe needle formed by etching, etc., 29 is a signal line, 30 is a ground line, and 34 is a vertically movable bottle. It is. This wafer prober 62 brings the probe needle 28 into contact with the electrode (or test electrode) 31 prepared on the semiconductor chip in the wafer 32 placed on the X-Y tape #33, and uses a well-known tester. This is a device for automatically testing semiconductor integrated circuit devices in conjunction with each other.

FIG. 4(6) shows the wafer prober 62 of FIG. 4(4).
This is a wafer prober 63 that is a modified example of the wafer prober 63.

A through hole 36 is formed in the printed circuit board 27, and a globe pin 35 is embedded and attached. and,
The electrode 31 prepared on the semiconductor chip in the wafer 32 placed on the X-Y table 33 and the globe pin 35
Test by making contact with the tip. 37 shows the alignment state due to the deformation of the probe bottle 35 when it is brought into contact.

In the third embodiment, the probe needle 28. glove bin 3
5, materials (1), (2), (3) shown in Example 1
-ITL, the surface of which is plated with Ni/Au.

As described above, according to the present embodiment 3, even if a large force and repeated force are applied to the probe needle 28 and the glove bottle 35,
Since it returns to its original shape, it has a long lifespan. Also, the needle 28.
Since the bottle 35 has a large elastic range, even if there are variations in the height of the inspection position, the glove needle and the bottle can be brought into contact with each other reliably, improving the reliability of the inspection.

FIG. 5 shows a PGA using a package glover 64.
FIG. 2 is a side view of main parts of an apparatus for inspecting type packages.

In the figure, 40 is a matching state due to deformation of the bin, 41
is a pressure piston, 42 is a positioning guide spacer made of epoxy resin or fluororesin, 43 is a printed circuit board with impedance matching wiring, and 44 is an X-
A Y table 45, a ground wiring 146 provided in the substrate, a signal wiring, and 47 an inspection electrode.

On the top surface of the X-Y table 44 on which wiring for inspection is placed, there are a plurality of inspection electrodes (plated in the order of Au-Ni) 47 for making contact with the tip of the lead bin 11 of the package. It is located. The test electrode 47 is aligned with the tip of the lead bin 11, which has been positioned at a predetermined location using the positioning guide spacer 42, and the pressure piston 41 is used to apply pressure from above the package. 47 and the lead bin 11 are completely connected. Here, the lead bin 11 is as shown in Example 1.
Since the materials (1), (2), and (3) described in 40 are used, even if there are variations in the length of the lead bin 11 and the height of the electrode 47, it will be in a consistent state as shown in 40, and will never break. There is nothing to do, and when the pressure is removed after the inspection, the bottle returns to its original state.

This makes it possible to improve the reliability of package inspection and extend the life of the lead bin.

[Example 4] Figure 6 (4) @ shows that in Example 1, column materials, ultra-high tensile strength materials, heat-resistant ultra-high tensile strength materials, etc. were used as TAB (Tape Automated Bonding) K as lead bins. This is an example of the following.

In the TAB shown in FIG. 4, first, the material (1) of Example 1,
(2)? (3) Align the semiconductor chikupro at a predetermined position on the tape carrier on which the leads 52 are formed,
It is obtained by bonding a bump electrode 53, which is an external terminal provided on the circuit forming surface of the semiconductor differential 160, to the tip of the lead 52. Furthermore, in order to protect the surface of the semiconductor chip 60, it is coated with a bonding resin 54 made of epoxy resin. The TAB obtained in this way is
For example, it is bonded to an insulating substrate 56 having wiring such as an IC card board or a printed circuit board.

FIG. 6 (Junji Kou, 7-eighth down bonding of the above TAB to an insulating substrate 56.

In Example 4, the TAB leads are made of materials (1) and (2).
) (3), it is possible to reliably connect the bump electrode 53 and the Lee, , 52. Also, transportation of TAB,
1. Since there is no need to worry about lead bending, the reliability and yield of semiconductor packages can be improved. Furthermore, since the leads absorb thermal and mechanical stress when mounting the TAB on the board, reliable mounting can be ensured to prevent disconnection and other defects.

[Embodiment 5] FIG. 7 (A, @ is a sectional view of a main part showing a semiconductor device according to another embodiment of the present invention, and 1st (Q) is a front view showing a lead bin of this semiconductor device.

The semiconductor device of Example 50 is also one in which a microchip carrier 2 is surface-mounted on a printed wiring board l via a lead bin 20 provided between an insulating substrate 4 and a printed wiring board 1, and is different from Example 1. The difference lies in the shape and material of the lead bin 20.

That is, the lead bin 20 of the fifth embodiment has a shape that easily deforms when thermal and mechanical stress is applied. That is, this lead bin 20 has a Young's modulus of 15
It is made of a material with a pressure of 10 Pa or less, and its central part is curved in advance so that the displacement x from the axial direction is at least 1/2 of the diameter (d) in Fig. 7 (as shown in Q). It is.

Here, FIG. 7 (4) is a ceramic package, and ■ is a plastic package, and the material and function of the package are the same as those in FIGS. 1 (4) and (6) described in Example 1 above. Repeated explanation will be omitted.

For example, high-purity copper (Cu), high-purity iron (Fe), high-purity 27 Kel (Ni), copper (Cu) alloy, An example is a 4% material such as a composite wire made of a fine wire with strong elasticity, such as copper (Cu), which is bundled together as a binding material.

By configuring the lead bin 20 with the above shape and material, its deformation strength (yield strength) is smaller than both the bonding strength of the brazing material 12 and the solder 13, and when thermal and mechanical stress is applied, Since plastic deformation occurs in the curved portion and the stress can be alleviated, joint failure at the end of the lead bin can be effectively prevented as in the case of the first embodiment.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

(1) Lead bin 1 that can relieve thermal and mechanical stress
Connection reliability is ensured when surface-mounting the microchip carrier 2 equipped with the microchip carrier 1 on the printed wiring board 1, and the number of pins can be increased, making it possible to realize a super-multi-bin surface mount type PGA. It's possible.

(2) By using a material that can relieve thermal and mechanical stress, even if large and repeated forces are applied to the probe needle 28 and the glove bottle 35, the probe needle 28 and the glove bottle 35 will return to their original shapes, resulting in a longer service life. Furthermore, since the needle 28 and the bottle 35 have a wide elastic range, even if there are variations in the height of the inspection position, the glove needle and the bottle can be brought into contact with each other reliably, improving the reliability of the inspection.

(3) By constructing the lead bin using a material that can alleviate thermal and mechanical stress, it is possible to improve the inspection reliability of the PGA package and extend the life of the lead bin.

(4) By using a material that relieves thermal and mechanical stress in the TAB lead, the bang electrode 53 and lead 52
You can reliably connect with. Furthermore, since there is no need to worry about lead bending during transport of the TAB, the reliability and yield of the semiconductor package can be improved. Furthermore, since the leads absorb thermal and mechanical stress when mounting the TAB on the board, reliable mounting can be ensured without causing breakage or the like.

(5) The lead bin 20 is made of a material having a Young's modulus of 15×1010 Pa or less, and is further curved so that the displacement (ΔX) from the axial direction is 1/2 or more of the diameter (d). As a result, its deformation strength (yield strength) becomes smaller than both the bonding strength of the brazing filler metal 12 and the solder 13, and when thermal and mechanical stress is applied, plastic deformation occurs in the curved part to relieve the stress. Therefore, as in the case of the first embodiment, joint failure at the end of the lead bin can be effectively prevented.

FIG. 1 (4) is a sectional view of a main part showing a semiconductor device according to a tenth embodiment of the present invention. 0 is a front view showing the lead bin of Example 1, the first opening is a sectional view of a main part showing an example of the lead bin of Example 1, FIG. 2 is a perspective view showing the whole of Example 1, Figure (6
) is a cross-sectional view showing a semiconductor device module structure of Example 10, FIG. A perspective view of a semiconductor device, FIG. 3 (Q is a side view of the main part showing the lead of the second embodiment, and FIG. 4 is a sectional view of the main part showing the wafer glover which is the inspection device of the third embodiment of the present invention. , Figure 4 (the seagull is Example 3)
Fig. 5 is a cross-sectional view of the main part showing the Eva prober, which is another test device of Embodiment 3. Embodiment 4 of the invention, TAB (
FIG. 7 is a cross-sectional view of a main part of a semiconductor device according to a fifth embodiment of the present invention, and FIG. 7 (to) is another example of the fifth embodiment. FIG. 7 (Q is a front view showing the lead bin of Example 5.

In the figure, l: Printed wiring board, 2: Microchip carrier, 3.8: Electrode, 4, 21.56: Insulating substrate, 5, 15, 59A: Cap, 6: ... Semiconductor chip, 7... Solder bump, 9... Bonding material, 1
0... Chip capacitor, 11.20... Lead bin, 12... Brazing metal, 13.55... Solder, 14A
...Tungsten wiring, 14B...Multilayer wiring, 16
... Adhesive, 17...: Copper wiring, 18... Wire, 22... Lead 7 = 4, 22 A-° Elevator lead part, 228°°, outer lead part, 24.
...QFP package, 25...ground lead part,
26... Coaxial connector, 27° 43... Printed circuit board, 28... Globe needle, 29... Signal line, 3
0...Ground line, 31...Test electrode, 3
2...Wafer, 33.44...XY table, 34
... Vertically movable bin, 35... Glove bin, 36.
...Through hole, 37.40...Matched state, 38.
... External terminal, 41... Pressure piston, 42... Guide spacer, 45... Ground wiring, 46...
・Signal wiring, 47... electrode for inspection, 5o... bottle,
51... Tape, 52... Lead, 53... Bump electrode, 54... Botting resin, 58... Water channel, 59B... Upper heat radiation fin, 6o... Heat radiation fin, 61. ...Module, 62.63...Wafer prober, 64...Package blower.

No. 7(A) figure 4B No. HB no figure No. 2(A) figure No. 2(B) figure No. 7(A) figure No. 7(B) figure 367-

Claims (1)

[Scope of Claims] 1. A package having inside thereof a semiconductor chip with an integrated circuit formed on its main surface; a wiring board on which wiring and electrodes are provided on the upper surface thereof, and on which the package is mounted; A means for transmitting electrical signals from the semiconductor chip in the package to the wiring board, and includes a lead s whose one end is connected to the package and the other end is connected to the electrode s; and the lead s and the electrode. A semiconductor device comprising a bonding material for bonding a semiconductor device, wherein a deformation strength of the lead s is smaller than a bonding strength of a bonding portion between the lead s and an electrode. 2. The semiconductor device according to claim 1, comprising an insulating substrate for mounting the semiconductor chip, and a cap for sealing. 3. The semiconductor device according to claim 2, further comprising internal wiring formed in the insulated wire substrate for electrically connecting the semiconductor chip and the leads s. 4. The semiconductor device according to claim 2, further comprising an adhesive for bonding the insulating substrate and the cap. 5. The semiconductor device according to claim 1, wherein the lead s is one of tungsten, molybdenum, carbon, and amorphous metal. 6. The semiconductor device according to claim 1, wherein the lead s is made of a transformed pseudoelastic material. 7. The transformed pseudoelastic material is Ti-Ni, Ag-Cd, C
7. The semiconductor device according to claim 6, wherein the semiconductor device is one of u-Al-Ni and Ti-Ni-Fe alloys. 8. The semiconductor device according to claim 1, wherein the lead s is made of an ultra-high tensile strength material or a heat-resistant ultra-high tensile strength material. 9. The semiconductor device according to claim 2, wherein the insulating substrate is made of mullite, and the cap is made of SiC. 10. The semiconductor device according to claim 2, wherein the insulating substrate and the cap are made of glass epoxy. 11. The semiconductor device according to claim 1, wherein the package is made of epoxy resin. 12. A package having inside thereof a semiconductor chip with an integrated circuit formed on its main surface; A wiring board on which wiring and electrodes are provided on the upper surface thereof and on which the package is mounted; and A wiring board from the semiconductor chip in the package to the wiring board. A means for transmitting electrical signals to the substrate, one end of which is connected to the package, and the other end of which is connected to the electrode.
and a bonding material for bonding the lead s and the electrode, wherein the lead s is made of a material with a Young's modulus of 15×10^1^0 Pa or less, and the displacement from the axial direction is A semiconductor device characterized in that the lead s is curved to have a diameter of 1/2 or more. 13. an insulating substrate for mounting the semiconductor chip;
13. The semiconductor device according to claim 12, comprising a cap for sealing. 14. The semiconductor device according to claim 13, further comprising internal wiring formed in the insulating substrate for electrically connecting the semiconductor chip and the leads s. 15. The semiconductor device according to claim 13, further comprising an adhesive for bonding the insulating substrate and the cap. 16. The insulating substrate is made of mullite, and the cap is made of SiC.
A semiconductor device according to claim 13, characterized in that: 17. The semiconductor device according to claim 13, wherein the insulating substrate and the cap are made of glass epoxy. 18. Claim 1, wherein the lead s is one of Cu, Fe, Ni, and Cu alloy.
The semiconductor device according to item 2. 19. The semiconductor device according to claim 12, wherein the lead s is a composite wire. 20. Claim 19, wherein the composite wire is made of Cu or Ni containing carbon fibers.
1. Semiconductor device described in Section 1. 21. A semiconductor chip having an integrated circuit and an external terminal formed on its main surface, a protruding electrode formed on the external terminal, and electrically connected to the protruding electrode and capable of transmitting a signal from inside the semiconductor chip to the outside. A semiconductor device comprising a lead serving as a means for transmitting data, wherein the lead s is made of one of tungsten, molybdenum, carbon, and amorphous metal. 22. The semiconductor device according to claim 21, wherein the lead s is made of a transformed pseudoelastic material. 23. The transformed pseudoelastic material is Ti-Ni, Ag-Cd,
23. The semiconductor device according to claim 22, wherein the semiconductor device is one of Cu-Al-Ni and Ti-Ni-Fe alloys. 24. The semiconductor device according to claim 21, wherein the lead s is made of an ultra-high tensile strength material or a heat-resistant ultra-high tensile strength material. 25, a plurality of packages s each having inside thereof a semiconductor chip having an integrated circuit formed on its main surface; a wiring board on which wiring and electrodes s are formed on the upper surface of the package s; and a wiring board for mounting the packages s; means for transmitting electrical signals from the semiconductor chip inside to the wiring board, one end of which is connected to the package s, the other end of which is connected to the electrode s; a first bonding material for bonding the electrodes; a sealing body for simultaneously sealing the plurality of packages s therein; and a second bonding material for bonding the wiring board and the sealing body. A semiconductor device comprising a bonding material, wherein a deformation strength of the lead s is smaller than a bonding strength of a bonding portion between the lead s and an electrode. 26, an insulating substrate for mounting the semiconductor chip;
26. The semiconductor device according to claim 25, comprising a cap for sealing. 27. The semiconductor device according to claim 25, further comprising internal wiring formed in the insulating substrate for electrically connecting the semiconductor chip and the leads s. 28. The semiconductor device according to claim 26, further comprising an adhesive for bonding the insulating substrate and the cap. 29. The semiconductor device according to claim 1, wherein the lead s is one of tungsten, molybdenum, carbon, and amorphous metal. 30. The semiconductor device according to claim 1, wherein the lead s is made of a transformed pseudoelastic material. 31. The transformed pseudoelastic material is Ti-Ni, Ag-Cd,
32. The semiconductor device according to claim 1, wherein the lead s is made of one of Cu-Al-Ni and Ti-Ni-Fe alloy. The semiconductor device according to claim 1, which is a tensile material. 33. The insulating substrate is made of mullite, and the cap is made of SiC.
A semiconductor device according to claim 1, characterized in that: 34. The semiconductor device according to claim 1, wherein the insulating substrate and the cap are made of glass epoxy. 35. The semiconductor device according to claim 1, wherein the package is made of epoxy resin. 36. The semiconductor device according to claim 25, further comprising a heat radiator located between the package s and the sealing body and closely connected. 37. The semiconductor device according to claim 36, wherein the heat sink is made of a Cu-Mo alloy. 38. The semiconductor device according to claim 25, wherein the sealing body is made of a Cu-Mo alloy. 39. The semiconductor device according to claim 25, comprising a plurality of water channels provided within the sealing body.