JPH0367177A - Semiconductor acceleration sensor - Google Patents

Semiconductor acceleration sensor

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Publication number
JPH0367177A
JPH0367177A JP20418789A JP20418789A JPH0367177A JP H0367177 A JPH0367177 A JP H0367177A JP 20418789 A JP20418789 A JP 20418789A JP 20418789 A JP20418789 A JP 20418789A JP H0367177 A JPH0367177 A JP H0367177A
Authority
JP
Japan
Prior art keywords
movable part
acceleration
silicon substrate
semiconductor chip
acceleration sensor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20418789A
Other languages
Japanese (ja)
Other versions
JP2730201B2 (en
Inventor
Tetsuo Fujii
哲夫 藤井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Priority to JP1204187A priority Critical patent/JP2730201B2/en
Publication of JPH0367177A publication Critical patent/JPH0367177A/en
Application granted granted Critical
Publication of JP2730201B2 publication Critical patent/JP2730201B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To prevent the destruction of a movable part when excessive acceleration is impressed by bonding a semiconductor chip on a pedestal through a bump in a state where the movable part of the semiconductor chip is opposed to the pedestal. CONSTITUTION:The movable part is constituted of a beam part 12 having a piezoresistance layer 4 and an overlap part 13 on one side of the semiconductor chip. The semiconductor chip is bonded on a silicon substrate 15 through the bumps 9 and 19 with specified height in a state where the movable part is opposed to the substrate 15. According to the piezo-electric effect of the resistance 4 by the acceleration when the acceleration is impressed, a signal in accordance with the magnitude of the impressed acceleration is transmitted to the IC circuit of the substrate 15 through the bumps 9 and 19 and outputted to the outside from an electrode part 18 after performing processing for the signal such as amplification. In the case of impressing the excessive acceleration, a stopper functions to the movable part up and down, from right to left and back and forth, thereby preventing the destruction of the movable part.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、半導体加速度(振動〉センサ゛に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor acceleration (vibration) sensor.

[従来技術及び課題] 従来、半導体加速度センサの感度を上げるために周辺部
のシリコンを重りとして使用しているものがあるが、電
気的な接続を取るためのワイヤーボンディングの線が長
くなってしまい、大きな加速度を検出する時にワイヤが
垂れ下がり接触したり切れたりする場合がある。又、重
りを大きくした加速度センサでは過大な加速篩が加わっ
た時に梁部が破壊するためにオイル中に入れてダンプさ
せる等の対策を施していたが設計の自由度が低く、又コ
ストのかかるものになっている。
[Prior art and issues] Conventionally, some semiconductor acceleration sensors have used peripheral silicon as a weight to increase their sensitivity, but the wire bonding lines for making electrical connections become long. When detecting large accelerations, the wires may hang down and touch or break. In addition, in the case of acceleration sensors with a large weight, the beams break when excessive acceleration is applied, so countermeasures such as dumping them in oil have been taken, but this reduces the degree of freedom in design and is costly. It has become a thing.

この発明の目的は、ワイヤ−ボンディングのワイヤの接
触等を回避するとともに、過大な加速度が加わった時に
容易に可動部の破壊を防止することができる半導体加速
度センサを提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor acceleration sensor that can avoid contact between wires during wire bonding and easily prevent damage to a movable part when excessive acceleration is applied.

[課題を解決するための手段] この発明は、半導体チップの片面においてピエゾ抵抗を
有する梁部と重り部とからなる可動部を形成し、この半
導体チップの可動部が基台に対向する状態で所定高さの
バンプを介して当該半導体チップを基台上にボンディン
グし、前記基台を過大な加速度が加わった際の前記可動
部のストッパとしてなる半導体加速度センサをその要旨
とするものであるっ [作用1 バンプにて電極の取出しができるとともに、過大な加速
度が加わった際に、基台が半導体チップの可動部のスト
ッパとして動(。
[Means for Solving the Problems] This invention forms a movable part consisting of a beam part having piezoresistance and a weight part on one side of a semiconductor chip, and in a state where the movable part of this semiconductor chip faces a base. The gist of the sensor is a semiconductor acceleration sensor in which the semiconductor chip is bonded to a base via bumps of a predetermined height, and the base serves as a stopper for the movable part when excessive acceleration is applied. [Function 1] The electrode can be taken out using the bump, and when excessive acceleration is applied, the base moves as a stopper for the movable part of the semiconductor chip.

[実施例] 以下、この発明を具体化した一実施例を図面に従って説
明する。
[Example] An example embodying the present invention will be described below with reference to the drawings.

第1図には本実施例の半導体加速度センサの断面を示し
、第2図には第1図におけるA−A断面を示す。ざらに
、第3〜第7図にはその製造工程を示す。
FIG. 1 shows a cross section of the semiconductor acceleration sensor of this embodiment, and FIG. 2 shows a cross section taken along line AA in FIG. Briefly, the manufacturing process is shown in FIGS. 3 to 7.

第3図において、例えば、N型で5〜20Ω・cmの(
100)シリコン基板1に熱酸化膜2を0゜1〜1μm
形成する。このシリコン基板1に対しもう1枚の同様な
N型シリコン基板3を、いわゆるウェハ直接接合で80
0〜1100℃で1時間程度の熱処理により接合し、ざ
らに、N型シリコン基板3を必要な厚さに鏡面研磨する
。そして、所定領域にボロン不純物を、例えばイオン注
入で導入しP ピエゾ抵抗層4を第2図に示すように合
計16個形成する。さらに、必要ならば半導体素子を形
成し、IC回路部等をN型シリコン基板3内に形成し、
アルミ等での配線層を形成する。
In Fig. 3, for example, N type (5 to 20 Ωcm) (
100) Spread thermal oxide film 2 on silicon substrate 1 with a thickness of 0°1 to 1 μm
Form. Another similar N-type silicon substrate 3 is attached to this silicon substrate 1 by so-called wafer direct bonding.
They are bonded by heat treatment at 0 to 1100[deg.] C. for about one hour, and the N-type silicon substrate 3 is roughly mirror-polished to a required thickness. Then, a boron impurity is introduced into a predetermined region by, for example, ion implantation to form a total of 16 P2 piezoresistive layers 4 as shown in FIG. Furthermore, if necessary, a semiconductor element is formed, an IC circuit section, etc. is formed in the N-type silicon substrate 3,
Form a wiring layer of aluminum or the like.

尚、第3図おいて、3aは熱酸化膜である。In addition, in FIG. 3, 3a is a thermal oxide film.

次に、シリコン基板1にエツチングにて所定の深さの第
1の凹部5を中央の重り支持部6を除き環状に形成する
。このエツチングの際に、KOH等のアルカリエツチン
グ液又は弗硝酸系のエツチング液が使用される。その結
果、第3図に示すようになる。
Next, a first recess 5 having a predetermined depth is formed in the silicon substrate 1 by etching, excluding the central weight support portion 6, in an annular shape. During this etching, an alkaline etching solution such as KOH or a hydrofluoric acid based etching solution is used. The result is as shown in FIG.

引き続き、第4図に示すように、第1の凹部5内でのシ
リコン基板1にエツチングにて熱酸化膜2に至る環状の
第2の凹部7aと、重り支持部6を除き環状の第2の凹
部7bを形成する。この場合、エツチングは熱酸化膜2
において自動的に停止させることができる。
Subsequently, as shown in FIG. 4, the silicon substrate 1 in the first recess 5 is etched to form a second annular recess 7a extending to the thermal oxide film 2 and a second annular recess excluding the weight support 6. A recess 7b is formed. In this case, etching is a thermal oxide film 2
It can be stopped automatically at any time.

続いて、第5図に示ずように、シリコン基板8上に前記
シリコン基板1を配置し、両者1.8を400〜450
℃の低温でのウェハ直接接合で゛接合する。この際、シ
リコン基板8の代りに、シソコンと熱膨張係数がほぼ等
しいパイレックスガラス(商標名)を用い、陽極接合で
接合してもよい。
Subsequently, as shown in FIG. 5, the silicon substrate 1 is placed on the silicon substrate 8, and both 1.8
Bonding is performed by direct wafer bonding at a low temperature of ℃. At this time, instead of the silicon substrate 8, Pyrex glass (trade name) having approximately the same coefficient of thermal expansion as SiSocon may be used and bonded by anodic bonding.

そして、第2図及び第5図に示すように7リツプチツプ
エ程によりシリコン基板3上にピエゾ抵抗1苦4と電気
的に接続され所定高さを有する4つのノリツブチップバ
ンプ9を形成する。同時に、シリコン基板3の外周部に
二重の環状の所定高さを有するフリップチップリング1
0を形成する。尚、フリップチップバンプ9及びフリッ
プチップリング10は例えばAI配線層上にTi、Ni
層を形成し、メツキにて所定の高さのQuの柱状部を形
成し、ハンダ層をそのまわりに形成することにより形成
される。
Then, as shown in FIGS. 2 and 5, four knob chip bumps 9 having a predetermined height and electrically connected to the piezoresistors 1 and 4 are formed on the silicon substrate 3 by seven lip chipping steps. At the same time, a flip chip ring 1 having a double annular shape and a predetermined height is attached to the outer periphery of the silicon substrate 3.
form 0. Incidentally, the flip chip bump 9 and the flip chip ring 10 are made of Ti, Ni, etc. on the AI wiring layer, for example.
It is formed by forming a layer, plating to form a Qu columnar portion of a predetermined height, and forming a solder layer around it.

次に、第2図及び第6図に示すように半導体加速度セン
サの可動部を形成するために前記第2の凹部7aに連通
する環状の第3の凹部11aを形成するとともに、4つ
の梁部12を除き第2の凹部7bに連通ずる第3の凹部
11bを形成する。
Next, as shown in FIGS. 2 and 6, an annular third recess 11a communicating with the second recess 7a is formed to form a movable part of the semiconductor acceleration sensor, and four beam parts are formed. 12, a third recess 11b communicating with the second recess 7b is formed.

その結果、重り部13、重り支持部6、ピエゾ抵抗を有
する梁部12及びそれらの周辺部にストッパ部14が形
成される。
As a result, stopper portions 14 are formed in the weight portion 13, the weight support portion 6, the beam portion 12 having piezoresistance, and their peripheral portions.

一方、第7図に示すように基台となるシリコン基板15
に半導体素子、コンタクト、配線層等を有するIC回路
部(図示略)を形成するとともに、電気特性等の調整用
のトリミング抵抗16、外部取り出し配線層17、外部
取り出し電極部18を形成する。さらに、シリコン基板
15上に第2のフリップチップバンプ19、第2のフリ
ップチップリング20を形成する。この第2のフリップ
チップバンプ19及び第2のフリップチップリング20
の位置は、第2図及び第6図に示すセンリーチツブのフ
リップチップバンプ9及びフリップチップリング10に
対応する位置となっている。
On the other hand, as shown in FIG.
An IC circuit section (not shown) having semiconductor elements, contacts, wiring layers, etc. is formed therein, and a trimming resistor 16 for adjusting electrical characteristics, an external wiring layer 17, and an external extraction electrode section 18 are formed. Further, a second flip chip bump 19 and a second flip chip ring 20 are formed on the silicon substrate 15. This second flip chip bump 19 and second flip chip ring 20
The position corresponds to the flip chip bump 9 and flip chip ring 10 of the sentry tube shown in FIGS. 2 and 6.

そして、第6図に示すセンリーチツブと第7図で示すシ
リコン基板15をハンダを介して接合することにより第
1図に示すように、半導体加速度センサの製造が完了す
る。その結果、フリップチップバンプ9と第2のフリッ
プチップバンプ19とが接合され、ピエゾ抵抗層4とシ
リコン基板15側に設けたIC回路とが電気的に接続さ
れる。又、フリップチップリング10と第2のフリップ
チップリング20と序接合され、そのフリップチップリ
ング10.20の内側においては気密封止された状態と
なる。
Then, by joining the sensor chip shown in FIG. 6 and the silicon substrate 15 shown in FIG. 7 through solder, the manufacture of the semiconductor acceleration sensor is completed as shown in FIG. 1. As a result, the flip chip bump 9 and the second flip chip bump 19 are bonded together, and the piezoresistive layer 4 and the IC circuit provided on the silicon substrate 15 side are electrically connected. Further, the flip chip ring 10 and the second flip chip ring 20 are joined together, and the inside of the flip chip ring 10.20 is hermetically sealed.

このように製造された加速度センサにおいては、可動部
(梁部122重り部13〉の加速度(振動〉による上下
方向の動きに対してはシリコン基板8及びシリコン基板
15が、又、重り支持部6の捩じれ等に伴う左右及び前
後方向の動きに対してはストッパ部14がス1〜ツバと
して動く。即ち、可動部の司動範囲が、エツチングによ
る第1の凹部5の深さ11、第2の凹部7a及び第3の
凹部11aの幅部12、及びフリップチップバンプ9.
19及びフリップチップリング10.20(特に、メツ
キで形成したCDの柱状部)の高さで規定される距離1
3により決定される。つまり、上下方向に対しては距離
、l!1.u3が、又、左右及び前後方向に対しては距
離B2を任意に設定することができる。又、本実施例に
おいては対向するフリップチップバンプ等の両方にメツ
キで形成したCUの柱状部で形成される距離13を設定
したが、片方のみにCuの柱状部を形成してもよい。さ
らに、本実施例ではハンダ接続によるフリップチップバ
ンプで説明したが、熱圧着等による他のバンプ構造でも
可能である。
In the acceleration sensor manufactured in this way, the silicon substrate 8 and the silicon substrate 15 act against the vertical movement due to acceleration (vibration) of the movable part (beam part 122 weight part 13), and the weight support part 6 The stopper part 14 moves as a stopper part 1 to a collar in response to movements in the left-right and front-rear directions due to twisting, etc. In other words, the driving range of the movable part is the depth 11 of the first recess 5 due to etching, the second width portion 12 of the recess 7a and the third recess 11a, and the flip chip bump 9.
19 and the distance 1 defined by the height of the flip chip ring 10.20 (especially the columnar part of the CD formed by plating)
3. In other words, in the vertical direction, the distance is l! 1. u3, and distance B2 can be arbitrarily set in the left-right and front-back directions. Further, in this embodiment, the distance 13 is set by the columnar portions of CU formed by plating on both of the opposing flip chip bumps, etc., but the columnar portions of Cu may be formed on only one side. Furthermore, although this embodiment has been described using a flip-chip bump formed by solder connection, other bump structures formed by thermocompression bonding or the like may also be used.

加速度検出時においては、同センサに加速度(振動)が
加わるとその加速度にてピエゾ抵抗層4のピエゾ効果に
より印加された加速度の大きさに応じた信号が7リツプ
チツプバンプ9,19を介してシリコン基板15のIC
回路に送られ、この回路にて増輻等の信3処理が行なわ
れ、外部取出し電極部18から外部に出力される。又、
半導体加速度センサに過大な加速度(振動〉が印り口さ
れた場合には、可動部(梁部122重り部13)に対し
上下、左右、前後方向においてストッパが機能してその
破壊が防止される。
During acceleration detection, when acceleration (vibration) is applied to the sensor, a signal corresponding to the magnitude of the applied acceleration is transmitted via the seven lip chip bumps 9 and 19 due to the piezo effect of the piezo resistance layer 4. IC on silicon substrate 15
The signal is sent to a circuit, where it undergoes signal 3 processing such as amplification, and is output to the outside from the external electrode section 18. or,
When excessive acceleration (vibration) is applied to the semiconductor acceleration sensor, stoppers function in the vertical, horizontal, and longitudinal directions for the movable part (beam part 122 weight part 13) to prevent its destruction. .

このように本実施例においては、半導体チップの片面に
おいてピエゾ抵抗層4を有する梁部12と重り部13と
からなる可動部を形成し、この半導体チップの可動部が
シリコン基板15(基台)に対向する状態で所定高さの
フリップチップバンプ9,19を介して半導体チップを
シリコン基板15上にボンディングし、シリコン基板1
5を過大な加速度が加わった際の可動部のストッパとし
た。その結果、フリップチップバンプ9,19にて電極
の取り出しができるとともにシリコン基板15をストッ
パとして使用でき、さらにフリップチップバンプ9,1
9の高さを調整することにより可動部(5A部122重
り部13)とシリコン基板15との距fiN3を最適設
fft ′gることかできる。
As described above, in this embodiment, a movable part consisting of the beam part 12 having the piezoresistive layer 4 and the weight part 13 is formed on one side of the semiconductor chip, and the movable part of the semiconductor chip is the silicon substrate 15 (base). A semiconductor chip is bonded onto the silicon substrate 15 through flip chip bumps 9 and 19 of a predetermined height while facing the silicon substrate 1.
5 was used as a stopper for the movable part when excessive acceleration is applied. As a result, the electrodes can be taken out at the flip chip bumps 9, 19, and the silicon substrate 15 can be used as a stopper.
By adjusting the height of 9, the distance fiN3 between the movable part (5A part 122 weight part 13) and the silicon substrate 15 can be optimally set.

よって、ワイヤーボンディングのワイヤの接触等を回避
するとともに、過大な加速度が加わった時に容易に可動
部の破壊を防止することができることとなる。又、フリ
ップチップリング10.20によりチップの確実な支持
ができるとともに気密封止ができる。さらに、可動部の
外周部にストッパ部14を距離12だけ離間して配置し
たので、重り支持部6の捩じれ等に伴う左右方向及び前
後方向の動きに対してはストッパ部14がストッパとし
て機能する。
Therefore, it is possible to avoid contact with the wires of wire bonding, and to easily prevent destruction of the movable part when excessive acceleration is applied. Additionally, the flip chip rings 10 and 20 provide reliable support for the chip and also provide hermetic sealing. Furthermore, since the stopper part 14 is arranged at a distance of 12 on the outer periphery of the movable part, the stopper part 14 functions as a stopper against movement in the left-right direction and front-rear direction due to twisting of the weight support part 6, etc. .

尚、この発明は上記実施例に限定されるものではなく、
例えば、第8図及び第9図(第8図のB−B断面)に示
ダ−ように、いわゆるハイブリッドICに用いられるア
ルミナ基板21に厚膜印刷やsm層により導体樗を形成
するとともに、シリコン基板23にIC回路22等を形
成し、これらの基板21.23を上記実施例と同様に配
置してもよい。この際に、熱膨張係数をシリコンと同等
な基板材料(例えば、アビ1〜日ン(商標名)等)を用
いれば広い温度範囲にわたって使用することもできる。
Note that this invention is not limited to the above embodiments,
For example, as shown in FIGS. 8 and 9 (B-B cross section in FIG. 8), a conductor is formed on an alumina substrate 21 used in a so-called hybrid IC by thick film printing or an SM layer, and The IC circuit 22 and the like may be formed on the silicon substrate 23, and these substrates 21 and 23 may be arranged in the same manner as in the above embodiment. In this case, if a substrate material having a coefficient of thermal expansion equivalent to that of silicon (for example, Abi 1-Sun (trade name), etc.) is used, it can be used over a wide temperature range.

さらに、第10図、第11図(第10図のC−C断面)
に示すように、外周部のノリツブチップリング25a、
25bを4つに分割したものとし、当該センサがオイル
中に配置される。そして、各フリップチップリング25
a、25b間の隙間及び基台26に設けた連通孔27を
介してオイルを出入りさせてダンプ機能をもたせてもよ
い。尚、この実施例では、重り部13に対し平行な梁部
24が2組形成されている。
Furthermore, Figures 10 and 11 (C-C cross section in Figure 10)
As shown in FIG.
25b is divided into four parts, and the sensor is placed in oil. And each flip chip ring 25
A dumping function may be provided by allowing oil to enter and exit through the gap between a and 25b and through a communication hole 27 provided in the base 26. In this embodiment, two sets of beam parts 24 are formed parallel to the weight part 13.

さらには、第12図、第13図(第12図のD−D断面
)に示すように、梁部28を1つとしく即ち、片持ら梁
とし)、外周部のフリップデツプバンプ29a、29b
にピエゾ抵抗層4の電気接続機能とチップ支持機能をも
たせてもよい。
Furthermore, as shown in FIGS. 12 and 13 (D-D cross section in FIG. 12), the beam portion 28 is made into one (ie, cantilevered beam), and the flip depth bump 29a on the outer periphery, 29b
The piezoresistive layer 4 may have an electrical connection function and a chip support function.

[発明の効果] 以上詳述したようにこの発明によれば、ワイヤーボンデ
ィングのワイヤの接触等を回避するとともに、過大な加
速度が加わった時に容易に可動部の破壊を防止すること
ができる優れた効果を発揮する。
[Effects of the Invention] As detailed above, according to the present invention, it is possible to avoid contact between wires in wire bonding, and to easily prevent breakage of movable parts when excessive acceleration is applied. be effective.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本実施例の半導体加速度センサの断面図、第2
図は第1図のA−A断面図、第3図は半導体加速度セン
サの製造工程を説明するための断面図、第4図は半導体
加速度センソーの製造工程を説明するための断面図、第
5図は半導体加速度センサの製造工程を説明するための
断面図、第6図は半導体加速度センソーの製造工程を説
明するための断面図、第7図は半導体11JO速度セン
サの製造工程を説明するための断面図、第8図は別例の
半導体加速度センサの断面図、第9図【よ第8図のB−
B断面図、第10図は他の別例の半導体加速度センサの
断面図、第11図は第10図のC−C断面図、第12図
は他の別例の半導体加速度センサの断面図、第13図は
第12図のD−D断面図である。 4はピエゾ抵抗層、9はフリップデツプバンプ、12は
梁部、13は重り部、15は基台としてのシリコン基板
Figure 1 is a cross-sectional view of the semiconductor acceleration sensor of this embodiment, Figure 2
The figures are a sectional view taken along the line A-A in FIG. 1, FIG. 3 is a sectional view for explaining the manufacturing process of a semiconductor acceleration sensor, FIG. The figure is a cross-sectional view for explaining the manufacturing process of a semiconductor acceleration sensor, FIG. 6 is a cross-sectional view for explaining the manufacturing process of a semiconductor acceleration sensor, and FIG. 7 is a cross-sectional view for explaining the manufacturing process of a semiconductor 11JO speed sensor. 8 is a sectional view of another example of a semiconductor acceleration sensor, and FIG. 9 is a cross-sectional view of another example of a semiconductor acceleration sensor.
B sectional view, FIG. 10 is a sectional view of another example of the semiconductor acceleration sensor, FIG. 11 is a sectional view taken along the line CC in FIG. 10, and FIG. 12 is a sectional view of another example of the semiconductor acceleration sensor. FIG. 13 is a sectional view taken along line DD in FIG. 12. 4 is a piezoresistive layer, 9 is a flip dip bump, 12 is a beam portion, 13 is a weight portion, and 15 is a silicon substrate as a base.

Claims (1)

【特許請求の範囲】[Claims] 1、半導体チップの片面においてピエゾ抵抗を有する梁
部と重り部とからなる可動部を形成し、この半導体チッ
プの可動部が基台に対向する状態で所定高さのバンプを
介して当該半導体チップを基台上にボンディングし、前
記基台を過大な加速度が加わつた際の前記可動部のスト
ッパとしてなる半導体加速度センサ。
1. A movable part consisting of a beam part having piezoresistance and a weight part is formed on one side of the semiconductor chip, and the semiconductor chip is moved through a bump of a predetermined height with the movable part of the semiconductor chip facing the base. is bonded onto a base, and the semiconductor acceleration sensor serves as a stopper for the movable part when excessive acceleration is applied to the base.
JP1204187A 1989-08-07 1989-08-07 Semiconductor acceleration sensor Expired - Lifetime JP2730201B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1204187A JP2730201B2 (en) 1989-08-07 1989-08-07 Semiconductor acceleration sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1204187A JP2730201B2 (en) 1989-08-07 1989-08-07 Semiconductor acceleration sensor

Publications (2)

Publication Number Publication Date
JPH0367177A true JPH0367177A (en) 1991-03-22
JP2730201B2 JP2730201B2 (en) 1998-03-25

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Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2730201B2 (en)

Cited By (16)

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JPH0526901A (en) * 1991-07-19 1993-02-05 Fujikura Ltd Semiconductor acceleration sensor
JP2003521184A (en) * 2000-01-27 2003-07-08 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Electroacoustic transducer having a moving coil and an elastic holding element for the connecting lead of the moving coil
DE19616014B4 (en) * 1996-04-23 2006-04-20 Robert Bosch Gmbh Method for producing semiconductor devices having micromechanical structures
WO2006049004A1 (en) * 2004-11-08 2006-05-11 Hitachi Metals, Ltd. Acceleration sensor
JP2006189418A (en) * 2004-12-06 2006-07-20 Denso Corp Sensor device
JP2007155374A (en) * 2005-12-01 2007-06-21 Oki Electric Ind Co Ltd Semiconductor acceleration sensor and its manufacturing method
JP2008244317A (en) * 2007-03-28 2008-10-09 Oki Electric Ind Co Ltd Semiconductor apparatus
WO2008126409A1 (en) * 2007-04-10 2008-10-23 Panasonic Corporation Acceleration sensor and method for manufacturing the same
WO2009044522A1 (en) * 2007-10-01 2009-04-09 Panasonic Corporation Inertia sensor
US7674638B2 (en) 2005-11-25 2010-03-09 Panasonic Electric Works Co., Ltd. Sensor device and production method therefor
US8067769B2 (en) * 2005-11-25 2011-11-29 Panasonic Electric Works Co., Ltd. Wafer level package structure, and sensor device obtained from the same package structure
US8080869B2 (en) 2005-11-25 2011-12-20 Panasonic Electric Works Co., Ltd. Wafer level package structure and production method therefor
US8089144B2 (en) 2008-12-17 2012-01-03 Denso Corporation Semiconductor device and method for manufacturing the same
US8156804B2 (en) 2006-10-18 2012-04-17 Denso Corporation Capacitive semiconductor sensor
US8269290B2 (en) 2008-09-15 2012-09-18 Denso Corporation Semiconductor device including a plurality of semiconductor substrates and method of manufacturing the same
US8519493B2 (en) 2003-03-27 2013-08-27 Denso Corporation Semiconductor device having multiple substrates

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Publication number Priority date Publication date Assignee Title
JPH0212663U (en) * 1988-07-06 1990-01-26

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0212663U (en) * 1988-07-06 1990-01-26

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2507840B2 (en) * 1991-07-19 1996-06-19 株式会社フジクラ Semiconductor acceleration sensor
JPH0526901A (en) * 1991-07-19 1993-02-05 Fujikura Ltd Semiconductor acceleration sensor
DE19616014B4 (en) * 1996-04-23 2006-04-20 Robert Bosch Gmbh Method for producing semiconductor devices having micromechanical structures
JP2003521184A (en) * 2000-01-27 2003-07-08 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Electroacoustic transducer having a moving coil and an elastic holding element for the connecting lead of the moving coil
US8519493B2 (en) 2003-03-27 2013-08-27 Denso Corporation Semiconductor device having multiple substrates
KR100906573B1 (en) * 2004-11-08 2009-07-10 히타치 긴조쿠 가부시키가이샤 Acceleration sensor
WO2006049004A1 (en) * 2004-11-08 2006-05-11 Hitachi Metals, Ltd. Acceleration sensor
US7716984B2 (en) 2004-11-08 2010-05-18 Hitachi Metal Ltd. Acceleration sensor device having piezo-resistors measuring acceleration
JP2006189418A (en) * 2004-12-06 2006-07-20 Denso Corp Sensor device
US7674638B2 (en) 2005-11-25 2010-03-09 Panasonic Electric Works Co., Ltd. Sensor device and production method therefor
US8067769B2 (en) * 2005-11-25 2011-11-29 Panasonic Electric Works Co., Ltd. Wafer level package structure, and sensor device obtained from the same package structure
US8080869B2 (en) 2005-11-25 2011-12-20 Panasonic Electric Works Co., Ltd. Wafer level package structure and production method therefor
JP2007155374A (en) * 2005-12-01 2007-06-21 Oki Electric Ind Co Ltd Semiconductor acceleration sensor and its manufacturing method
US8156804B2 (en) 2006-10-18 2012-04-17 Denso Corporation Capacitive semiconductor sensor
JP2008244317A (en) * 2007-03-28 2008-10-09 Oki Electric Ind Co Ltd Semiconductor apparatus
WO2008126409A1 (en) * 2007-04-10 2008-10-23 Panasonic Corporation Acceleration sensor and method for manufacturing the same
WO2009044522A1 (en) * 2007-10-01 2009-04-09 Panasonic Corporation Inertia sensor
US8269290B2 (en) 2008-09-15 2012-09-18 Denso Corporation Semiconductor device including a plurality of semiconductor substrates and method of manufacturing the same
US8089144B2 (en) 2008-12-17 2012-01-03 Denso Corporation Semiconductor device and method for manufacturing the same
US8169082B2 (en) 2008-12-17 2012-05-01 Denso Corporation Semiconductor device and method for manufacturing the same

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