JPH0364183A - Video signal converter - Google Patents

Abstract

PURPOSE:To observe any part of an original video image by varying a position of a video image to be displayed on a receiver while being selected from the video image of an inputted video signal when the video signal is converted and displayed on the receiver having a different aspect ratio from that of the video image sent from the video signal. CONSTITUTION:A video signal is inputted to an input video signal processing circuit 3, in which a synchronizing signal is separated and the signal is digitized, and a write control signal generating circuit 4 generates a write control signal controlling to which range of data in the video image is to be written in a memory 6 based on the synchronizing signal as a reference and the control signal is inputted to a delay circuit 5. Even which range of data in the video image is written in the memory 6 by adjusting the delay of the delay circuit 5. The data in the range displayed on the receiver is stored in the memory 6 among the video data outputted from the input video signal processing circuit 3. Thus, even which part of the original video image is observed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video signal conversion device, and more particularly to a video signal conversion device that involves conversion of the aspect ratio of a video image transmitted by a video signal.

[Conventional technology]

FIG. 8 is a block diagram of a conventional video signal conversion device, FIG. 9 is an explanatory diagram showing the position of the video displayed on the receiver during video signal conversion involving conventional aspect ratio conversion, and FIG. In FIG. 8, which is a diagram showing the timing of the video signal and the write control signal of the video signal converter, l is an input terminal for the video signal to be converted, 3 is an input video signal processing circuit, and its configuration is as follows: It varies depending on the format of the video signal, but
It performs signal processing corresponding to the input video fIA signal format, synchronization separation, analog/digital conversion (hereinafter referred to as MU/D conversion), etc. ↓ is write control signal generation circuit, 6 is memory, 1
8 is a write address counter, 8 is a read address counter, and 9 is an output video signal encoding circuit, which processes the output signal into an output signal compatible with the receiver. IO is an output terminal for the converted video signal. In FIG. 9, ml is the video transmitted by the video signal to be converted, 3 is the display screen of the receiver to be displayed, and 12 is the video @11 that is displayed on the display screen 13 of the receiver. 0 first which is the range of the image
In Figure 0, 14 is a synchronizing signal part, 16 is a video data part, l'7 is a video information part displayed on the receiver during one scanning line, and 18 is a write control signal. .

The aspect ratio of the video signal @11 and the display painter 3 are different, so b1 video fI! 11 is vertical:horizontal:1
, the display screen 13 of the receiver is man. When displaying the image 11 on the display screen 13, since the main information of the image is in the central part, in this case, the vertical direction of the image 12 and the display screen 13 should be aligned and the shaded area 12 in the figure should be selected. This operation will be explained using the block diagram shown in FIG. A video signal input to the input terminal 1 is processed in an input video signal processing circuit 3 according to the input video signal, separation of a synchronization signal, and A/R conversion of the signal.

The write control signal generation circuit number generates a write control signal to the memory from the separated synchronization signal.

The write-in # signal is the input original image fI shown in Figure 9.
This occurs for each horizontal scan at a timing corresponding to the data corresponding to the range 12@ displayed on the receiver in the center of the IA 11. To explain this in relation to the video signal, in FIG. 1O, the write control signal 18. is 4 B in the central part of the video information portion 16 and corresponds to 170, and as a result of b1, the write control signal 18. The video data stored in the memory 6 and the write address counter 〒 are read out by the read address counter 8 and input to the output video signal encoding circuit 9 so as to store only video information. In the output video signal encoding circuit 9, the video data is subjected to signal processing corresponding to the video signal format of the receiver, digital/analog conversion (hereinafter referred to as D/A conversion),
A synchronizing signal is generated and superimposed, and is output from the terminal 1. [Problems to be solved by the invention] In the conventional video signal conversion device that involves video aspect ratio conversion,
The image displayed on the receiver after conversion is fixedly selected from the center of the original image within the displayable range of the receiver, and images outside the center of the original image are discarded and cannot be viewed after conversion. The present invention has been made to solve the above problems, and it is possible to arbitrarily select the position of the image displayed on the display screen of the receiver from the original image. The object of the present invention is to obtain a video signal conversion device that allows viewing of images other than the center of an original image.

[Means to solve the problem]

The video signal conversion device according to claim 1 of the present invention processes an input video signal suitable for display, separates a synchronization signal, and
Input video signal processing means for performing D conversion, storage means for storing digitized video data, and control for arbitrarily selecting video data within the range to be displayed on the receiver from the digitized video data and storing it in the storage means. The apparatus is equipped with means for processing the read video data, such as storage means, for signal processing, D/A conversion, and generation and superimposition of a synchronization signal into a video signal format compatible with a receiver for displaying the video data.

The video signal conversion device according to claim 2 of the present invention processes an input video signal suitable for display, separates a synchronization signal, and performs direct/
13 input video signal processing means for performing conversion, storage means for storing digitized video data, and arbitrarily selecting video data within the range to be displayed on the receiver from the video data stored in the storage means and reading the video data. The apparatus is equipped with control means, storage means, and means for signal processing, D/person conversion, and generation/superimposition of a synchronization signal into a video signal format compatible with a receiver displaying the read video data. .

[Effect]

The video signal conversion device according to the present invention converts a video signal and converts it into a video signal. ! ! ! ! In a video signal conversion device that allows images to be displayed on a receiver with a different aspect ratio, the range of the video that is selected from the video of the input video signal and displayed on the receiver is variable. It is possible to view any part of the video.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

In order to facilitate understanding of the operation of the video signal conversion device according to the present invention, FIG. 2 shows an example of video display during conversion by the video signal conversion device. In FIG. 2, 11 is the original image, l! a, lj! b, 12o is the video range displayed on the edge.

Conventionally, the image shown in Fig. 9(&) was changed to ``Fig. 9(b).
In this embodiment, the vertical direction of the screen is made to match and the video is selected.

First, the central range 1b shown in FIG. 2 (13) is normally selected and displayed. When displaying a left-aligned image of the original image, the range 11Aa in FIG. 2 (&) is selected and displayed. Conversely, if you want to display an image that is aligned to the right, use the J! Diagram C
a) Select and display the 01go range. It goes without saying that the selection range is not limited to the three cases shown here, but may also be intermediate between these cases.

Next, a video signal conversion device according to an embodiment of the present invention according to claim 1 will be described. In FIG. 1, l undergoes a transformation l1lI! An image signal input terminal; 2 is a display position control signal input terminal; 3 is an input video signal circuit; the configuration thereof varies depending on the format of the input video signal; Performs synchronization separation, Mu/D conversion, etc. 4 is a data write control signal generation circuit, 5 is a delay circuit, 6 is a memory, 〒 is a write address counter, 8 is a read address counter, 9 is an output video signal encoding circuit, which processes the output signal to be compatible with the receiver. do. IO is an output terminal for the converted video signal. In FIG. 3, 4 is a video signal, 15 is a synchronization signal portion, 16 is a video data portion, and 17m.

The video information portions displayed on the receiver in the 1'Fb and 1'Fabal scanning lines, 18m, 18b, and lee are control signals for writing video data into the memory.

The image of the input video signal is shown in FIG. 8 (image 1X shown in 0,
The display screen of the receiver is a display screen 13 as shown in FIG. 9(1). IK input from input terminal 1! The image signal is processed by the input video signal processing circuit 3, which separates the synchronization signal and digitizes the signal.

Based on the separated synchronization signal, the write control signal generation circuit 4 generates a write control signal for controlling which range of data of the image 11 is written into the memory 6. The write control signal generating circuit 4 generates a write control signal 1B& corresponding to the horizontal direction of the range to be displayed on the display screen 13 from the starting position of the video information portion 16, as shown in FIG. 3 (0).

The write control signal 18a is input to the delay circuit 5. The amount of delay of the delay circuit 6 is determined by the display position control signal input to the terminal 2. i@! When displaying the left range 12 & as shown in the figure (0), tJ!J without delay.
Let the write control signal 18m in FIG. 3 be the it. Further, when displaying the screen center range 2b as shown in FIG. J2 (b), the write control signal 18& is delayed so that the timing shown in the write control signal 18b is reached with respect to the input video signal 14. When displaying the right side range 11Ao as shown in Fig. 2 <o>, write control signal 1
8o timing. By adjusting this delay amount, data in any range of the video can be written to the memory. The memory 6 and write address counter 1 are controlled by the write control signal passed through the delay circuit 5, and the input video signal processing circuit stores data in the range to be displayed on the receiver after conversion from the output video data. Remember. The stored video data is read out by a read address counter 8 and input to an output video signal encoding circuit 9. The output video signal encoding circuit 9 processes the video data in accordance with the video tIA signal format of the receiver, performs I/A conversion, and generates and superimposes a synchronization signal, resulting in a video #lI signal suitable for the receiver. is output from terminal 11.

FIG. ts4 shows another embodiment of the video signal conversion device of the present invention according to claim 1. In FIG. 4, 19 is a delay circuit. Note that other symbols are the same as in the above embodiment.

The synchronization signal separated by the input video signal processing circuit 3 passes through the delay circuit 19 and is input to the write control signal generation circuit↓.The 0 write control signal generation circuit number is the input video signal processing circuit 3 as in the above embodiment. The write control signal 8 & shown in FIG. 3 (&) is generated based on the synchronization signal separated by . The delay amount of the delay circuit 19 is controlled by the signal input to the display position control signal input terminal 2. When the delay circuit 19 delays the synchronization signal, the write control signal generated at the write control signal generation circuit number is delayed. By changing the delay amount of this synchronization signal, it is possible to obtain almost the same operation as in the previous embodiment.

Next, another video signal conversion device of the present invention according to claim 2
Two other embodiments will be described. In Figure 5,
Reference numeral 14 denotes a read control signal generation circuit, and the other symbols are the same as in the above embodiment. FIG. 6 is a diagram showing the tying of the write control signal, and FIG. 7 is a diagram showing the address space of the memory 6.

The input video signal is processed in the same manner as in the above embodiment.

In the write control signal generation circuit number, the image data during the scanning period shown in FIG. 6 (11) is input so as to capture all the data of the image contained in the input video signal as shown in FIG. 6 (0). Write control signal 1 becomes 4h H# in information part 16
Generates 8d. By this write control signal 1B+1, all data of the video 11 of the input video signal is stored in the memory 6. The read address value of the read address counter 8 is controlled by a control signal generated by the read control signal generation circuit 20. The address value of the read address counter 8 is input to the read control signal generation circuit go. Further, in accordance with the display position control signal inputted to terminal B, the control signal generated by the readout control signal generation circuit 2o changes, and the readout address value changes. For example, if you want to display the range of 0 in Figure 2 after conversion, since all the data of the original video 11 is stored in the memory 6, the address where the range of 12 m is stored is The read address counter 8 is controlled so as to read only the contents of the memory 6. Fig. 7 is a diagram showing the memory space of the memory 6. The video data length during one scanning period of the video signal is human. The data length of the video data displayed by the internal receiver is B.Second
When displaying the cylinder path eva in the figure, only the contents of the shaded part of 0 in Figure 1 (0) are read out.Read address counter 8
When counting from address 0 to D-1fi, the read control signal generation circuit! ! 0 sets the address value of the read address counter 8 to M. When the read address counter 8 counts at M10B-11, the read control signal generation circuit 20 starts the read address counter 8.
Set the address value to 2 people. And 2m+B-1t
is counted and then set to 3A.

After that, repeat this process to read out the contents of memory. When displaying the range 12'b, the shaded area in FIG. 7(b) is read out. First, the read control signal generation circuit 20 sets the address value of the read address counter 8 to the address value 0 of the video data to start displaying. Next, the read address counter 8 starts reading the address value C, and the address value is 0-)-B.
Then, the read control signal generation circuit 2o sets the address value of the read address counter 8 to M10.

Then, it counts up to M+Q-)B and is set to ff1A10. Repeat the same process thereafter. Also, range IJ! In case a, the shaded portion in FIG. 6C may be read out in the same manner. The read video data is processed by the output video signal enrichment circuit 9 in the same manner as in the above embodiment, and is outputted from the terminal 10.

In the above embodiment, a case has been described in which the three ranges of the left side, center, and right side of the original image are displayed, but positions intermediate between these ranges are of course also possible. Further, in the above embodiment, the vertical direction of the video screen and the display screen of the receiver are made to match, but other cases can be similarly realized by manipulating the timing of the control signal.
When displaying the area 1g (l) in the figure on a television receiver, it is possible to perform writing or reading in areas that are not included in this area @12d.

Furthermore, in the above embodiment, the case is shown in which the video signal is a composite of the synchronization signal and the video signal, but if the synchronization signal and the video information are transmitted separately, or the video information is a luminance signal and a color signal, or three primary colors, etc. Even in the case of separate transmission, separate input terminals or output terminals are provided for each.
The same can be achieved by performing appropriate input video signal processing and output signal processing. Furthermore, even when a luminance signal and a color signal, or three primary colors, etc. are transmitted in a time-division manner, the necessary portions of each video information transmitted in a time-division manner may be selected after conversion. Among these video signal converters, MO81 signal and ITSO
According to the present invention, as described above, the signal converting device can be used as a device for converting a television signal having an image having a different aspect ratio from that of a conventional television to a conventional television signal. , when converting a video @ signal and displaying it on a receiver with a different aspect ratio from the video transmitted by this video #A signal, the position of the video selected from the video of the input video signal and displayed on the receiver. can be made variable, making it possible to view any part of the original video.

[Brief explanation of drawings]

tII, Fig. 1 is a block diagram of a video signal conversion device that is an embodiment of the present invention, Fig. 2 is a diagram showing an example of a video display after the video signal conversion involving the aspect ratio conversion of the video shown in Fig. 1, and Fig. 3 The picture is from Ei fI! ! TS4 is a block diagram showing another embodiment of the video signal conversion device of the present invention according to claim 1, and FIG. 5 is a diagram showing the timing of signals and write control signals.
FIG. 6 is a block diagram showing another embodiment of the video signal conversion device of the present invention according to the present invention, FIG. 6 is a diagram explaining the timing of the write control signal of the video signal conversion device of FIG.
FIG. 8 is a diagram illustrating readout control of the video signal conversion device shown in FIG. 8, and FIG.
K! FIG. 9 is a block diagram showing a conventional video signal conversion device with aspect ratio conversion; FIG. 10 is a diagram showing a display by a conventional video signal conversion device with aspect ratio conversion; The drawing shows a diagram illustrating the timing of a write control signal of a conventional video signal conversion device. (in the figure), 1 is the input terminal for the video signal to be converted, 2
is a display position control signal input terminal, 3 is an input video signal processing circuit, ↓ is a write control signal generation circuit, 5 is a delay circuit, 6
1 is a memory, 1 is a write address counter, 8 is a read address counter, 9 is an output green signal encoding circuit, 10 is an output terminal for the converted video signal, 11 is the original video, 18m, 15! b, IJ! a, I
J! +! , 12m is the video range displayed on the receiving edge, 1
3 is the display screen of the receiver to be displayed, 14 is the video signal, 15 is the synchronization signal part, 16 is the video information part, 11m
, 1gb, 17o, 17. is the video information portion displayed on the receiver, 18a, 18b, 18a
, 18cl, 18e are video data write control signals to the memory, 19 is a delay circuit, ! ! 0 indicates a read control signal generation circuit. In the figures, the same reference numerals Fi indicate the same or equivalent parts.

Claims (2)

[Claims] (1) In a video signal conversion device that converts a video signal so that it can be displayed on a receiver having a display screen with a different aspect ratio from the image being transmitted, the input video signal is processed and synchronized to suit display. Input video signal processing means for separating signals and analog/digital conversion; storage means for storing digitized video data; and arbitrarily selecting a range of video data to be displayed on the receiver from the digitized video data. control means for storing the video data read out from the storage means in the storage means, and means for signal processing, digital/analog conversion, and generation/superimposition of a synchronization signal into a video signal format compatible with a receiver displaying the video data read out from the storage means. A video signal conversion device characterized by: (2) In a video signal conversion device that converts a video signal so that it can be displayed on a receiver having a display screen with a different aspect ratio from the image being transmitted, the input video signal is processed and synchronized to suit display. An input video signal processing means for separating signals and analog/digital conversion, a storage means for storing digitized video data, and a method for arbitrarily selecting a range of video data to be displayed on a receiver from the video data stored in the storage means. control means for selecting and reading video data; signal processing, digital/analog conversion, generation and superimposition of a synchronization signal into a video signal format compatible with a receiver displaying the video data read from the storage means; A video signal conversion device characterized by comprising means for converting.