JP3361710B2 - Image synthesis method for surveillance camera system - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surveillance system using a small surveillance camera that uses a solid-state image sensor (hereinafter simply referred to as CCD), and more specifically, it relates to a surveillance system for images captured by a plurality of surveillance cameras. It relates to a system with an image composition circuit that performs composition.

[0002]

2. Description of the Related Art Today, a surveillance system using a small CCD camera as a surveillance camera is widely used for crime prevention.
Also in this monitoring system, in recent years, an increasing number of systems have a single monitor TV for monitoring a plurality of monitoring cameras, that is, a plurality of locations.

In this surveillance camera system for displaying images of a plurality of surveillance cameras on one monitor television, the switcher switches the connection between the surveillance cameras and the monitor television to sequentially display the images of different surveillance cameras on the monitor television. In addition to the system, an increasing number of systems have been able to combine the images of, for example, four surveillance cameras, divide the screen of the monitor television into four, and display the images of each surveillance camera at the same time.

As described above, in the surveillance camera system for synthesizing and displaying images, for example, as shown in FIG. 5, four frame memories 31 to 31 corresponding to four surveillance cameras 11 to 14 are used.
Some include an image synthesizing circuit 20 mainly including 34 and one control unit 25. In the image synthesizing circuit 20, the video signals from the monitoring cameras, which are the first to fourth monitoring cameras 11 to 14, are converted into digital signals by the analog-to-digital conversion circuit 21 in the first frame memory 31 to the fourth frame memory 34, respectively. To record.

As shown in FIG. 5, the video signal processing circuit 15 is separated from the main body of each of the monitoring cameras 11 to 14, and CCD output signals are output from the first to fourth monitoring cameras 11 to 14. In this way, the camera head unit is miniaturized, and the miniaturized camera head unit is used as each of the monitoring cameras 11 to 14, and the video signal processing circuit 15 is incorporated inside the camera head unit, and the first monitoring cameras 11 to There is also one in which a video signal is directly output from the camera head portion of the 4 surveillance camera 14.

The first frame memory 31 to the fourth frame memory 34 have the write control signal L from the controller 25.
The writing timing of the digitized video signal is controlled by A, and the digital signal of the video signal component of the video signals from each surveillance camera is recorded as video data in the first frame memory 31 to the fourth frame memory 34. It

The first surveillance camera 11 to the fourth surveillance camera
14 and the control unit 25 often use the reference synchronization signal from the reference synchronization signal generation unit 19 to match the timings of vertical synchronization and horizontal synchronization. Further, the control unit 25 also outputs read control signals RA1 and RA2 to the first frame memory 31 to the fourth frame memory 34.

The read control signals RA1 and RA2, together with the timing of the write control signal LA, make it possible to read the video data of one frame before recorded in each of the frame memories 31 to 34. In the non-italyst system, as shown in FIG. 6, the first frame memory 31 and the second frame memory 32 are output to the first frame memory 31.
The timing of the read control signal RA1 and the second read control signal RA2 output to the third frame memory 33 and the fourth frame memory 34 is set to half frame time (1
It is shifted by / 2T) and is output only for a half frame time, and the first read control signal RA1 and the second read control signal RA2 are alternately output every half frame time.

Further, the first frame memory 31 to the fourth frame memory 34 store the video data for one pixel for each address by incrementing the address of the write address by one. The read address is incremented by 2 to output one frame of video data at a half frame time, and one pixel of video data is thinned out and output for each pixel.

The video data output from each of the frame memories 31 to 34 is synchronized by the synchronous synthesizing circuit 27 via the switch elements 36 to 39 such as three-state bus buffers.
Input to the control unit 25.
The output timing signals OA1, OA2, OA3, and OA4 from 1 to 3 control the interruption of the conduction of the video data. Of the output timing signals OA1 to OA4, the first switch element 3 to which the video data output from the first frame memory 31 is input
6, and the first output timing signal OA1 and the second output timing signal OA2, which are the output timing signals to the second switch element 37 to which the video data output from the second frame memory 32 is input, are the first two minutes. Is output only during 1 frame time. The third switch element 38 to which the video data output from the third frame memory 33 is input, and
The third output timing signal OA3 and the fourth output timing signal OA4, which are the output timing signals to the fourth switch element 39 to which the video data output from the fourth frame memory 34 is input, are the second half frame time. Output only to.

Further, the first output timing signal OA1 to the first switch element 36 is the first output timing signal OA1 in the first half of one horizontal scanning time.
The switch element 36 is made conductive, and the second output timing signal OA2 to the second switch element 37 makes the second switch element 37 conductive only in the latter half of one horizontal scanning time.
Since the video data recorded in the first frame memory 31 is thinned out and output for each pixel, the amount of data in one horizontal scanning line of the first surveillance camera 11 is halved.
Then, the video data of each pixel is output within one half horizontal scanning time. Therefore, the first switch element 36 synchronizes, for example, video data of each horizontal scanning line of odd-numbered scanning lines in the first surveillance camera 11 and the video data thinned out in half. It will be sent to the synthesis circuit 27. Then, when the first switch element 36 sends the video data of the odd-numbered scanning lines in the first surveillance camera 11 to the synchronous synthesizing circuit 27, the second frame memory 32 also outputs the video data of the odd-numbered scanning lines in the second surveillance camera 12. The video data is output, and this video data is cut off by the second switch element 37.

Further, the first frame memory 31 and the second frame memory 32 output the video data of the odd-numbered scanning lines within the half horizontal scanning time, and the even number within the latter half horizontal scanning time. When the video data of the scanning line is thinned out by one pixel and outputted, the first switch element 36 is turned off by the first output timing signal OA1, and the second switch element 37
Are rendered conductive by the second output timing signal OA2. Therefore, the second switch element 37 is connected to the second surveillance camera 12
The video data for each horizontal scanning line of the even-numbered scanning lines in (3) is sent to the synchronous synthesizing circuit 27 with the data amount thinned out by half.

As described above, the video data stored in the first frame memory 31 and the second frame memory 32 is thinned out pixel by pixel and output from the first frame memory 31 and the second frame memory 32. , The video data of the even-numbered scanning lines output from the second frame memory 32 are continuously input to the synchronous synthesis circuit 27 after the video data of the odd-numbered scanning lines output from the first frame memory 31 within one horizontal scanning time. be able to.

Further, the first frame memory 31 and the second frame memory 32 output the video data for one frame at a half frame time by thinning the video data by increasing the read address by two. Can be completed. And in the following half frame time,
The third frame memory 33 according to the second read control signal RA2
And output video data from the fourth frame memory 34,
When outputting this video data, like the first frame memory 31 and the second frame memory 32, the video data for one pixel of the video data for two pixels is thinned out, and the third frame memory 33 and the fourth frame memory Video data is output from the frame memory 34. Therefore, the third frame memory 33 and the fourth frame memory 34 also output the video data thinned out pixel by pixel to output the video data for one horizontal scanning line in the half horizontal scanning time, and It is possible to output video data for one frame in half frame time.

Further, at this time, the third switch element 38 and the fourth switch element 39 are alternately turned on by the third output timing signal OA3 and the fourth output timing signal OA4 every half horizontal scanning time. Thing. Therefore, in the latter half frame time (1 / 2T), the even-numbered image data output by the fourth frame memory 34 is output after the video data of the odd-numbered scanning line output by the third frame memory 33 within one horizontal scanning time. The video data of the scanning lines are continuously input to the synchronous synthesizing circuit 27, and the video data for one frame recorded in the third frame memory 33 and the fourth frame memory 34 at a half frame time is converted into a data amount of 2 It can be thinned out to one-half and input to the synchronous synthesis circuit 27.

Then, the synchronization synthesizing circuit 27 controls the synchronization of the video data input from the first frame memory 31 and the second frame memory 32 or the third frame memory 33 and the fourth frame memory 34 from the controller 25. The horizontal sync signal is synthesized for each horizontal scanning time based on the signal DA, and the vertical sync signal is synthesized for each frame time to obtain a digital video signal.

Therefore, if the digital video signal obtained by synthesizing this synchronizing signal is converted into an analog video signal by the digital-analog conversion circuit 29, the screen of the monitor TV 17 has a quarter screen at the upper left and the first surveillance camera 11 displays. The captured image is displayed, the image captured by the second surveillance camera 12 is displayed on the upper right quarter screen, and the image captured by the third surveillance camera 13 is displayed on the lower left quarter screen. , The lower right quarter
An analog video signal can be output from the image synthesizing circuit 20 as a video signal for displaying an image captured by the fourth surveillance camera 14 on the screen.

The prior art described with reference to FIG. 6 is a system using a non-interlaced type surveillance camera and a monitor television 17, but an interlaced type surveillance camera such as the NTSC standard is used. If the video data is output from the first frame memory 31, the second frame memory 32, the third frame memory 33, and the fourth frame memory 34, the first frame memory 31 and the third frame memory 33 are output every half field time. The output from the second frame memory 32 and the output from the third frame memory 33 and the fourth frame memory 34 are switched.

Even if each of the surveillance cameras 11 to 14 outputs an interlaced video signal, a progressive scan conversion circuit is used to convert the interlaced scan video signal into a non-interlaced progressive scan video signal. It is assumed that the progressive scan conversion circuit is inserted before the image synthesizing circuit 20 or after the image synthesizing circuit 20 and connected to the non-interlaced monitor television 17.

Of course, as the surveillance camera system, the camera heads for outputting the video signals conforming to the most frequently used NTSC standard are used as the first to fourth surveillance cameras 11 to 14, and the monitor television 17 is used. Also NTSC
A device that displays an image conforming to the standard is generally used. Even in a surveillance camera system using asynchronous cameras that do not synchronize the surveillance cameras as the first to fourth surveillance cameras 11 to 14, two frames of video data can be written in the frame memories 31 to 34. Each frame memory is based on the sync signal included in the video signal from each surveillance camera 11-14.
Forming a video signal that is a composite of the video signals of the four surveillance cameras 11 to 14 by writing to 31 to 34 and reading the video data of the frame that has not been rewritten to perform the composite processing. You can

Further, when synthesizing the video signals of the four surveillance cameras 11 to 14, there is also an image synthesizing circuit 20 which uses switching means such as a selector as shown in FIG. In this image synthesizing circuit 20, when the video data is recorded in the frame memory based on the video signals from the four synchronized surveillance cameras, the video input to the image synthesizing circuit 20 by using a switching means such as a selector. It switches signals and records the video data of two surveillance cameras in one frame memory.

That is, by switching the first selector 41, which serves as a switching means, every horizontal scanning time, the video signal of the odd-numbered scanning line of the first monitoring camera 11 and the video signal of the even-numbered scanning line of the second monitoring camera 12 are switched. Signals are sequentially switched to be sent to the first frame memory 31, and similarly, the second selector 42, which serves as switching means, is switched at each horizontal scanning time, so that the image of the odd-numbered scanning line of the third surveillance camera 13 is switched. The signal and the video signal of the even-numbered scanning line of the 4th surveillance camera 14 are sequentially switched and sent to the 2nd frame memory 32.

When writing to the first frame memory 31 and the second frame memory 32, one pixel of image data is stored for each address, and the first frame memory 31 and the second frame memory 32 are stored. When reading from, the address address is increased by 2 and 1 is set for every 2 pixels.
It outputs by thinning out the video data for pixels.

Therefore, the video data from the first surveillance camera 11 and the video data from the second surveillance camera 12 are alternately recorded in the first frame memory 31 every horizontal scanning period.
In the second frame memory 32, the video data from the third surveillance camera 13 and the video data from the fourth surveillance camera 14 are alternately recorded every horizontal scanning period. Then, after the video data of one frame or one field is output from the first frame memory 31 at the half frame time or the one half field time, the second frame memory 32 continuously outputs the half frame. The video data for one frame or one field is output at time or half field time, and the non-interlaced or interlaced video data is synthesized by the synchronization synthesis circuit 27 to synthesize a synchronization signal,
The analog-to-digital conversion circuit 29 performs analog conversion.

In a system in which a digital video signal is output from each of the surveillance cameras 11 to 14 or the video signal processing circuit 15, the analog-digital conversion circuit 21 of the image synthesizing circuit 20 shown in FIGS. It is omitted. Furthermore,
Connect three surveillance cameras to the selector that is the switching means,
The video signal from each surveillance camera is sequentially selected for each horizontal scanning line segment, and by using three selectors and three frame memories, nine surveillance cameras and one monitor television 17
Some have a system to connect to.

In this case, when the video data is recorded in the frame memory by the selector, the number of horizontal scanning lines of the video signal output by the surveillance camera is thinned to 1/3 and recorded in the frame memory. Further, when the video data is read from each frame memory, the address address is increased by 3 to read the video data for every 3 pixels, thereby further increasing the data amount stored in each frame memory by 3.
It is a thinning out to one-third. Therefore, combine the video captured by the nine surveillance cameras into one screen to display the video signal,
It is possible to display the images of three surveillance cameras arranged side by side in three stages.

[0027]

As described above, when an image synthesizing circuit is used which thins out each horizontal scanning line of each surveillance camera and also thins out each pixel in the video data of each horizontal scanning line, It is possible to easily reduce the image data of one screen (one field or one frame) to the amount of data that is 1 / the number of surveillance cameras. Therefore, it is easy to combine the images from multiple surveillance cameras into the video signal to be displayed on one monitor TV.

However, today, the image resolution of monitor televisions has increased, and it has become possible to display high-quality images even in a surveillance system. Therefore, in an image synthesizing circuit that uses only a quarter or a ninth of the data of the video signal output from the surveillance camera, the image quality of the image displayed on the monitor television may be conspicuously deteriorated. The drawback has arisen that the resolution cannot be fully exerted.

The present invention provides an image synthesizing method which eliminates the above drawbacks and can form a synthesized video signal in which the deterioration of the image quality is not noticeable while suppressing the increase of the memory capacity.

[0030]

According to the present invention, a camera head for outputting a video signal in an interlace system is used as a surveillance camera, and an R signal, a G signal and a B signal formed by the surveillance camera are used.
A luminance signal and a color difference signal are formed on the basis of a color signal such as a signal, and video signals from a plurality of surveillance cameras are switched for each horizontal scanning line to convert the signal data of the luminance signal for one frame into a frame for luminance signal. The signal data of the color difference signal is recorded in the memory, and the signal data of one field is recorded in the frame memory for the color difference signal for each frame, and the frame data for the luminance signal is used to record the signal data of the plurality of surveillance cameras. It is assumed that a plurality of sets of frame data storage means, which are combined with the color difference signal frame memory to form one set, are used, and the number of surveillance cameras and the number of sets of frame data storage means connected to each frame data storage means via the switching means. Are made to coincide with each other, signal data for one field is read from one frame data storage means, and when this reading is completed, The signal data is sequentially read from each frame data storage unit so that the signal data for one field is read from the frame data storage unit, and the read from the luminance signal frame memory is performed by reading the signal data of the odd field and the even field. The reading of the signal data is performed alternately, and the reading from the color difference signal frame memory is performed by repeatedly reading the recorded signal data of one field twice, and the reading speed of the signal data from each frame data storage means is set to each frame. The writing speed of the signal data to the data storage means is made faster, all the signal data for each one field in each frame data storage means are read in one field time, and an analog video signal is generated based on this signal data. Image of surveillance camera system to be formed And synthetic methods.

As described above, the luminance signal and the color difference signal are formed based on the color signals such as the R signal, the G signal, and the B signal formed by the surveillance camera, and the luminance signal and the color difference signal are separately combined. Therefore, image composition can be performed without lowering the resolution (dynamic range) of the luminance signal or the color difference signal. Further, the number of sets of frame data storage means and the number of surveillance cameras connected to each frame data storage means are made to coincide with each other, and the reading speed of signal data from the frame data storage means is increased to make each one of each frame data storage means. Since all the signal data for the fields are read in one field time, when reading the signal data from each frame data storage means, the horizontal scanning corresponding to the number of surveillance cameras among the signal data stored in the frame data storage means. The signal data of the number of lines can be read in one horizontal scanning time.

Then, in each frame data storage means,
When writing each signal data, since the surveillance camera is sequentially switched at each horizontal scanning time to write the signal data of the luminance signal and the signal data of the color difference signal, each signal data read from each frame data storage means, The signal data of each one horizontal scanning line of each surveillance camera connected to the frame data storage means is sequentially output to one horizontal scanning line.

Since the reading speed is increased to read all the signal data for each one field of each frame data storage means in one field time, all the signal data for one field recorded in the frame memory is read. Can be output in a fraction of one field time. Therefore, when sequentially reading the respective signal data recorded in the plurality of frame data storage means, the signal data regarding all the pixels recorded in the plurality of frame data storage means are sequentially read in one field time, and the signal data are analog-digital. An analog video signal can be formed by inputting to the conversion means.

The reading from the luminance signal frame memory reads the odd field signal data and the even field signal data, but the chrominance signal frame memory reads one field signal for each frame. Since the data is recorded and the signal data is read out twice, the video signal formed by this signal data forms a luminance signal on the basis of the signal data for each pixel of the odd field and the even field. The components form a color difference signal based on the same signal data in the odd field and the even field.

When the reading of the signal data from one frame data storage means is completed, the signal data from the next frame data storage means is read out so that the signal data is sequentially read from all the frame data storage means in one frame time. Therefore, the video based on the signal data stored in each frame data storage means can be used as the video signal for displaying the video vertically arranged on the monitor screen.

In this way, if all of the signal data recorded in the frame data storage means is read out and the analog video signal is formed based on all the data without thinning out the signal data of the pixels forming each horizontal scanning line. , Reproduces the waveform of the accurate luminance signal compressed only the time axis of the video signal formed by the surveillance camera, and forms the video signal based on the signal data of a plurality of scanning lines within one horizontal scanning time. It can be a video signal in which the video of a plurality of surveillance cameras can be arrayed in the direction.

According to the present invention, four monitoring cameras are used, two sets of frame data storage means are used, and two monitoring cameras are connected to one set of frame data storage means via the switching means. It is preferable that the read clock of the frame data storage means is twice the write clock. In this way, by using four monitoring cameras and two switching means and two frame data storage means, it is possible to form a video signal forming four screens on one monitor television with a simple circuit configuration. .

Therefore, it is possible to display a plurality of images on one monitor screen at the same time without the monitor taking the images taken by the respective surveillance cameras to be as small as possible on the screen, and it is possible to reduce the resolution of each image. Can be displayed.

[0039]

BEST MODE FOR CARRYING OUT THE INVENTION As shown in FIG. 1, an embodiment of an image synthesizing circuit according to the present invention includes frame data storage means 71 and 75 combined with a frame memory, and each surveillance camera 1.
Selector 8 as switching means for switching connections 1 to 14
The control unit 55 having the first and the second 82, and controlling the writing and reading timings of the frame data storing means 71, 75, and the clock generating means 61 for outputting the clock signals having different frequencies.
It is equipped with and.

In this embodiment, it is assumed that the images of four surveillance cameras are combined into one screen, and the signal lines of the first surveillance camera 11 and the second surveillance camera 12 are connected to the first via the digital signal processor 53, respectively. The third surveillance camera 13 and the fourth surveillance camera 14 are connected to the respective video signal input terminals of the selector 81.
Signal lines are connected to the respective video signal input terminals of the second selector 82 via the digital signal processor 53.

The four surveillance cameras in this system are of an external synchronization type, and an interface such as an NTSC standard in which the timings of vertical and horizontal synchronization are matched by a reference synchronization signal from a reference synchronization signal generator (not shown). A race type video signal or video signal is input to a switching means such as a selector or a multiplexer via the digital signal processor 53.

In this surveillance camera system, color signals such as R signals, G signals, and B signals output by the surveillance cameras 11 to 14 are output by using a digital signal processor 53, for example, 8-bit luminance signals (Y signals). ) And an 8-bit color difference signal (C signal), and sends them to selectors 81 and 82 that use switch elements such as three-state bus buffers as selection means.

Further, each of the first frame data storage means 71 and the second frame data storage means 75 uses two frame memories, and one of the first frame data storage means 71 uses one of them as a first luminance signal frame memory 72. The other is used as the first color difference signal frame memory 73, and the second frame data storage means 75 similarly uses two frame memories each, and one is used as the second luminance signal frame memory 76. , The other is the second color difference signal frame memory 77.

The color difference signal frame memories 73 and 77 are
A memory having a capacity half that of the luminance signal frame memories 72 and 76 is used. Then, the control unit 55 extracts a synchronization signal from the video signal from one of the surveillance cameras 11 to 14 and based on this synchronization signal, or a reference synchronization signal for synchronizing the surveillance cameras 11 to 14. On the basis of,
It is assumed that a select signal S for switching the video signal input terminals of the first selector 81 and the second selector 82, which are the selection means, is output to each selector 81, 82 every horizontal scanning time.
The output terminals of the first selector 81 and the second selector 82 are connected to the first frame data storage means 71 and the second frame data storage means 75, respectively.

Therefore, the first selector as the selection means
Reference numeral 81 switches the input signal for each horizontal scanning line time, and the first brightness signal frame memory 72 of the first frame data storage means 71 stores the brightness signals from the first monitoring camera 11 and the second monitoring camera 12 respectively. Each horizontal scanning line is thinned out and recorded alternately for each horizontal scanning line. In the first color difference signal frame memory 73, the color difference signals from the first monitoring camera 11 and the second monitoring camera 12 are recorded for each horizontal scanning line. The data is thinned out and recorded alternately for each horizontal scanning line.

Therefore, the luminance signal and the color difference signal from the first surveillance camera 11 and the second surveillance camera are obtained every horizontal scanning line time.
The luminance signal and the color difference signal from 12 are alternately sent to the first frame data storage means 71. Similarly, the second
The frame data storage means 75 is also composed of two frame memories, a luminance signal frame memory and a color difference signal frame memory, and the input signal is switched every horizontal scanning line time by the second selector 82 as the selecting means. Therefore, the second luminance signal frame memory 76 is stored in the third surveillance camera 13
And the luminance signals from the fourth monitoring camera 14 are thinned out for each horizontal scanning line and recorded alternately for each horizontal scanning line, and the third monitoring camera 13 and the fourth monitoring camera are stored in the second color difference signal frame memory 77. Color difference signals from 14 are thinned out for each horizontal scanning line and recorded alternately for each horizontal scanning line.

Further, in the first frame data storage means 71 and the second frame data storage means 76, together with the luminance signal write control signal LY and the color difference signal write control signal LC which enable writing, the timing of writing data. Data is stored by inputting a write clock signal that determines the speed. Then, a read clock signal that determines the timing speed at the time of reading data is input together with the read control signals R1 and R2 that enable reading of data. That is, a two-clock input type frame memory that enables reading at a speed different from the writing speed is used. When writing or reading, a frame memory of a FIFO (first-in-first-out) type is used in which addresses are sequentially incremented to return from the last address to the first address. The memory is used as a luminance signal frame memory and a color difference signal frame memory as frame data storage means.

Then, the luminance signal write control signal LY input to the luminance signal frame memories of the first frame data storage means 71 and the second frame data storage means 75, and the first frame data storage means 71 and the second frame data storage. The color difference signal write control signal LC and the read control signals R1 and R2 of each frame memory, which are input to the color difference signal frame memory of the means 75, are formed by the control unit 55 and are sent from the control unit 55 to each frame data storage unit 71, 75. Is something to enter.

As shown in FIGS. 2 and 3, the luminance signal write control signal LY is a valid video image with the vertical blanking period including the vertical synchronizing signals V0 and V1 and the horizontal synchronizing signals H0 and H1 removed. The first frame data storage means 71 and the second frame data storage means 75 are synchronized with the signal timing.
The luminance signal signal data is stored in the luminance signal frame memories 72 and 76 in the first frame data storage means 71 and the second frame data storage means 75.

In a system using a surveillance camera which outputs a video signal of NTSC standard and a monitor television 17 of NTSC standard, for example, the signal data of 240 horizontal scanning lines alternate as the number of effective scanning lines in one field. Then, the signal data in the odd field and the signal data in the even field are stored.

As described above, since the surveillance camera connected to the first frame data storage means 71 is switched by the first selector 81, the first luminance signal frame memory 72 in the first frame data storage means 71 has the first 1 surveillance camera
For example, the signal data regarding the luminance signal of the video signal of the first horizontal scanning line 11 is stored, and the signal data regarding the luminance signal of the video signal of the second horizontal scanning line of the second monitoring camera 12 is stored. Next, following the signal data relating to the luminance signal of the video signal of the third horizontal scanning line of the first surveillance camera 11, the signal data relating to the luminance signal of the video signal of the fourth horizontal scanning line of the second surveillance camera 12 is stored. It Further, following the signal data regarding the luminance signal of the video signal of the fifth horizontal scanning line of the first monitoring camera 11, the signal data regarding the luminance signal of the video signal of the sixth horizontal scanning line of the second monitoring camera 12 is stored. In this manner, the signal data of the luminance signal of the odd-numbered horizontal scanning lines of the first monitoring camera 11 and the signal data of the luminance signal of the even-numbered horizontal scanning lines of the second monitoring camera 12 are sequentially recorded alternately.

However, when the number of effective scanning lines is set to about 240, the signal data of the luminance signals for the remaining 10 horizontal scanning lines immediately before or after the vertical synchronizing signal is stored in the first luminance signal frame memory 72. The brightness signal write control signal LY is output so that it will not be caused. In addition, since this surveillance camera system handles interlaced signals and excludes the vertical blanking period, for example, the signal data of the 11th horizontal scanning line of the first surveillance camera 11 is set as the 11th The signal data of the fifteenth horizontal scanning line is sent next to the signal data of the horizontal scanning line, and the signal data of the nineteenth horizontal scanning line is sent next.
Every other signal data of the effective scanning line forming the first field, the signal data of the 17th horizontal scanning line next to the 13th horizontal scanning line from the second monitoring camera 12, and then the 17th horizontal scanning line. Like the Sohei scan line, every other signal data of the scan line forming the first field is alternately stored, and in the second field, the twelfth horizontal scanning line from the first surveillance camera 11 is followed by the sixteenth horizontal scanning line. Signal data of the th horizontal scanning line,
Then, every other signal data of the scan lines forming the second field like the 20th Sohei scan line and the 18th horizontal scan line after the 14th horizontal scan line from the second surveillance camera 12. The signal data of, and then the signal data of every other scanning line forming the second field like the 22nd Sohei scanning line are alternately stored.

In this way, the first luminance signal frame memory 72 is stored in the first surveillance camera 11 and the second surveillance camera 12 in the first luminance signal frame memory 72.
The signal data based on the luminance signal from the first monitoring camera 11 is recorded alternately by thinning out one horizontal scanning line for each field, and the signal data for one frame based on the luminance signal of the first monitoring camera 11 and the second monitoring camera 12 are recorded. Therefore, it is possible to store the signal data for one frame, which is a combination of the signal data for one frame based on the video signal of 1.

As shown in FIG. 2, the color difference signal write control signal LC output from the control unit 55 is similar to the luminance signal write control signal LY at the timing of the odd field which is the first field. Although input to the first color difference signal frame memory 73, at the timing of the even field which is the second field, as shown in FIG. 3, the signal level is set to the L level and the first color difference signal frame memory 73 receives the signal. It is supposed not to write data.

Therefore, as the signal data of the color difference signal of each pixel, the signal data of only the first field in one frame time can be stored in the first color difference signal frame memory 73, like the signal data of the luminance signal. The signal data of the color difference signal from the first surveillance camera 11 and the second surveillance camera 12
And the signal data of the color difference signals from are alternately stored in the first color difference signal frame memory 73 for each horizontal scanning line.

Similarly, with respect to the second frame data storage means 75, by switching the luminance signal and the color difference signal input by the second selector 82 every horizontal scanning time, the third surveillance camera 13 and Signal data based on the luminance signal from the fourth monitoring camera 14 is thinned out for each horizontal scanning line and alternately recorded in the second luminance signal frame memory 76, and one frame based on the luminance signal from the third monitoring camera 13 is recorded. It is possible to store one frame of signal data in which the signal data and one frame of signal data based on the luminance signal of the fourth surveillance camera 14 are combined in the second luminance signal frame memory 76.

The third surveillance camera 13 and the fourth surveillance camera
The color-difference signal from the first color-difference signal frame memory 73
Similarly, only the signal data of the color difference signal for one field in one frame is stored in the second color difference signal frame memory 77. And this image synthesis circuit
The 50 is provided with a clock generating means 61 composed of an oscillation circuit 62 for outputting a signal of 20 MHz and a frequency dividing circuit 63 for frequency-dividing this signal by half. The output signal is input to the write clock terminals of the first frame data storage means 71 and the second frame data storage means 75. Therefore, the first frame data storage means uses the 10 MHz signal as the write clock.
Input to the first luminance signal frame memory 72 and the first color difference signal frame memory 73 of 71, and to the second luminance signal frame memory 76 and the second color difference signal frame memory 77 of the second frame data storage means 75. can do. In addition, the output signal of the oscillation circuit 62 is input from the read clock terminals of the first frame data storage means 71 and the second frame data storage means 75, and the signal of 20 MHz is used as the read clock in the first frame data storage means 71. Luminance signal frame memory 72 and first color difference signal frame memory
73 and the second luminance signal frame memory 76 and the second color difference signal frame memory 77 of the second frame data storage means 75.

Further, the first frame data storage means 71
And the read control terminal of the second frame data storage means 75 is connected to the control section 55, and the first read control signal R1 is sent to the first frame data storage means 71 and the second read control signal is sent to the second frame data storage means 75. Input the signal R2. As shown in FIGS. 2 and 3, the first read control signal R1 is synchronized with the write control signal LY, and the vertical sync signals V0, V1 and the vertical blanking period and the horizontal sync signals H0, H1 are removed. It is output to the first frame data storage means 71 so that the signal data can be read from the first luminance signal frame memory 72 and the first color difference signal frame memory 73. Then, during the period of 1/2 field time (1 / 2FT) corresponding to the first half of 1 field time, the output is performed according to the number of effective horizontal scanning lines.

Similarly to the first read control signal R1, the second read control signal R2 is matched with the write control signal LY, and the periods of the vertical sync signals V0 and V1 and the horizontal sync signals H0 and H1 are removed to obtain the second read control signal R2. Luminance signal frame memory 76 and second
The signal data can be read from the color difference signal frame memory 77. The second read control signal R2 is supplied to the second frame data storage means in accordance with the number of effective horizontal scanning lines during the half field time (1 / 2FT) corresponding to the latter half of one field time. I am trying to output to 75.

Since a first-in first-out memory is used as each memory of the first frame data storage means 71 and the second frame data storage means 75, the first brightness signal frame memory 72 and the second brightness signal are stored. The frame memory for use 76 outputs the stored effective horizontal scanning line signal data in the stored order. Further, since the read clock of the first luminance signal frame memory 72 and the second luminance signal frame memory 76 is set to 20 MHz, which is twice the frequency of the write clock, two horizontal scanning line segments are included in one horizontal scanning time. The signal data of can be output. Further, the first luminance signal frame memory 72
Outputs all the signal data for one field in half field time, and then the second luminance signal frame memory 76 outputs all the signal data for one field in half field time. It will be.

At this time, the first color-difference signal frame memory 73 and the second color-difference signal frame memory 77 are divided into two, like the first luminance signal frame memory 72 and the second luminance signal frame memory 76. All signal data for one field is output in one field time. When the first luminance signal frame memory 72 outputs the luminance signal signal data in the first field, the first color difference signal frame memory 73 matches the luminance signal signal data with the color difference signal signal data. Is output in half field time, and then the second color difference signal frame memory 77
The signal data of the color difference signal is output according to the output of the signal data of the luminance signal in the first field of the luminance signal frame memory 76.

Further, when the first luminance signal frame memory 72 outputs the signal data of the even field of the same frame, only the signal data for one field is written in the first color difference signal frame memory 73. Again, the signal data of the odd field is repeatedly output again. Similarly, a second color difference signal frame memory
Also in 77, when the second luminance signal frame memory 76 outputs the even field signal data, the odd field signal data is output again and again.

Then, the signal data of the luminance signal and the signal data of the color difference signal output from the first frame data storage means 71, the signal data of the luminance signal and the signal of the color difference signal output from the second frame data storage means 75. Digital encoder for data to digital-analog conversion 56
, And a color difference signal (C signal) is superimposed on the luminance signal (Y signal) to form an analog video signal.

Therefore, as shown in FIG. 4, the analog video signal formed by the digital data of each pixel is compressed to half the time axis with respect to the video signal output from the surveillance camera (FIG. 4A). However, it is possible to obtain a video signal (FIG. 4C) that accurately reproduces the change, and compare each of the horizontal scanning lines with an analog video signal (FIG. 4B) that is formed from the data obtained by thinning out the conventional signal data for each pixel. It is possible to form an analog video signal that accurately reproduces the change in the video inside.

Therefore, the analog video signal is appropriately amplified by the amplifier circuit 58, and the vertical synchronizing signal and the horizontal synchronizing signal are added by the synchronous synthesizing circuit 57 based on the synchronous formation control signal D,
If it is input to the monitor television 17 as an interlaced video signal, it is a high-definition image that matches the resolution of the monitor television 17, and the screen is divided into four and shot by the first to fourth surveillance cameras 11 to 14. The images can be displayed on the monitor screen at the same time.

Since the video signal based on the color difference signal of the odd field is formed when the video signal forming the screen of the even field is formed, the video signal of the even field is transmitted to each surveillance camera 11-14. There may be a phenomenon in which the color is slightly different from that of the video signal formed in (4).
However, the time difference between the even-numbered field and the odd-numbered field is 1/60 second, and the signal data of the color-difference signal of the odd-numbered field, which is the signal data of the color-difference signal of the pixels at extremely close pixel positions, is converted into the color-difference signal of the even-numbered field. Therefore, the difference from the color of the video signal formed by each of the monitoring cameras 11 to 14 can be made extremely small.

Further, the surveillance camera system shown in FIG.
Although the images of four surveillance cameras are displayed on one monitor television 17, when the images of nine surveillance cameras are displayed on one monitor television 17, a selector as a selection means and frame data storage An image synthesizing circuit using three means is used, three surveillance cameras are connected to each selector, and the luminance signal and color difference signal of each surveillance camera is input to each selector.

Then, the surveillance camera is switched at every horizontal scanning time by the select signal from the control unit to synthesize the luminance signals from the three surveillance cameras, and the 1 from each surveillance camera is selected.
With the signal data in which the number of horizontal scanning lines of the frame is ⅓, the entire signal data of the three surveillance cameras is recorded as signal data for one frame in each frame memory for luminance signals. As for the color difference signals from each surveillance camera, the surveillance cameras are switched every horizontal scanning time to synthesize the color difference signals from the three surveillance cameras, and the signal data of the color difference signals from each surveillance camera is frame by frame. The data is recorded one field at a time and stored in each color difference signal frame memory as signal data for one frame as a whole. Further, clock generating means
By setting the frequency of the read clock input from 61 to each frame memory to 30 MHz, which is three times the frequency of the write clock, the image in which the images of three surveillance cameras are lined up in the horizontal direction of the monitor screen is displayed in the vertical direction. It is arranged in 3 stages and forms the video signal to display the video from 9 surveillance cameras on one monitor screen.

The signal formed by the oscillation circuit 62 of the clock generation means 61 is not limited to 20 MHz or 30 MHz, but the number of pixels of the CCD used in the surveillance camera, the digital signal processor 53 or the analog-digital conversion circuit. In the above-described embodiment, when the data of about 100,000 pixels is formed as the commonly used luminance signal and color signal, respectively. Write clock 1
0 MHz and the frequency of the read clock is equal to the number of surveillance cameras connected via one selecting means 2
It is set to output double or triple clock signal.

When forming a luminance signal and a color difference signal based on color signals such as R signal, G signal and B signal,
Not only when the luminance signal and the color difference signal are directly formed from the R signal, the G signal, and the B signal which are formed by the camera heads formed by the first to fourth monitoring cameras 11 to 14, the analogs formed by the camera head are also included. The luminance signal and the color difference signal may be separated from the video signal, and the luminance signal and the color difference signal, which are analog signals, may be digitized and stored in the luminance signal frame memory and the color difference signal frame memory.

When the synchronization of color signals or video signals such as R signals, G signals, and B signals input from the monitoring cameras 11 to 14 to the switching means is correctly matched, the first selector 81 performs the first monitoring. Color signals or video signals such as R signals, G signals, and B signals from the camera 11 and color signals or video signals such as R signals, G signals, and B signals from the second monitoring camera 12 for each horizontal scanning line After synthesizing, a luminance signal and a color difference signal which are digitized based on the color signal and the video signal are formed, and the R signal and G from the third surveillance camera 13 are formed by the second selector 82.
After synthesizing a color signal or a video signal such as a signal or a B signal and a color signal or a video signal such as an R signal, a G signal or a B signal from the fourth surveillance camera 14 for each horizontal scanning line, the color signal or A luminance signal and a color difference signal, which are digitized based on the video signal, may be formed.

As described above, a luminance signal or a color difference signal based on the color signal is formed by forming the luminance signal or the color difference signal based on the color signal such as the R signal, the G signal, or the B signal, or by separating from the analog video signal. When the luminance signal and the color difference signal are digitized, the luminance signal and the color difference signal are digitized and stored in the frame memory as the frame data storage means 71 and 75. Can be digitized so as to subdivide the amount of change in the signal, and the dynamic range of the luminance signal or the color difference signal can be increased to obtain accurate signal data.
Then, combined with the fact that the frequency of the read clock is increased to increase the read speed, it is possible to form a composite analog video signal in which the luminance and color are reproduced with high accuracy.

Furthermore, the color of the even field is the same for each surveillance camera.
Although there may be a slight color shift with respect to the color of the video signal formed in 11 to 14, even if the color projected on the monitor screen differs from the primary color, it is not conspicuous and the signal data amount of the color difference signal is reduced. Since it is sufficient to store only one field, it is possible to reduce the memory capacity required for the color difference signal frame data.

When forming an analog video signal by the signal data output from the first frame data storage means 71 and the second frame data storage means 75, an analog video signal in which a color difference signal is superimposed on a luminance signal is formed. Not only that, the analog luminance signal is formed based on the signal data of the luminance signal, the analog color difference signal is formed based on the signal data of the color difference signal, and the analog luminance signal and the analog color difference signal are input to the monitor television 17. Sometimes.

[0075]

According to the present invention described in claim 1, a luminance signal or a color difference signal is formed based on a color signal such as an R signal, a G signal and a B signal, and the luminance signal and the color difference signal are digitized respectively. Since the signal data is recorded in the luminance signal frame memory and the color difference signal frame memory, changes in the luminance signal and the color difference signal can be accurately digitized and recorded in each frame memory.

Then, the read speed at the time of reading the signal data from the plurality of luminance signal frame memories and the plurality of color difference signal frame memories is increased to read all the signal data in one frame time. Since the analog video signal is reproduced based on the video signal, it is possible to form a video signal that correctly reproduces the video image captured by each surveillance camera, and a high-definition video image can be displayed according to the resolution of the monitor television.

Further, the frame memory for color difference signals has 1
Storing 1 field of signal data for each frame,
Since this signal data is continuously read twice, a frame memory for the color difference signal is used, and a memory having a smaller capacity than the memory for the luminance signal is used to form a video signal for one frame. The necessary signal data can be stored in the memory.

Therefore, it becomes possible to form an analog video signal for synthesizing the video images taken by a plurality of surveillance cameras by using all the signal data of each horizontal scanning line, and the video images shot by each surveillance camera are reproduced correctly. It can be output from the image synthesizing circuit as a video signal. Therefore, a high-definition image can be displayed according to the resolution of the monitor television.

Further, the present invention according to claim 2 is an image synthesizing method in which two frame data storage means are provided and two surveillance cameras are connected to each frame data storage means through the switching means. It is possible to combine the images of the four monitoring cameras, reduce the deterioration in resolution, and form an image signal for simultaneously displaying the images of the plurality of monitoring cameras.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a surveillance camera system for implementing an image synthesizing method according to the present invention.

FIG. 2 is a time chart diagram showing main signals of odd fields in a surveillance camera system that implements an image synthesizing method according to the present invention.

FIG. 3 is a time chart diagram showing main signals of even fields in a surveillance camera system that implements an image synthesizing method according to the present invention.

FIG. 4 is a diagram showing an example of a video signal by an image synthesizing method according to the present invention.

FIG. 5 is a block diagram showing an example of a monitoring system including a conventional image synthesizing circuit.

FIG. 6 is a time chart diagram showing main signals in a conventional image synthesizing circuit.

FIG. 7 is a block diagram showing an example of a monitoring system including another conventional image synthesizing circuit.

[Explanation of symbols]

11 First Surveillance Camera 12 Second Surveillance Camera 13 Third Surveillance Camera 14 Fourth Surveillance Camera 15 Video Signal Processing Circuit 17 Monitor Television 19 Reference Sync Signal Generator 20 Image Synthesizer 21 Analog-to-Digital Converter 25 Control 27 Synchronous Synthesizer 28 amplification circuit 29 digital-analog conversion circuit 31, 32, 33, 34 frame memory 36, 37, 38, 39 switch element 41, 42 selector 50 image synthesis circuit 53 digital signal processor 55 control unit 56 digital encoder 57 synchronous synthesis circuit 58 amplification Circuit 61 Clock generation means 62 Oscillation circuit 63 Frequency divider circuit 71 First frame data storage means 72 First luminance signal frame memory 73 First color difference signal frame memory 75 Second frame data storage means 76 Second luminance signal frame memory 77th Frame memory 81 first selector 82 second selector for color difference signals

Claims (2)

(57) [Claims] 1. An R signal, a G signal, formed by a surveillance camera,
A luminance signal and a color difference signal are formed on the basis of a color signal such as a B signal, and video signals from a plurality of surveillance cameras are switched for each horizontal scanning line, and the signal data of the luminance signal for one frame is used for the luminance signal. A frame signal for a luminance signal, which is recorded in the frame memory, and the signal data for one field is recorded for each frame in the frame memory for the color difference signal and the signal data of the plurality of surveillance cameras is recorded. And a frame memory for color difference signals
A plurality of sets of frame data storage means are used as a set, and the number of surveillance cameras connected to each frame data storage means via the switching means is made equal to the number of sets of frame data storage means, and a signal for one field is set. The data is read from one frame data storage means, and when this reading is completed, the signal data is sequentially read from each frame data storage means so that the signal data for one field is read from the next frame data storage means, and the frame is stored. The reading from the luminance signal frame memory in the data storage means alternately reads the odd field signal data and the even field signal data, and the color difference signal frame memory is read for one recorded field. Repeat the signal data twice and read each frame The reading speed of the signal data from the data storage means is made faster than the writing speed of the signal data to each frame data storage means so that all the signal data for each one field in all the frame data storage means can be processed in one field time. An image synthesizing method for a surveillance camera system, which comprises reading out and forming an analog video signal based on the signal data. 2. Four monitoring cameras are provided, two sets of frame data storage means are provided, and two monitoring cameras are connected to the frame data storage means via the switching means, and a read clock of the frame data storage means is provided. The image synthesizing method for a surveillance camera system according to claim 1, wherein the frequency is set to twice the frequency of the write clock.