JPH01151887A - High definition television signal system converter - Google Patents

Abstract

PURPOSE:To prevent misoperation or the like at conversion processing by displaying a frame displaying an area of conversion into a signal of other television standard system onto a screen of a high definition television set so as to easily confirm the converted area. CONSTITUTION:A cursor (frame) K representing the conversion area is displayed on a screen SHD of a high definition television set in response to a horizontal position address Ax, a vertical position address Ay and a mode switching signal MS from a conversion area designation circuit 4. Then the horizontal deflection DELTAx and the vertical deflection DELTAy of the center position of the cursor K vary by turning, for example, a rotary dial 4a for adjusting horizontal direction and a rotary dial 4b for adjusting vertical direction of the conversion area designation circuit 4. Thus, the present conversion area is confirmed visually clearly and misoperation at the conversion processing or the like is prevented in advance.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a high-definition television signal format conversion device for converting a high-definition television signal to a signal of another television standard format.

B1 Summary of the Invention The present invention provides a high-definition television signal format conversion device that converts a high-definition television signal into a signal of another television standard format, in which a high-definition television signal of another television standard format is displayed on the screen of the high-definition television. By displaying a frame indicating the area to be converted into a signal, the conversion area can be easily confirmed.
This is to prevent erroneous operations during conversion processing.

C0 Conventional technology So-called high-definition or high-definition television signals,
A high-definition television signal format converter (so-called HDvS down converter) is used to convert signals to other television standard formats such as NTSC and PAL. In this high-definition television signal format conversion device, the difference in so-called aspect ratio (ratio of horizontal 2'H of the screen) of each format (in the high-definition television format, 5
:3, and 4:3 for NTSC and PAL systems), several types of conversion modes are prepared.

In other words, in the example of FIG. 5, the screen S of a high-definition television
, 1D (aspect ratio 5:3) is cut by approximately 20% in the horizontal direction as shown by the imaginary line in the figure, thereby creating an NTSC (or PAL, etc.) screen SH? (aspect ratio 4:3), and the cutting position can be specified. Next, in the example of FIG. 6, there is a non-display area (blank area) BL at the top and bottom positions in the screen SNT of the above-mentioned NT-SC system, etc.
By providing a display area DP with an aspect ratio of 5:3, a high-definition television screen S can be placed within this area DP.
, I, is displaying an image with an aspect ratio of 5=3. Furthermore, in the example of FIG. 7, within the screen S0 of the high-definition television, a rectangular region CR with an area of about 1/4 and a width:height ratio of 4:3 is defined as shown in the virtual line in the figure. N.T.
This conversion area CR is set as the area to be converted to the SC method etc.
A signal for screen SNT such as the NTSC system is obtained from the image content.

In this case, since a high-definition television image has approximately twice the number of pixels in both the vertical and horizontal directions as an NTSC image, the screen S. Sufficient image quality can be obtained even if the conversion area CR is approximately 1/4 of the area of . At this time, the extraction position of the conversion area CR can be set arbitrarily.

Problems to be solved by the D1 invention By the way, it is possible to convert high-definition television signals into NTS
When converting to a signal of a television standard system such as C system or PAL system, simply comparing the screen S and ID of the above-mentioned high-definition television with the screen SNT of NTSC system, etc. will not help you understand which of the screens S0 The drawback is that it is difficult to determine whether a portion is currently being extracted and converted. This is because, for example, when changing the screen SN and the extraction point in the screen depending on the content, it is difficult to make an instantaneous judgment, so the switching operation of the extraction point is delayed, and the important There is a possibility that an inconvenience may occur in which the location is not displayed on the screen SSt.

The present invention has been made in view of the above circumstances, and it is possible to clearly confirm the portion of the screen of the high-definition television that is converted to the television standard system such as the NTSC system or the PAL system. The purpose of the present invention is to provide a high-definition television signal format conversion device.

Means for Solving the E1 Problem The high-definition TVIL signal system converter according to the present invention has the following features:
In order to solve the above-mentioned problems, we have provided a signal format conversion circuit that converts high-definition television signals into signals of other television standard formats and can select the expansion rate of the conversion area, and a conversion area position designation circuit that generates a signal specifying the position of an area in the horizontal and vertical directions for converting a television signal into a signal of the other television standard format; an output signal of the conversion area position determination circuit; The present invention is characterized by comprising a frame signal generation circuit that generates a frame signal indicating the conversion area in accordance with an enlargement rate of the conversion area in the signal conversion circuit.

F1 effect A frame indicating the conversion area is displayed on the screen of a high-definition television by the frame signal from the frame signal generation circuit, so that the portion to be converted to the television standard format such as the NTSC system or PAL system is displayed. This can be clearly confirmed on the screen of a high-definition television, and inconveniences caused by erroneous operations can be avoided.

G. Example Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 shows a schematic circuit configuration of an embodiment of a high-definition television signal format converter according to the present invention.

In FIG. 1, an input terminal 1 is supplied with a so-called high definition or high definition television signal. This high-quality television broadcast signal is supplied to a signal format conversion circuit 2, which converts it into a signal of another television standard format and outputs it from an output terminal 3. The signal format conversion circuit 2 is configured to be able to select the magnification ratio of an area (conversion area) for converting a high-definition television signal into a signal of another television standard format such as the NTSC system or PAL system. The specific configuration and operation of this signal system conversion circuit 2 will be described later. The conversion area position designation circuit 4 is for generating a signal for specifying the position of the conversion area in the horizontal and vertical directions, and for example, rotates the rotary dials 4a and 4b.
The horizontal and vertical positions of the conversion area can be adjusted by manually rotating the conversion area. In response to the output signal from the conversion area position specifying circuit 4 (and the expansion rate of the conversion area in the signal conversion circuit, specifically the switching mode information of the mode switching signal MS to be described later), the frame signal generation circuit 5 A frame signal (cursor signal) for displaying a frame or cursor indicating the conversion area is generated.

This cursor signal is sent to a video signal adder 6 where it is added to the high-definition television broadcast signal, and sent via an output terminal 7 to a high-definition television monitor receiver or the like.

FIG. 2 shows an example of a monitor image on a high-definition television monitor receiver, in which a frame (cursor) K indicating the conversion area is displayed within the screen S and ID. This cursor is displayed with two colored frames that can be clearly distinguished from each other, for example, a black frame with a double frame of 1 and a white frame Kw, in consideration of the case where an image of the same color as the cursor appears on the screen. is being carried out. As a result, the cursor K can be clearly seen even when a blackish image or a whiteish image is displayed on the screen.

Next, a more specific configuration and operation of this embodiment, particularly a specific configuration and operation of the signal system conversion circuit 2, will be described. Here, the specific signal system conversion circuit 2 shown in FIG.
, the mode shown in FIG. 5 described above (a mode in which 20% of the horizontal direction on the screen of a high-definition television is cut off to obtain an image of approximately the same size, hereinafter referred to as the same-size mode) and the mode shown in FIG. By making it possible to select the mode shown in FIG. 7 (a mode in which approximately 1/4 area is taken out and enlarged approximately 4 times, hereinafter referred to as 4x mode) according to the mode switching signal MS, Although it is possible to select the magnification rate of the conversion area described above, it may also be configured to enable selection of switching to the mode shown in FIG. 6, or selection of an arbitrary magnification rate.

Furthermore, it is assumed that the high-definition television signal input through the input terminal l is a digital signal, and 1
It is assumed that, for example, about 2000 samples of pixel data are allocated to each line (horizontal scanning line) of 1125 lines on the screen. On the other hand, the television standard format to be converted is the NTSC format, which is 525 pixels per duplex.
It is assumed that the conversion is performed so that, for example, 910 samples of pixel data are obtained for each line.

The high-definition television signal supplied from the input terminal 1 to the signal format conversion circuit 2 shown in FIG. The signal read from the line memory 21 is sent to the line interpolation circuit 22, and further sent to the frame memory 23, so that 1125 to 5
Line number conversion processing is performed with line interpolation to extract 25 lines (or 1050 lines), and the result is output.

Specifically, the signal system conversion accompanied by such line number conversion is, for example, first proposed by the applicant in Japanese Unexamined Patent Publication No. 62-178083.
However, since this signal conversion technology itself is not the gist of the present invention, the overall schematic configuration and operation thereof will be briefly described.

The digital video data of the high-definition television signal sent to the line memory 21 (for example, 20
00 samples) are written to the line memory 21 according to the write address from the write address generation circuit 25, read from the line memory IJ21 according to the successive address from the successive address generation circuit 26, and For example, the number of samples is about 910. Here, in the write address generation circuit 25, a fixed initial address A8 is generated for each horizontal synchronization signal HIID of the high-definition television signal.
゜ (for example, 0) is loaded, and a count value that is incremented by 1 according to the period of a predetermined sampling clock is output as a write address. , in the successive address generation circuit 26, the initial address A corresponding to the horizontal tip position of the conversion area from the conversion area position specifying circuit 4 is the horizontal synchronization signal H of the high-definition television signal.
A count value that is loaded every 1 and incremented by 2 (or by 1) according to the cycle of a predetermined clock signal on the NTSC television signal side is output as a successive address. In this case, as the successive address, by using the count value that is incremented by 2 in the above-mentioned same-size mode, the screen S in Fig. 3 can be used.
Approximately 1542 minutes of data (approximately 80% of one line) can be read from the initial address A8 in the horizontal direction of the conversion area on the HD. In addition, in the quadruple mode, the count value incremented by 1 is used as the successive address, and approximately 1 line from the initial address A in the horizontal direction of the conversion area on the screen SMD in FIG. 4 is used.
/2 data can be read.

Next, in the line interpolation circuit 22, an interpolation filter is used to convert the NTS
By processing to form 7 lines (or 14 lines) in the C method, 1!25 lines per screen are converted into 525 lines (or 1050 lines) and sent to the frame memory 23. In this case, the switching selection of forming 7 lines or 14 lines from the 15 lines is performed according to the mode switching signal MS,
Seven lines are formed in the 1x mode, and 14 lines are formed in the 4x mode.

The digital video data sent from the line interpolation circuit 22 to the frame memory 23 is written to the memory 23 according to the write address from the write address generation circuit 27, and is written to the memory 23 according to the read address from the successive address generation circuit 28. 23. Write address generation circuit 27
In this case, the initial address A is constant for each vertical synchronization signal VNI+ of the high-definition television signal. (For example O)
is loaded and outputs a count value incremented by 1 in response to a predetermined line switching signal as a write line address. In the successive address generation circuit 28,
The initial address A corresponding to the vertical tip position of the conversion area from the conversion area position designation circuit 4 is loaded every vertical synchronization signal vHy of the NTSC system, and is loaded in response to the horizontal synchronization signal H1 of the television signal of the NTSC system. The incremented count value is output as the successive line address. Note that for one line address in these address generation circuits 27 and 28, one line's worth of scanning is performed by sequentially incrementing the dot address for specifying each dot on the line. Of course, it is repeated for each address. Further, the initial address A of the successive address generation circuit 28 is valid only in the quadruple mode in the sense of specifying the vertical tip position of the conversion area shown in FIG.
When in the above-mentioned equal magnification mode, it is sufficient to fix it to a predetermined value (for example, O), and for this switching, the above-mentioned mode switching signal M
S-1 - Supplied to the successive address generation circuit 2B. In other words, in the same magnification mode, the digital video signal itself sent from the line interpolation circuit 22 to the frame memory 23 is already 525 lines of data per screen, and the frame memory 23 does not process this signal. Whereas it only converts to a signal format that is synchronized with the vertical and horizontal synchronization signals of the NTSC system (and even and odd fields are interleaved).
In the quadruple mode, the digital video signal from the line interpolation circuit 22 includes data for 1050 lines, from which it is further necessary to extract 525 consecutive lines. At this time, the start address of the 525 lines that are successively extracted from the 1050th line is the initial address Ay.

Further, by supplying the frame signal generation circuit 5 with the horizontal tip position address A8 and the vertical tip position address A of the conversion area, and the mode switching signal MS,
As shown in FIG. 3 or 4, a cursor (frame) K indicating the j
A frame signal for displaying is sent to the video signal addition circuit 6.

As is clear from the above explanation, depending on the horizontal position address A and the vertical position address Ay from the conversion area specifying circuit 4, and the mode switching signal MS,
As shown in FIG. 3 or 4, a cursor (frame) K indicating a conversion area is displayed on the screen SND of the high-definition television, and a rotary dial 4a for adjusting the horizontal position of the conversion area specifying circuit 4 is displayed. By rotating the rotary dial 4b for vertical position adjustment, the horizontal deviation amount ΔX and the vertical deviation amount Δy of the center position of the cursor shown in FIG. 3 or 4 are changed. This allows the current conversion area to be clearly viewed.

Note that the present invention is not limited to the above-mentioned embodiments. For example, although a digital signal is assumed as the high-definition television signal inputted through the above-mentioned terminal 1, an analog signal may also be used. In this case, the line memory 2 and the like are constructed using an LPF (low pass filter), a sampling circuit, a CCD analog memory, and the like. In addition, various modifications can be made without departing from the gist of the present invention.

H1 Effects of the Invention According to the high-definition television signal format conversion device according to the present invention, an area (I conversion area) for converting a high-definition television signal into a signal of another television standard format such as the NTSC system is shown. A frame is displayed on the screen of the high-definition television, and this frame also changes according to operations such as specifying the conversion area position.
Since the current conversion area is always displayed, the conversion area can be visually confirmed easily and accurately, and erroneous operations during conversion processing can be prevented. Further, according to the embodiment of the present invention, the cursor (frame) is displayed as a double frame of colors that can be clearly distinguished from each other, such as black and white, so no matter how the color of the image content changes, The cursor is clearly visible.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing a schematic circuit configuration of a high-definition television signal format converter according to an embodiment of the present invention;
2 to 4 are plan views showing the screen of a high-definition television for explaining the operation of this embodiment, and FIGS. 5 to 7 are plan views showing high-definition television
FIG. 3 is a diagram for explaining an example of conversion to a television standard format such as L format. 1... High-quality television signal input terminal 2... Signal system conversion circuit 3...
...Output terminal 4 for NTSC television signal ...... Conversion area position designation circuit 5 ...
......Frame signal generation circuit 6...
Video signal addition circuit 7......Monitor output terminal 21 for high-quality television signals...Line memory 22...Line interpolation circuit 23...・・・・・・Frame memory

Claims (1)

[Claims] A signal format conversion circuit that converts a high-definition television signal into a signal of another television standard format and is capable of selecting an enlargement ratio of the conversion area; a conversion area position designation circuit that generates a signal specifying the position of the area to be converted into a signal of the other television standard format in the horizontal and vertical directions; and an output signal of the conversion area position designation circuit and the signal conversion circuit 1. A high-definition television signal format conversion device comprising: a frame signal generation circuit that generates a frame signal indicating the conversion area in accordance with an enlargement rate of the conversion area.