JPH0364057A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPH0364057A
JPH0364057A JP20052889A JP20052889A JPH0364057A JP H0364057 A JPH0364057 A JP H0364057A JP 20052889 A JP20052889 A JP 20052889A JP 20052889 A JP20052889 A JP 20052889A JP H0364057 A JPH0364057 A JP H0364057A
Authority
JP
Japan
Prior art keywords
die pad
lead frame
inner lead
wire
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20052889A
Other languages
Japanese (ja)
Inventor
Hiroaki Seki
博昭 関
Taeko Nakamura
中村 多恵子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP20052889A priority Critical patent/JPH0364057A/en
Publication of JPH0364057A publication Critical patent/JPH0364057A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To decrease wire bonding steps and obtain a highly reliable lead frame by providing a joint between an inner lead and a die pad. CONSTITUTION:A semiconductor element 3 is fixed on a die pad which is provided at a lead frame and further, a joint 6 is provided so as to connect electrically an inner lead 1 to the die pad 5. As it is unnecessary to perform bonding of a wire 2 to the die pad 5 according to the above-mentioned structure even on the occasion of depressing the die pad 5, the steps of wire bonding are decreased and even the reliability of wire bonding is improved as well. Further, the thickness of the joint 6 is made to be almost 1/3 thinner than that of the inner lead 1 and it is preferable that each stress is not given to the inner lead 1 and the die pad 5 even in the case where die pad 5 is depressed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明はリードフレームに関し、特にインナーリード
とダイパットの構造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a lead frame, and particularly to the structure of an inner lead and a die pad.

〔従来の技術〕[Conventional technology]

第3図は従来のリードフレームと半導体素子の装着状態
を示す部分斜視図で、図にかいて、(l)はリードフレ
ームのインナーリードで、ワイヤ(2)によって半導体
素子(3)上に形成された電極バット(4)と電気的に
接続されている。
FIG. 3 is a partial perspective view showing the mounting state of a conventional lead frame and a semiconductor element. It is electrically connected to the electrode batt (4).

また、半導体素子(3)はリードフレームに設けられた
ダイバ7トt61上に固定されている。
Further, the semiconductor element (3) is fixed on a diver 7t61 provided on the lead frame.

半導体装置では第4図に示すように、ワイヤ(2)の長
さをできる限シ短かくするために、半導体素子(3)上
の電極バット(4)とインナーリード[11の高さを合
わせるダイパット沈めの構造が取られている。
In a semiconductor device, as shown in Fig. 4, in order to make the length of the wire (2) as short as possible, the height of the electrode butt (4) on the semiconductor element (3) and the inner lead [11] are matched. It has a structure where the die pad is sunk.

このような構造にかいて、半導体素子(3)の裏面にあ
る電位を与えるために、任意のインナーリード(1)と
ダイパット(5)を電気的に接続するには、ワイヤ(2
)をダイパット(6)に接続する方法が取られている。
In such a structure, in order to electrically connect any inner lead (1) and die pad (5) in order to apply a certain potential to the back surface of the semiconductor element (3), a wire (2
) to the die pad (6).

この場合、ダイパット(5)沈めの構造ではインナーリ
ード[11とダイパッド(5)とに高さの差があるため
にボンディングに不都合が生じる。
In this case, in the structure where the die pad (5) is sunk, there is a difference in height between the inner lead [11] and the die pad (5), which causes problems in bonding.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のリードフレームは以上のように構成されていたの
で、ダイパットとインナーリードの高低差のためワイヤ
ボンドが行ないに<<、またワイヤも長くなるために信
頼性上も好ましくないという問題点があった。
Conventional lead frames were constructed as described above, but there were problems in that wire bonding was difficult due to the difference in height between the die pad and the inner leads, and the wires were also long, which was unfavorable in terms of reliability. Ta.

この発明は上記のような問題点を解決するためになされ
たもので、ワイヤボンドを1箇所不要とし信頼性の向上
を図ることを目的とする。
This invention was made to solve the above-mentioned problems, and aims to eliminate the need for one wire bond and improve reliability.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係るリードフレームは、インナーリードとダ
イパットとの間にリードフレームと同様の材料を用いた
接続部分を設けたものである。
The lead frame according to the present invention has a connecting portion made of the same material as the lead frame between the inner lead and the die pad.

〔作用〕[Effect]

この発明にかけるリードフレームは、一部のインナーリ
ードとダイパットが接続部分によって電気的に接続され
ている。
In the lead frame according to the present invention, some of the inner leads and the die pad are electrically connected by a connecting portion.

〔実施例〕〔Example〕

以下、この発明の一実施例を図につい説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図会よび第2図にかいて、(1)はインナーリード
で、ワイヤ(2)によって半導体素子(3)上に形成さ
れた電極バット(4)と電気的に接続されている。
In FIGS. 1 and 2, (1) is an inner lead, which is electrically connected to an electrode bat (4) formed on a semiconductor element (3) by a wire (2).

また、半導体素子(3)はリードフレームに設けられた
ダイパット上に固定されてかり、ワイヤ(2)の長さを
できるかぎシ短かくするためにダイパット(5)の沈め
の構造が取られている。
Further, the semiconductor element (3) is fixed on a die pad provided on the lead frame, and the die pad (5) has a sunken structure in order to shorten the length of the wire (2) as much as possible. There is.

筐た、インナーリード(11とダイパッド(5)を電気
的に接続するために接続部(6)を設けた構造となって
いる。
The structure includes a connection part (6) for electrically connecting the inner lead (11) and the die pad (5).

次に動作について説明する。Next, the operation will be explained.

第2図に示すように、インナーリード(りとダイパット
(6)とを電気的に接続するために接続部(6)をリー
ドフレームに設けたので、ダイパット(5)の沈めを行
なった際にもワイヤ(2)を夕°イバット(5)にボン
ディングする必要が無いので、ワイヤボンドを減らすこ
とができ、その信頼性も向上する。また、接続部(6)
はインナーリード(11よりも173程度に薄くシ、ダ
イパット(5)の沈めを行なう時にもインナーリード(
りとダイパット(6)にストレスを与えることも少ない
As shown in Figure 2, a connection part (6) is provided on the lead frame to electrically connect the inner lead and the die pad (6), so when the die pad (5) is sunk, Since there is no need to bond the wire (2) to the connecting part (5), the number of wire bonds can be reduced and its reliability is improved.
The inner lead (173) is thinner than the inner lead (11), and the inner lead (173) is thinner when sinking the die pad (5).
There is also less stress on the die pad (6).

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、インナーリードとダイ
パッドとの間に接続部を設けたので、ワイヤボンドを減
らすことができ信頼性の高いリードフレームが得られる
効果がある。
As described above, according to the present invention, since the connection portion is provided between the inner lead and the die pad, the number of wire bonds can be reduced and a highly reliable lead frame can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、この発明の一実施例によるリードフレームを
示す斜視図、第2図は第1図リードフレームを使用した
半導体装置の断面図、第3図は従来のリードフレームと
半導体素子の接続状態を示す部分斜視図、第4図は従来
の半導体装置を示す部分断面図である。 図にかいて、(1)はインナーリード、(21#′iワ
イヤ、(3)は半導体素子、(4)は電極パラ)、+5
1はダイパット、(6)は接続部を示す。なか、図中同
一符号は同一、又は相当部分を示す。
FIG. 1 is a perspective view showing a lead frame according to an embodiment of the present invention, FIG. 2 is a sectional view of a semiconductor device using the lead frame shown in FIG. 1, and FIG. 3 is a conventional connection between a lead frame and a semiconductor element. FIG. 4 is a partial perspective view showing the state, and FIG. 4 is a partial cross-sectional view showing the conventional semiconductor device. In the figure, (1) is the inner lead, (21#'i wire, (3) is the semiconductor element, (4) is the electrode parallel), +5
1 is a die pad, and (6) is a connecting portion. In the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 一部のインナーリードとダイパットの間に電気的接続部
分を設けたことを特徴とするリードフレーム。
A lead frame characterized by having an electrical connection part between some inner leads and a die pad.
JP20052889A 1989-08-01 1989-08-01 Lead frame Pending JPH0364057A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20052889A JPH0364057A (en) 1989-08-01 1989-08-01 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20052889A JPH0364057A (en) 1989-08-01 1989-08-01 Lead frame

Publications (1)

Publication Number Publication Date
JPH0364057A true JPH0364057A (en) 1991-03-19

Family

ID=16425810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20052889A Pending JPH0364057A (en) 1989-08-01 1989-08-01 Lead frame

Country Status (1)

Country Link
JP (1) JPH0364057A (en)

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