JPH0362053B2 - - Google Patents
Info
- Publication number
- JPH0362053B2 JPH0362053B2 JP58143356A JP14335683A JPH0362053B2 JP H0362053 B2 JPH0362053 B2 JP H0362053B2 JP 58143356 A JP58143356 A JP 58143356A JP 14335683 A JP14335683 A JP 14335683A JP H0362053 B2 JPH0362053 B2 JP H0362053B2
- Authority
- JP
- Japan
- Prior art keywords
- field effect
- transistor
- effect transistor
- drain
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
- H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58143356A JPS6033734A (ja) | 1983-08-05 | 1983-08-05 | レベルシフト回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58143356A JPS6033734A (ja) | 1983-08-05 | 1983-08-05 | レベルシフト回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6033734A JPS6033734A (ja) | 1985-02-21 |
JPH0362053B2 true JPH0362053B2 (enrdf_load_stackoverflow) | 1991-09-24 |
Family
ID=15336878
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58143356A Granted JPS6033734A (ja) | 1983-08-05 | 1983-08-05 | レベルシフト回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6033734A (enrdf_load_stackoverflow) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3676018B2 (ja) * | 1997-02-25 | 2005-07-27 | シャープ株式会社 | 電圧レベルシフター回路 |
FR2868629B1 (fr) * | 2004-04-05 | 2006-08-25 | Atmel Corp | Detecteur de tension de seuil differentiel |
US7692453B2 (en) | 2004-08-11 | 2010-04-06 | Atmel Corporation | Detector of differential threshold voltage |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1175503A (en) * | 1981-07-17 | 1984-10-02 | Andreas Demetriou | Cmos turn-on circuit |
-
1983
- 1983-08-05 JP JP58143356A patent/JPS6033734A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6033734A (ja) | 1985-02-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5874851A (en) | Semiconductor integrated circuit having controllable threshold level | |
EP0884849B1 (en) | Voltage-level shifter | |
EP0205104A2 (en) | Intermediate potential generation circuit | |
US7456662B2 (en) | Differential circuit, output buffer circuit and semiconductor integrated circuit for a multi-power system | |
JPH07105448B2 (ja) | Mos型集積回路 | |
US5565795A (en) | Level converting circuit for reducing an on-quiescence current | |
US7358790B2 (en) | High performance level shift circuit with low input voltage | |
JPH0786917A (ja) | インバータ回路 | |
JPH0362053B2 (enrdf_load_stackoverflow) | ||
JPH09148913A (ja) | 高電位差レベルシフト回路 | |
JP2788890B2 (ja) | レベルシフト回路 | |
JP3540401B2 (ja) | レベルシフト回路 | |
US6335649B1 (en) | Schmitt trigger circuit | |
JPH0543212B2 (enrdf_load_stackoverflow) | ||
JPS58129830A (ja) | 変換回路 | |
US6329842B1 (en) | Output circuit for electronic devices | |
JPH06197001A (ja) | レベル変換回路 | |
US8742855B2 (en) | Feed-forward ring oscillator | |
JPH0795046A (ja) | Cmos型インバータ回路 | |
JPH11145413A (ja) | 半導体集積回路装置 | |
JPS594890B2 (ja) | デイジタル回路 | |
JP2550942B2 (ja) | Cmos型論理集積回路 | |
JPH036693B2 (enrdf_load_stackoverflow) | ||
JPH0720061B2 (ja) | 半導体集積回路 | |
JP3171518B2 (ja) | Bimos回路 |