JPH0359454B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a selection method for a plurality of file devices connected in series.

(Prior art) Conventionally, a file control device 2 as shown in FIG.
01 and a plurality of file devices 210 to 213 connected in series to the file control device 201, the following method is adopted to select one file device. That is, as shown in FIG. 3, a file control device 301 and file devices 310 to 31
3 is an instruction bus 320.
, a command bus valid signal line 321 , a file device address bus 322 , and a file device selection completion signal line 323 .
Each file device has its own address memory 40 for storing its own address as shown in FIG.
1, and when the state of the command bus valid signal line 402 becomes "1", the command applied to the command bus 403 is decoded by the command decode circuit 404, and if the command is a file device selection command, the signal line 405 is decoded. outputs an instruction bus valid signal to self-address memory 4.
An address comparison circuit 407 compares the contents of 01 with the address on the file device address bus 406. If the two match, a file device selection completion signal is output onto the signal line 408 and sent to the file control device 201.

By giving different addresses to each file device as described above, one file device can be selected from among the plurality of file devices 210 to 213.

In recent years, in order to improve the reliability of data stored in files, methods have been considered in which one data block is stored in two file devices. This is what is called double writing of files, and in order to implement this method with the file subsystem shown in FIG. 2, the following procedure can be used.

That is, for example, a pair of file devices 21
In order to store the same data in 0 and 211 at the same time, the addresses of each of the file devices 210 and 211 are set to the same address value.
By setting in this way, the file devices 210 and 211 can be selected at the same time, and the same data can be stored at the same time.

(Problem to be Solved by the Invention) However, as explained above, when two file devices have the same address, it is possible to write files twice; For the control device, it becomes impossible to control each file device individually, and if a failure occurs in one of the two file devices, for example, it will be difficult to recover from the failure. There were flaws.

An object of the present invention is to realize double writing of files by having two different file devices simultaneously have a first address and a second address, and to have a file control device control each file device. It is an object of the present invention to provide a file device selection method that eliminates the above-mentioned drawbacks by allowing individual control, and improves reliability and maintainability at the same time.

(Means for Solving Problems) The file device selection method according to the present invention includes a file control device, a plurality of file devices connected in series to the file control device, and an interface between the file control device and the file device. It is composed of Ace and Ace.

The above interface includes an instruction bus, an instruction bus enable signal line, a file device address bus,
This line consists of a file device selection completion signal line.

Each of the above file devices includes first and second address memories, an address selection circuit, an instruction decode circuit, and a comparison circuit.

The first address memory provides a first address, and the second address memory provides a second address.

The address selection circuit selects the first address memory when it is enabled by the instruction bus valid signal line and the instruction on the instruction bus is the first instruction, and is enabled by the instruction bus valid signal line. This is for selecting the second address memory when the command on the designated command bus is the second command.

The instruction decode circuit decodes information on the instruction bus and sends the first instruction or the second instruction to the address selection circuit.

The comparison circuit is for comparing the address selected by the address selection circuit with the file device address on the file device address bus.

In the present invention, the file device selection method is configured such that information on the file device selection completion signal line is sent to the file control device only when the comparison result shows a match.

(Example) Next, the present invention will be described in detail with reference to the drawings.

In FIG. 1 showing an embodiment of the present invention, an embodiment of the system for realizing the file device selection method of the present invention includes a first address memory 101, a second address memory 102, and an instruction decoding circuit 103. , an address selection circuit 104 , and an address comparison circuit 105 . 1st
In the figure, 110 is an instruction bus valid signal, 111 is an instruction bus, 112 is a file device address bus,
113 is a file device selection completion signal.

In FIG. 1, when the state of the instruction bus valid signal sent from the file control device via the signal line 110 becomes "1", the instruction decode circuit 103 decodes the instruction bus 111 data. If the data is the first command, the data on signal line 120 is sent to address selection circuit 104. When the address selection circuit 104 receives the data on the signal line 120, it selects the first address memory 101 and sends its contents to the address comparison circuit 105. The address bus comparison circuit 105 compares the data on the file device address bus 112 with the contents of the first address memory sent via the address selection circuit 104, and if they match, outputs a file device selection completion signal. It is sent to the file control device via the signal line 113.

On the other hand, if the data on the command bus 111 is the second command, the command decode circuit 103 sends the data on the signal line 121 to the address selection circuit 104. The address selection circuit 104 is connected to the signal line 121
Upon receiving the above data, the contents of the second address memory 102 are selected and the address comparison circuit 105 selects the contents of the second address memory 102.
Send to. The address comparison circuit 105 compares the data on the file device address bus 112 with the contents of the second address memory sent from the address selection circuit 104, and if they match, sends a file device selection completion signal to the signal line 113. The data is sent to the file control device via the file controller.

(Effects of the Invention) As explained above, the present invention prevents double writing of files by providing two addresses in each file device and selecting an address to be compared according to a command from a file control device. This has the effect of simultaneously realizing individual control of file devices.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the file device selection method according to the present invention. FIG. 2 is a block diagram showing a typical file subsystem. FIG. 3 is a block diagram showing a typical interface between a file controller and a file device. FIG. 4 is a block diagram showing an example of a conventional file device selection method. 101, 102, 401...address memory,
103, 404...Instruction decoding circuit, 104...
...Address selection circuit, 105,407...Address comparison circuit, 201,301...File control device, 210-213,310...File device,
110-113, 120, 121, 320-32
2,402,403,405,406...Signal line.

Claims (1)

[Claims] 1. In a file device selection method comprising a file control device, a plurality of file devices connected in series to the file control device, and an interface between the file control device and the file device, the interface bus and
It consists of an instruction bus valid signal line, a file device address bus, and a file device selection completion signal line,
and each of the plurality of file devices has a first address memory for providing a first address, a second address memory for providing a second address, and is enabled by the instruction bus enable signal line. If the instruction on the instruction bus is enabled and the instruction on the instruction bus is the first instruction, the first address memory is selected; 2, an address selection circuit for selecting the second address memory; and an address selection circuit for decoding the information on the instruction bus and sending the first instruction or the second instruction to the address selection circuit. and a comparison circuit for comparing the address selected by the address selection circuit with the file device address on the file device address bus, and the result of the comparison indicates a match. A file device selection method characterized in that the information on the file device selection completion signal line is sent to the file control device only when the file device selection completion signal line is present.