JPH0353660B2 - - Google Patents

Info

Publication number
JPH0353660B2
JPH0353660B2 JP59044022A JP4402284A JPH0353660B2 JP H0353660 B2 JPH0353660 B2 JP H0353660B2 JP 59044022 A JP59044022 A JP 59044022A JP 4402284 A JP4402284 A JP 4402284A JP H0353660 B2 JPH0353660 B2 JP H0353660B2
Authority
JP
Japan
Prior art keywords
address
data
request
buffer memory
array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59044022A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60189553A (ja
Inventor
Makoto Kishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59044022A priority Critical patent/JPS60189553A/ja
Publication of JPS60189553A publication Critical patent/JPS60189553A/ja
Publication of JPH0353660B2 publication Critical patent/JPH0353660B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP59044022A 1984-03-09 1984-03-09 バッファメモリ制御方法 Granted JPS60189553A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59044022A JPS60189553A (ja) 1984-03-09 1984-03-09 バッファメモリ制御方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59044022A JPS60189553A (ja) 1984-03-09 1984-03-09 バッファメモリ制御方法

Publications (2)

Publication Number Publication Date
JPS60189553A JPS60189553A (ja) 1985-09-27
JPH0353660B2 true JPH0353660B2 (cs) 1991-08-15

Family

ID=12680034

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59044022A Granted JPS60189553A (ja) 1984-03-09 1984-03-09 バッファメモリ制御方法

Country Status (1)

Country Link
JP (1) JPS60189553A (cs)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63257854A (ja) * 1987-04-15 1988-10-25 Nec Corp Ｌｒｕメモリ障害検出回路
JPWO2007096998A1 (ja) * 2006-02-24 2009-07-09 富士通株式会社 キャッシュメモリ装置およびキャッシュメモリ制御方法

Also Published As

Publication number Publication date
JPS60189553A (ja) 1985-09-27

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