JPH0352248B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a current mirror circuit that operates stably under extremely low power supply voltage.

FIG. 1 is a wiring diagram of a conventionally well-known current mirror circuit. In the same figure, _a reference current is supplied from the collector side _of transistor ₁ through input terminal It is configured to take out the output current.

By the way, in FIG. 1, the transistor 5 is used for the purpose of improving the matching of input current and output current as much as possible. For example, if the transistor 5 is not used, the most common current mirror circuit can be constructed by connecting the base and collector of the transistor 1, but in that case, most of the reference input current is transferred to the transistor 1. , 2, 3, and 4. For example, if the DC current amplification factor of each transistor is 1
If it is set to 0, even if you apply a reference current of 100 μA and try to extract 100 μA of output current from each output terminal, you can actually extract only 70 μA, and the ratio of input current to output current is equal to the DC current amplification factor of each transistor. Therefore, the transistor 5 is indispensable in current mirror circuits that require precision.

However, by using the transistor 5, a problem arises in that the lower limit value of the power supply voltage applied to the positive power supply terminal B increases.

For example, if the base and collector of transistor 1 are connected, it will operate satisfactorily even if the power supply voltage drops below 1V, but if transistor 5 is used, and the power supply voltage becomes lower than 1.4V, transistor 5 and transistor There was a problem that the base current of No. 1 stopped flowing and the device stopped operating.

In addition to the circuit shown in Figure 1, there is a famous Wilson type current mirror circuit as a current mirror circuit that improves the matching of input current and output current. I needed more than double the amount and had the same problem.

The current mirror circuit of the present invention solves the above problems.

FIG. 2 is a circuit connection diagram of a current mirror circuit according to an embodiment of the present invention. In FIG. 2, the base and collector of a transistor 1 are connected, the collector is connected to a reference current input terminal X, and the emitter is connected via a resistor 6 to a positive feed line Ba. The base of the transistor 1 is connected to the base of the transistor 2, the emitter of the transistor 2 is connected to the plus side feed line Ba through the resistor 7, and the collector is of the complementary type to the transistors 1 and 2.
Connected to the base of NPN transistor 8.

Further, the emitter of the transistor 2 is connected to the emitter of a transistor 9, the base of the transistor 9 is connected to the collector of the transistor 8, and the collector is connected to a first current output terminal.
Connected to Y ₁ . A transistor 10 and a transistor 1 are connected to the base of the transistor 9.
1 is connected to the bases of the transistors 10,
The emitters of transistors 11 and 11 are connected to the positive feed line Ba through resistors 12 and 13, respectively, and the collectors of transistors 10 and 11 are connected to the second and second transistors, respectively.
It is connected to the third current output terminals Y ₂ and Y ₃ .

Note that the emitter of the transistor 8 is connected to the negative power supply line Ca.

Now, in the circuit shown in Figure 2, resistors 6, 7, 1
The resistance values of 2 and 13 are R ₆ , R ₇ , R ₁₂ , R ₁₃ respectively
and transistors 1, 2, 8, 9, 10, 1
The DC current amplification factors of 1 are β ₁ , β ₂ , β ₈ , β ₉ , respectively.
The base-emitter voltage is β ₁₀ and β ₁₁ , respectively.
If V _BE1 , V _BE2 , V _BE8 , V _BE9 , V _BE10 , and V _BE11 and the collector currents are I ₁ , I ₂ , I ₈ , I ₉ , I ₁₀ , and I ₁₁ , respectively, then the reference current input terminal _The reference current I _{x is} drawn in from _the reference current _I
The relationship between I _y2 and I _y3 (assuming that a load is connected to each output terminal) can be determined as follows.

I _x = I ₁ (1 + 1 / β ₁ ) + I ₂ / β ₂ ... (1) R ₆ I ₁ (1 + 1 / β ₁ ) + V _BE1 = R ₇ {I ₂ (1 + 1 / β ₂ ) + I ₉ (1 + 1 / β ₉ )}+
V _BE2 ……(2) I ₂ β ₈ ＝I ₈ ……(3) I ₈ ＝I ₉ ／β ₉ ＋I ₁₀ ／β ₁₀ ＋I ₁₁ ／β ₁₁ ……(4) R ₇ {I ₂ (1+1/ β ₂ )+I ₉ (1+1/β ₉ )}+V _BE9 = R ₁₂ I ₁₀ (1+1/β ₁₀ )+V _BE10 ……(5) R ₁₂ I ₁₀ (1+1/β ₁₀ )+V _BE10 = R ₁₃ I ₁₁ ( 1+1/β ₁₁ )+V _BE11 ...(6) I ₉ =I _y1 ...(7) I ₁₀ =I _y2 ...(8) I ₁₁ =I _y3 ...(9) Equations (3) and (4) Therefore, I ₂ = 1/β ₈ (I ₉ /β ₉ +I ₁₀ /β ₁₀ +I ₁₁ /β ₁₁ )...
(10) From equations (1), (2), (7), and (10), I _y1 = I _x −1/β ₈ {R ₇ /R ₆ (1+1/β ₂ )+
1/β ₂ } (I _y2 / β ₁₀ + I _y3 / β ₁₁ ) + V _BE1 −V _BE2 /R ₆
/R ₇ /R ₆ (1+1/β ₉ )+1/β ₈ β ₉ {R ₇ /R ₆ (1+
1/β ₂ )+1/β ₂ }……(11) From formulas (1), (2), (5), (8), and (10), I _y2 = I _x −1/β ₂ β ₈ ( I _y1 / β ₉ + I _y3 / β ₁₁ )
+1/β ₆ (V _BE9 −V _BE10 +V _BE1 −V _BE2 )/R ₁₂ /R ₆ (1
+1/β ₁₀ )+1/β ₂ β ₈ β ₁₀ ...(12) From formulas (1), (2), (5), (9), and (10), I _y3 = I _x 1/β ₂ β ₈ (I _y1 / β ₉ + I _y2 / β ₁₀ ) +
1/R ₆ (V _BE9 −V _BE10 +V _BE1 −V _BE2 )/R ₁₃ /R ₆ (1+1
/β ₁₁ )+1/β ₂ β ₈ β ₁₁ ...(13) Here, β ₂ , β ₈ , β ₉ , β ₁₀ , and β ₁₁ are all larger than 10, and the emitters of transistors 9, 10, and 11 are Assuming that the emitter areas are set so that the current densities are approximately equal, I _y1 ≒ I _x +V _BE1 −V _BE2 /R ₆ /R ₇ /R ₆ (1+1/β ₉ )...
…(14) I _y2 ≒I _x +V _BE1 −V _BE2 /R ₆ /R ₁₂ /R ₆ (1+1/β ₁₀ )
……(15) I _y3 ≒I _x +V _BE1 −V _BE2 /R ₆ /R ₁₃ /R ₆ (1+1/β ₁₁ )
(16) In FIG. 2, by making the emitter current density of transistor 2 the same as that of transistor 1, V _BE1 and V _BE2 in equations (14) to (16) can be made equal. For example, by connecting a resistor between the base and emitter of transistor 8 as shown in Figure 3, or by drawing part of the collector current of transistor 2 through another constant current circuit as shown in Figure 4. The difference between V _BE1 and V _BE2 can be made zero, and this can also be done by making the emitter areas of transistors 1 and 2 different.

Now, to simplify the explanation, let us assume that V _BE1 = V _BE2 holds, then set R ₆ = R ₇ = R ₁₂ = R ₁₃ , and β ₉ , β ₁₀ , and β ₁₁ are all 10, if I _x is 100 μA, the output current I _y1 ,
I _y2 and I _y3 are both 90 μA, compared to the case where the base and collector of transistor 1 in Figure 1 are shorted (as mentioned earlier, in that case, the output is 70 μA for an input current of 100 μA). ), the matching has improved.

Furthermore, as is clear from equations (14), (15), and (16), in the current mirror circuit of the present invention, the resistors 7, 12,
Even if the resistance value of resistor 13 is set to a fraction of the resistance value of resistor 8 and the output current is made to be several times the input current or more, the matching of the output current to the input reference current I _x will not deteriorate.

This is because the base current required for transistors 9, 10, 11 is not supplied directly from the input reference current, but via transistor 8.

Now, in the circuit shown in Figure 2, even if a voltage drop of 100 mV is created across resistor 7, for example,
The base-emitter voltage of transistor 9 is
It is about 0.65V, and the saturation voltage of transistor 8 is
Since it is 0.2V or less, it can operate satisfactorily even if the power supply voltage is lower than 1V.

In addition, although three current output terminals are provided in FIG. 2, these can be added as necessary, and transistors 10 and
1. It is also possible to omit the resistors 12 and 13 and provide one current output terminal.

FIG. 3 shows another embodiment of the present invention,
Here, the emitter current densities of transistors 1 and 10 are set to be approximately the same, and furthermore, the emitter current densities of transistors 2 and 9 are set to be approximately the same.

That is, in equation (12), V _BE1 − V _BE2 = V _BE10 − V _BE9 (17) holds true, so mismatching due to the voltage difference between V _BE1 and V _BE2 is eliminated.

Further, although the collector current of the transistor 9 is not used as an output current in the circuit shown in FIG. 3, it can be taken out as an output current if necessary.

FIG. 4 is also a circuit connection diagram showing another embodiment of the present invention, in which current output transistors 10, 11, 14
The current value that can be taken out from the output terminals Y ₂ , Y ₃ , and Y ₄ is determined by setting the emitter area of the transistor to a ratio of 3 to 2. The transistor 15 is configured to suck in the current from the collector of the transistor 2. Also, approximately one-third of the reference current
The current is taken out from the collector of the transistor 16 whose base is connected to the base of the transistor 1 through the output terminal _Y0 .

By the way, the embodiments of the present invention shown in FIGS. 2, 3, and 4 all operate even when the current voltage is lower than 1V, but the scope of application of the present invention is not necessarily limited to this. The present invention is not limited to current mirror circuits that operate under a power supply voltage of 1V or less, but by applying the present invention to the conventional current mirror circuit shown in Figure 1, matching accuracy can be further improved. You can also do that.

For example, when supplying accurate constant current output to many output terminals based on a minute reference current, as is often seen in D-A converters, the current mirror circuit of the present invention can be applied. , extremely high matching accuracy can be achieved.

FIG. 5 shows a configuration example of a current mirror circuit for a 10-bit D-A converter as yet another embodiment of the present invention. As already explained, the emitter current density of transistor 1 and the current density of transistor 10, 11, 17, 18, 19, 20, 21, 2
By setting the emitter current densities of transistors 2, 23, and 24 to be the same, and setting the emitter current densities of transistor 2 and transistor 9 to be the same, each It is possible to reduce the difference in voltage between the base and emitter of the transistor to zero, and in addition, transistor 1
and the base current of transistor 2 is supplied by transistor 5, transistors 9-11,
Since the base current of 17 to 24 is supplied by transistor 8, most of the reference input current is supplied to the collector of transistor 1 and the output terminal Y ₂
It is possible to extract an output current with very good matching accuracy from ~ _Y11 .

In addition, in the embodiments of the present invention shown in FIGS. 2 to 5, PNP transistors are used as output transistors, but all of them are
Replaced with NPN transistor, transistor 8,
It goes without saying that the same effect can be expected even if 15 etc. are replaced with a PNP transistor.

To summarize the above, the present invention provides a first transistor (corresponding to equivalent) and
a second transistor (corresponding to 2) whose base is connected to the base of the first transistor and whose emitter is connected to the feed line via a resistor (corresponding to 7); A third transistor (corresponding to No. 8), which is complementary to the transistor, and whose base current is supplied from the collector of the second transistor (corresponding to No. 8);
The fourth transistor (corresponding to No. 9) is connected to the emitter of the transistor, and the base current is supplied from the collector of the third transistor. is connected to the base of the fourth transistor, and a fifth transistor (corresponding to No. 10) whose emitter is connected to the feed line, and whose base is connected to the base of the fourth transistor,
A sixth transistor (corresponding to No. 11) whose emitter is connected to the feed line;
It has 14 transistors.

Further, in the embodiment shown in FIG. 2, the output current is taken out from the collectors of the fourth, fifth, and sixth transistors, but in the embodiment shown in FIG. is configured to supply power from the negative side power supply line Ca.

In this manner, the current mirror circuit of the present invention supplies the collector current of the second transistor to the base of the complementary third transistor, and supplies the collector current of the third transistor as the base current of at least the fourth transistor. Because it is configured to do so, it is not only possible to improve matching accuracy even at extremely low power supply voltages, but also to maintain high precision matching even when used at relatively high power supply voltages. At the same time, it has great effects, such as being able to obtain a large amount of output current based on a small reference current.

[Brief explanation of drawings]

FIG. 1 is a circuit connection diagram showing a conventional example, and FIGS. 2, 3, 4, and 5 are circuit connection diagrams of current mirror circuits according to each embodiment of the present invention. 1, 2, 8, 9, 10, 11, 14~24...
Transistor, 7... Resistor, Ba... Positive side power supply line, Ca... Negative side power supply line.

Claims (1)

[Claims] 1. A first transistor to which a reference current is supplied from the collector side and whose emitter is connected to one of the power supply lines, and whose base is connected to the base of the first transistor, and whose emitter is connected to the base of the first transistor through a resistor. a second transistor connected to the power supply line; and a second transistor complementary to the first and second transistors,
a third transistor whose emitter is connected to the other feed line and whose base current is supplied from the collector of the second transistor; A current mirror circuit comprising a fourth transistor supplied with power from the collector of the transistor, and configured to take out an output current from the collector of the fourth transistor. 2 A first transistor to which a reference current is supplied from the collector side and whose emitter is connected to one of the feed lines, whose base is connected to the base of the first transistor, and whose emitter is connected to the feed line via a resistor. a second transistor complementary to the first and second transistors,
a third transistor whose emitter is connected to the other feed line and whose base current is supplied from the collector of the second transistor; a fourth transistor to which power is supplied from the collector of the transistor; a fifth transistor having a base connected to the base of the fourth transistor and an emitter connected to the power supply line; is supplied with power from the other feed line, and the fifth
A current mirror circuit configured to extract output current from the collector of a transistor.