JPH0345640U - - Google Patents
Info
- Publication number
- JPH0345640U JPH0345640U JP1989106806U JP10680689U JPH0345640U JP H0345640 U JPH0345640 U JP H0345640U JP 1989106806 U JP1989106806 U JP 1989106806U JP 10680689 U JP10680689 U JP 10680689U JP H0345640 U JPH0345640 U JP H0345640U
- Authority
- JP
- Japan
- Prior art keywords
- element mounting
- size
- mounting member
- mounting area
- shape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000007769 metal material Substances 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
- H01L2224/83051—Forming additional members, e.g. dam structures
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ａ，ｂは、本考案の一実施例を示す上面
図と断面図、第２図ａ，ｂは、従来例を示す上面
図と断面図である。
１……素子載置部材、２……接合金属材、３…
…半導体素子、４……素子載置エリア、５……凹
部。
1A and 1B are a top view and a sectional view showing an embodiment of the present invention, and FIGS. 2A and 2B are a top view and a sectional view showing a conventional example. 1...Element mounting member, 2...Joining metal material, 3...
...Semiconductor element, 4...Element mounting area, 5...Recess.
Claims (1)
フレーム及びステムの素子載置部材において、素
子載置エリアの形状が素子サイズと同サイズ又は
素子に適したサイズの凸状の形状を有することを
特徴とする素子載置部材。 In an element mounting member of a lead frame and a stem that connect semiconductor elements by a bonding metal material, the element mounting area is characterized in that the shape of the element mounting area has a convex shape of the same size as the element size or a size suitable for the element. Element mounting member.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989106806U JPH0345640U (en) | 1989-09-11 | 1989-09-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989106806U JPH0345640U (en) | 1989-09-11 | 1989-09-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0345640U true JPH0345640U (en) | 1991-04-26 |
Family
ID=31655528
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989106806U Pending JPH0345640U (en) | 1989-09-11 | 1989-09-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0345640U (en) |
-
1989
- 1989-09-11 JP JP1989106806U patent/JPH0345640U/ja active Pending