JPH0345580B2 - - Google Patents

Info

Publication number
JPH0345580B2
JPH0345580B2 JP57030320A JP3032082A JPH0345580B2 JP H0345580 B2 JPH0345580 B2 JP H0345580B2 JP 57030320 A JP57030320 A JP 57030320A JP 3032082 A JP3032082 A JP 3032082A JP H0345580 B2 JPH0345580 B2 JP H0345580B2
Authority
JP
Japan
Prior art keywords
term
output
sum
product
product term
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57030320A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58147236A (ja
Inventor
Kenji Oomori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57030320A priority Critical patent/JPS58147236A/ja
Publication of JPS58147236A publication Critical patent/JPS58147236A/ja
Publication of JPH0345580B2 publication Critical patent/JPH0345580B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
JP57030320A 1982-02-26 1982-02-26 ダイナミックｐｌａ Granted JPS58147236A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57030320A JPS58147236A (ja) 1982-02-26 1982-02-26 ダイナミックｐｌａ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57030320A JPS58147236A (ja) 1982-02-26 1982-02-26 ダイナミックｐｌａ

Publications (2)

Publication Number Publication Date
JPS58147236A JPS58147236A (ja) 1983-09-02
JPH0345580B2 true JPH0345580B2 (fr) 1991-07-11

Family

ID=12300499

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57030320A Granted JPS58147236A (ja) 1982-02-26 1982-02-26 ダイナミックｐｌａ

Country Status (1)

Country Link
JP (1) JPS58147236A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2504893B2 (ja) * 1992-07-08 1996-06-05 株式会社コマイ 掲示シ―ト

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5109353A (en) 1988-12-02 1992-04-28 Quickturn Systems, Incorporated Apparatus for emulation of electronic hardware system
JPH04123269A (ja) * 1990-09-14 1992-04-23 Fujitsu Ltd Ｐｌａのシミュレーション方式
US5475830A (en) * 1992-01-31 1995-12-12 Quickturn Design Systems, Inc. Structure and method for providing a reconfigurable emulation circuit without hold time violations
US6348812B1 (en) * 2000-07-05 2002-02-19 Elan Research Dynamic programmable logic array that can be reprogrammed and a method of use

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2504893B2 (ja) * 1992-07-08 1996-06-05 株式会社コマイ 掲示シ―ト

Also Published As

Publication number Publication date
JPS58147236A (ja) 1983-09-02

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