JPH0344327B2 - - Google Patents
Info
- Publication number
- JPH0344327B2 JPH0344327B2 JP57154140A JP15414082A JPH0344327B2 JP H0344327 B2 JPH0344327 B2 JP H0344327B2 JP 57154140 A JP57154140 A JP 57154140A JP 15414082 A JP15414082 A JP 15414082A JP H0344327 B2 JPH0344327 B2 JP H0344327B2
- Authority
- JP
- Japan
- Prior art keywords
- bytes
- register
- mantissa
- selector
- byte
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
- G06F7/485—Adding; Subtracting
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49936—Normalisation mentioned as feature only
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Nonlinear Science (AREA)
- General Engineering & Computer Science (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57154140A JPS5943441A (ja) | 1982-09-03 | 1982-09-03 | 浮動小数点演算装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57154140A JPS5943441A (ja) | 1982-09-03 | 1982-09-03 | 浮動小数点演算装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5943441A JPS5943441A (ja) | 1984-03-10 |
JPH0344327B2 true JPH0344327B2 (enrdf_load_stackoverflow) | 1991-07-05 |
Family
ID=15577753
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57154140A Granted JPS5943441A (ja) | 1982-09-03 | 1982-09-03 | 浮動小数点演算装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5943441A (enrdf_load_stackoverflow) |
-
1982
- 1982-09-03 JP JP57154140A patent/JPS5943441A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5943441A (ja) | 1984-03-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6138135A (en) | Propagating NaNs during high precision calculations using lesser precision hardware | |
GB2294565A (en) | Floating point arithmetic unit | |
JP3845009B2 (ja) | 積和演算装置、及び積和演算方法 | |
KR950006580B1 (ko) | 나눗셈연산장치 | |
US4594680A (en) | Apparatus for performing quadratic convergence division in a large data processing system | |
KR20210124347A (ko) | 앵커 데이터 요소 변환 | |
JPS63123125A (ja) | 浮動小数点数の加算装置 | |
US6598065B1 (en) | Method for achieving correctly rounded quotients in algorithms based on fused multiply-accumulate without requiring the intermediate calculation of a correctly rounded reciprocal | |
JPH1195982A (ja) | 演算処理回路及び演算処理方法並びに演算処理システム | |
JPH09146924A (ja) | 演算方法、演算装置及びマイクロプロセッサ | |
KR100317767B1 (ko) | 부동 소수점 2진 4 워드 포맷 승산 명령 유닛 | |
JP3579087B2 (ja) | 演算器およびマイクロプロセッサ | |
US7003540B2 (en) | Floating point multiplier for delimited operands | |
JPH0344327B2 (enrdf_load_stackoverflow) | ||
CN112214196A (zh) | 浮点异常处理方法及装置 | |
JP2664750B2 (ja) | 演算装置及び演算処理方法 | |
JPS63298435A (ja) | 浮動小数点演算装置 | |
JPS58186840A (ja) | デ−タ処理装置 | |
KR100315303B1 (ko) | 디지탈 신호 처리기 | |
KR100251547B1 (ko) | 디지탈신호처리기(Digital Sgnal Processor) | |
KR100246472B1 (ko) | 디지탈신호처리기 | |
JPS63254525A (ja) | 除算装置 | |
JPH01128129A (ja) | 浮動小数点加減算装置 | |
JPS61224036A (ja) | 演算装置 | |
JPS5827241A (ja) | 十進演算装置 |