JPH0342822A - Ion implantation of semiconductor device - Google Patents

Ion implantation of semiconductor device

Info

Publication number
JPH0342822A
JPH0342822A JP17881389A JP17881389A JPH0342822A JP H0342822 A JPH0342822 A JP H0342822A JP 17881389 A JP17881389 A JP 17881389A JP 17881389 A JP17881389 A JP 17881389A JP H0342822 A JPH0342822 A JP H0342822A
Authority
JP
Japan
Prior art keywords
ion implantation
semiconductor substrate
conductive material
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17881389A
Other languages
Japanese (ja)
Inventor
Toshiaki Kumada
熊田 敏明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP17881389A priority Critical patent/JPH0342822A/en
Publication of JPH0342822A publication Critical patent/JPH0342822A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To prevent electrification breakdown and deterioration of a semiconductor device due to local electrification by performing ion implantation after providing a conductive material on a semiconductor substrate. CONSTITUTION:A conductive material 2 is provided on a semiconductor substrate 3. Ion implantation is performed through a pattern formation process by that pattern formation material 1. It is not limited by the structure within a semiconductor substrate but can be applied to a semiconductor with any structure. Thus, by a simple method for providing a conductive material on the semiconductor substrate, it is possible to prevent electrification breakdown and deterioration due to local electrification at the ion implantation process, thus improving the yield and quality of a semiconductor device.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体装置のイオン注入方法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to an ion implantation method for a semiconductor device.

〔発明の概要〕[Summary of the invention]

この発明は、半導体装置のイオン注入工程において、半
導体基板上に導電性材料を設けた後、イオン注入するこ
とにより半導体装置の破壊を防止するようにしたもので
ある。
In the ion implantation process of a semiconductor device, the present invention prevents destruction of the semiconductor device by providing a conductive material on a semiconductor substrate and then implanting ions.

〔従来の技術〕[Conventional technology]

従来、第7図に示すように半導体基板3にパターン形成
材料lを設けたのちイオン注入を行う方法、あるいは半
導体基板3に直接イオン注入する方法が行われていた。
Conventionally, a method has been used in which ions are implanted after providing a pattern forming material 1 on a semiconductor substrate 3, as shown in FIG. 7, or a method in which ions are directly implanted into the semiconductor substrate 3.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、従来の方法は絶縁膜が設けられた半導体基板に
、また導電性に乏しいパターン形成材料が設けられてい
る半導体基板にイオン注入を行うためイオンビームによ
る帯電が半導体装置の表面付近で発生し、その帯電電荷
の放電による半導体装置の破壊劣化(以下帯電破壊・劣
化と略す)が発生する欠点があった。
However, in the conventional method, ions are implanted into a semiconductor substrate provided with an insulating film or a pattern forming material with poor conductivity, so charging due to the ion beam occurs near the surface of the semiconductor device. However, there is a drawback in that the semiconductor device is destroyed and deteriorated due to the discharge of the charged charges (hereinafter abbreviated as "charged destruction/deterioration").

そこで、この発明は従来のこのような欠点を解決するた
め、帯電破壊・劣化を発生のない半導体装置を得ること
を目的としている。
Therefore, in order to solve these conventional drawbacks, it is an object of the present invention to provide a semiconductor device that does not suffer from electrostatic breakdown or deterioration.

(Lf!題を解決するための手段〕 上記課題を解決するために、この発明は前工程に半導体
基板上に導電性材料を設ける工程を備えたことによりイ
オン注入工程における帯電破壊劣化を防止するようにし
た。
(Means for solving the Lf! problem) In order to solve the above problem, the present invention prevents charging breakdown deterioration in the ion implantation process by providing a step of providing a conductive material on the semiconductor substrate in the previous step. I did it like that.

〔作用〕[Effect]

上記の方法により、イオンビームのrtI電粒子粒子導
体基板上に設けられた導電性材料を介してスムーズに流
れ去るため、局部的帯電による半導体装置の帯電破壊・
劣化を防止することができるのである。
By the above method, since the ion beam flows smoothly through the conductive material provided on the rtI particle conductor substrate, charging damage to the semiconductor device due to local charging can be avoided.
This makes it possible to prevent deterioration.

〔実施例〕〔Example〕

以下にこの発明の実施例を図面に基づいて説明する。第
1図は第1の実施例を示すもので半導体基板3上に導電
性材料2を設けたのちパターン形成材料1によるパター
ン形成工程を経てイオン注入を行う、第2図は第2の実
施例を示すもので、半導体基板3上にパターン形成材料
lによるパターン形成を行ったのち導電性材料2を形成
する工程を経てイオン注入を行う、第3図は第3の実施
例を示すもので、半導体基板3上に導電性材料2を形成
したのちイオン注入を行う、第4図は第4の実施例を示
すもので、半導体基板3上に導電性材料2を設けたのち
パターン形成可能な導電性n料4によるパターン形成、
工程を経てイオン注入を行う。第5図は第5の実施例を
示すもので、半導体基板3上にパターン形成可能な導電
性材料4によるパターン形成を行ったのち導電性材料2
の形成工程を経てイオン注入を行う、第6図は第6の実
施例を示すもので、半導体基板3上にパターン形成可能
な導電性材料4によるパターン形成を行ったのちイオン
注入を行う。
Embodiments of the present invention will be described below based on the drawings. FIG. 1 shows a first embodiment in which a conductive material 2 is provided on a semiconductor substrate 3, and then ion implantation is performed through a pattern forming process using a pattern forming material 1. FIG. 2 shows a second embodiment. FIG. 3 shows a third embodiment in which a pattern is formed on a semiconductor substrate 3 using a pattern forming material 1, and then ion implantation is performed after a step of forming a conductive material 2. FIG. 4 shows a fourth embodiment in which ion implantation is performed after forming a conductive material 2 on a semiconductor substrate 3, in which a conductive material 2 that can be patterned is formed on a semiconductor substrate 3. Pattern formation using the sexual n material 4,
Ion implantation is performed through a process. FIG. 5 shows a fifth embodiment, in which a pattern is formed on a semiconductor substrate 3 using a conductive material 4 that can be patterned, and then a conductive material 4 is formed on the semiconductor substrate 3.
FIG. 6 shows a sixth embodiment in which ion implantation is performed after forming a pattern on a semiconductor substrate 3 using a conductive material 4 that can be patterned.

尚、上記説明は半導体基板内の構造について限定するも
のでなく、いかなる構造を有する半導体基板に対し適用
可能なことはいうまでもない。
Note that the above description is not limited to the structure within the semiconductor substrate, and it goes without saying that it can be applied to a semiconductor substrate having any structure.

〔発明の効果〕〔Effect of the invention〕

この発明は、以上説明したように、半導体基板上に導電
性材料を設けるという簡単な方法により、イオン注入工
程での局部的帯電による帯電破壊・劣化を防止し、半導
体装置の歩留まり及び品質を向上する効果がある。
As explained above, this invention uses a simple method of providing a conductive material on a semiconductor substrate to prevent charging breakdown and deterioration due to local charging during the ion implantation process, and improve the yield and quality of semiconductor devices. It has the effect of

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の第1の実施例を示す説明図、第2図
はこの発明の第2の実施例を示す説明図、第3図はこの
発明の第3の実施例を示す説明図、第4図はこの発明の
第4の実施例を示す図、第5図はこの発明の第5の実施
例を示す説明図、第6図はこの発明の第6の実施例を示
す説明図、第7図は従来のイオン注入方法を説明する図
である。 1・・・パターン形成材料 2・・・導電性材料 3・・・半導体基板 4・・・パターン形成可能な導電性材料取 上
FIG. 1 is an explanatory diagram showing a first embodiment of this invention, FIG. 2 is an explanatory diagram showing a second embodiment of this invention, and FIG. 3 is an explanatory diagram showing a third embodiment of this invention. , FIG. 4 is a diagram showing a fourth embodiment of this invention, FIG. 5 is an explanatory diagram showing a fifth embodiment of this invention, and FIG. 6 is an explanatory diagram showing a sixth embodiment of this invention. , FIG. 7 is a diagram illustrating a conventional ion implantation method. 1... Pattern forming material 2... Conductive material 3... Semiconductor substrate 4... Conductive material that can be patterned

Claims (1)

【特許請求の範囲】[Claims] 半導体装置のイオン注入方法において、前工程として導
電性材料を半導体基板上に設ける工程とを有することを
特徴とした半導体装置のイオン注入方法。
An ion implantation method for a semiconductor device, the method comprising the step of providing a conductive material on a semiconductor substrate as a pre-step.
JP17881389A 1989-07-10 1989-07-10 Ion implantation of semiconductor device Pending JPH0342822A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17881389A JPH0342822A (en) 1989-07-10 1989-07-10 Ion implantation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17881389A JPH0342822A (en) 1989-07-10 1989-07-10 Ion implantation of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0342822A true JPH0342822A (en) 1991-02-25

Family

ID=16055109

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17881389A Pending JPH0342822A (en) 1989-07-10 1989-07-10 Ion implantation of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0342822A (en)

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