JPH0333952A - Image memory writer - Google Patents

Abstract

PURPOSE:To perform image memory write at high speed by providing a compa rator, etc., to observe the change of the ROW address of a D-RAM, and utilizing the page mode function of the D-RAM. CONSTITUTION:When a plotter 1 makes access an image memory 5 successively, the plotter 1 outputs the ROW address 2, a COL address 14, and plotting data 16 to the memory 15. Assuming that the ROW address 2 remains unchanged, and the COL address 14 changes, and the D-RAM comprising the memory 5 is provided with the page mode function, fast successive write using the page mode function can be performed. To realize such operation, the ROW address 2 in first access is set at a register 3, and the COL address 14 at a FIFO 12, and the plotting data 16 at a FIFO 15. In the access after second, the value of the ROW address 2 is compared with that of the register 3 with the compara tor 6, and when the same ROW address is obtained, the COL address 14 is set at the FIFO 12.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image memory writing device, and particularly to an image memory writing device that writes data to an image memory at high speed.

[Conventional technology]

Conventionally, data writing to an image memory has been performed in one cycle for each piece of data.

[Problem to be solved by the invention]

The conventional drawing memory writing device described above has a lower writing speed per data than a continuous memory writing method using the page mode, which fixes the RAW address by completing one cycle and enables continuous access by switching the COL address. The disadvantage is that it is slow.

[Means to solve the problem]

The image memory writing device of the present invention includes a comparator for checking changes in the RAW address of the D-RAM, and a CO of the D-RAM.
D- of the first FIFO type memo memory that stores the L address and the second FIFO type memo memory that stores the image data.
A register that stores the RAM RAW address and a D-R
It has an image memory configured with AM and a controller that performs overall control.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows an embodiment of the invention. In FIG. 1, a drawing device 1 outputs an address and data to a certain pixel in an image memory 5. ROW address 2 is the image memory 5 among the drawing addresses of the drawing device 1.
I) - This is an address bus that looks like a RAW address when viewed from RAM.

Register 3 stores the previous RAW address 2. R
The OW address 4 is a RAW address of the D-RAM of the image memory 5 and provides the storage address of the register 3 to the comparator 6. The image memory 5 is composed of a D-RAM having a page mode function. The comparator 6 compares the RAW address 2 output by the drawing device 1 with the RAW address of the previous access output by the register 3. The controller 7 receives the comparator output 9 of the comparator 6 and performs overall control, and the register control signal 8 controls the register 3. Comparator output 9 outputs the comparison result of comparator 6. Image memory control signal 10
outputs a D-RAM control signal such as RAS, CAS, or WE multiplication signal, which controls the D-RAM constituting the image memory 5, at the timing of performing the page mode operation.

FIFO control signal 11 is a control signal for FIF○12, and
IFO12 is a FIFO type memory that stores COL address 14. The FIF○ control signal 13 is the control signal for the FIFO 13, and the COL address 14 is the COL address from the image memory 5 1)-RAM as seen from the drawing address from the drawing device 1.
This is an address bus that looks like an OL address. FIF○1
5 is a FIFO type memo memory for storing drawing data 16;

The drawing data 16 is write data that the drawing device 1 outputs to the image memory 5, and includes, for example, a color code.

FIG. 2 shows one action move Illα in one embodiment of the present invention. In FIG. 2, when the drawing device 1 continuously accesses the image memory 5, the drawing device 1 outputs a ROW address 2, a COL address 14, and drawing data 16 to the image memory 5. I) The ROW address remains unchanged, the COL address 14 changes, and constitutes the image memory 5.
- If the RAM has a page mode function, high-speed continuous writing using the page mode function is possible. To achieve this, set the ROW address 2 of the first access to register 3, and set the COL address 14 to PIFO 12.
and set the drawing data 16 to FIF○15. In the second and subsequent accesses, the ROW address 2 and the value of the register 3 are compared by the comparator 6, and if they are the same, the COL address 14 is set in the PIFO 12 and the drawing data 16 is set in the FIFO 15. If the new ROW address 2 and the value of register 3 are different, controller 7 sets ROW address 4 of register 3 and FIFO
12 COL addresses 14 and drawing data 16 of FIF○15 are taken out one after another and written continuously to the image memory 5 using the page mode function. Set ROW address 2 to register 6, and set COL address 14 to PIFO 12. , sets the drawing data 16 to the FrFO 15. Repeat this below.

Activation of the page mode function can also be considered when a certain period of time has elapsed after access from the drawing device 1 has stopped, or when a Read operation is activated.

Effects of the Invention] As explained above, the present invention has the advantage of being able to perform image memory writing at high speed by utilizing the page mode function of the D-RAM.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a diagram showing a procedure in one embodiment of the present invention. 1... Drawing device, 2... ROW address, 3...
Register, 4...ROW address, 5...Image memory, 6...Comparator, 7...Controller, 8
...Register control signal, 9...Comparator output,
10... Image memory control signal, 11... FrF○ control signal.

Claims (1)

[Claims] A comparator that monitors changes in the D-RAM RAW address and a first FIF that stores the D-RAM COL address.
An O-type memory, a second FIFO-type memory for storing drawing data, a register for storing the previous D-RAM RAW address, an image memory composed of the D-RAM, and a controller for overall control. An image memory writing device comprising: