JPH033251B2 - - Google Patents

Info

Publication number
JPH033251B2
JPH033251B2 JP57003784A JP378482A JPH033251B2 JP H033251 B2 JPH033251 B2 JP H033251B2 JP 57003784 A JP57003784 A JP 57003784A JP 378482 A JP378482 A JP 378482A JP H033251 B2 JPH033251 B2 JP H033251B2
Authority
JP
Japan
Prior art keywords
flip
flop
circuit
master
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57003784A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58121447A (ja
Inventor
Shigehiro Funatsu
Masanobu Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57003784A priority Critical patent/JPS58121447A/ja
Publication of JPS58121447A publication Critical patent/JPS58121447A/ja
Publication of JPH033251B2 publication Critical patent/JPH033251B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541Scan latches or cell details
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536Scan chain arrangements, e.g. connections, test bus, analog signals

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP57003784A 1982-01-13 1982-01-13 論理集積回路 Granted JPS58121447A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57003784A JPS58121447A (ja) 1982-01-13 1982-01-13 論理集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57003784A JPS58121447A (ja) 1982-01-13 1982-01-13 論理集積回路

Publications (2)

Publication Number Publication Date
JPS58121447A JPS58121447A (ja) 1983-07-19
JPH033251B2 true JPH033251B2 (enrdf_load_stackoverflow) 1991-01-18

Family

ID=11566806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57003784A Granted JPS58121447A (ja) 1982-01-13 1982-01-13 論理集積回路

Country Status (1)

Country Link
JP (1) JPS58121447A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH081457B2 (ja) * 1989-09-29 1996-01-10 株式会社東芝 ディジタル集積回路におけるテスト容易化回路

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5483341A (en) * 1977-12-15 1979-07-03 Nec Corp Digital integrated circuit
JPS6051729B2 (ja) * 1978-10-05 1985-11-15 三菱電機株式会社 複合ラッチ回路

Also Published As

Publication number Publication date
JPS58121447A (ja) 1983-07-19

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