JPH0332126Y2 - - Google Patents

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Publication number
JPH0332126Y2
JPH0332126Y2 JP2095290U JP2095290U JPH0332126Y2 JP H0332126 Y2 JPH0332126 Y2 JP H0332126Y2 JP 2095290 U JP2095290 U JP 2095290U JP 2095290 U JP2095290 U JP 2095290U JP H0332126 Y2 JPH0332126 Y2 JP H0332126Y2
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JP
Japan
Prior art keywords
switchboard
response
control device
information
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2095290U
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Japanese (ja)
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JPH02130155U (en
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Priority to JP2095290U priority Critical patent/JPH0332126Y2/ja
Publication of JPH02130155U publication Critical patent/JPH02130155U/ja
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Description

【考案の詳細な説明】[Detailed explanation of the idea]

〔概要〕 交換台制御装置と交換台とのインタフエースに
おける交換台の実装/未実装の識別及び電源投入
状況の識別を行う交換台制御装置に関し、 制御線により各交換台の電源投入状況を判別
し、且つ障害を検出可能とする交換台制御装置を
提供することを目的とし、 交換台制御装置がIPLした直後から交換台全て
に対し各交換台に対応する個別応答要求信号を一
定の時間間隔で順次繰り返し送出する手段と、応
答要求信号に対する交換台からの応答を識別する
手段と、交換台からの応答が最初の応答であると
判断したとき交換台が電源投入されたと認識する
手段と、以後の応答要求信号に対する応答が一定
時間内にないとき該当の交換台に障害が発生した
と判定する手段とを備える。 〔産業上の利用分野〕 本考案は交換システムに係り、特に交換台制御
装置と交換台とのインタフエースにおける、交換
台の実装/未実装の識別及び電源投入状況(パワ
ーON/OFF)の識別を行う交換台制御装置に関
するものである。 〔従来の技術〕 一般に交換台は、その交換台を収容する交換シ
ステムの規模に応じて複数台設置され、交換台制
御装置を介して交換気本体側に接続されている。 第1図はその従来の交換台制御装置を説明する
概略構成図である。図において、NWは交換ネツ
トワーク、SUBは加入者電話機、CCは中央制御
装置、TTYはタイプライタ、TCTLは交換台制
御装置、T1〜Toは交換台を示す。交換台制御装
置TCTLは交換台Tに対し、1対1あるいは1対
複数で構成されているが、本実施例では1対複数
の例を示している。交換システムが立上げられ稼
動状態になり、タイプライタ等から交換台の実
装/未実装情報がコマンド入力されると、中央制
御装置CCは、該情報を交換台制御装置TCTLに
送出する。交換台制御装置TCTLは、この送られ
てきた実装/未実装情報に従い交換台の試験を行
う。各交換台からは電源の投入状況(電源のオ
ン、オフ状態)が信号線C1〜Coにより交換台制
御装置TCTLへ送られ、表示レジスタRegに表示
される。従つて交換台制御装置TCTLは先の実
装/未実装情報が実装であり、電源がオン(投
入)となつた交換台に対し順次交換台番号No.を付
与した応答要求信号を制御線bへ送出し、各交換
台から一定時間以内に応答信号が制御線aにより
返らない場合、その応答信号のない交換台を障害
と認識していた。尚、第1図中通話線は省略され
ている。 〔考案が解決しようとする問題点〕 上記制御装置であると、交換台がコマンドによ
り実装されたとしても物理的(金物的)に実装さ
れているか否かを識別する必要があり、その識別
のために制御線の他に電源投入状況を示す信号線
C1〜Coを必要とし、経済的でないばかりでなく、
交換台数が多くなると布線等の作業も煩雑なもの
になつていた。 本考案は制御線により各交換台の電源投入状況
を判別し、且つ障害を検出可能とした交換台制御
装置を提供することを目的とする。 〔問題点を解決するための手段〕 本考案はn台(nは1以上)の交換台と制御情
報をやりとりする交換台制御装置において、交換
台制御装置がIPLした直後から交換台全てに対し
各交換台に対応する個別応答要求信号を一定の時
間間隔で順次繰り返し送出する手段と、応答要求
信号に対する交換台からの応答を識別する手段
と、交換台からの応答が最初の応答であると判断
したとき交換台が電源投入されたと認識する手段
と、以後の応答要求信号に対する応答が一定時間
内にないとき該当の交換台に障害が発生したと判
定する手段とを備えたものである。 〔作用〕 交換台制御装置TCTLが電源投入されて立上げ
られるとIPL時交換台の実装/未実装情報を全て
実装状態とし、交換台の電源投入情報をオフ状態
とする。次に、各交換台へ応答要求信号を送出し
一定時間の応答を監視する。一定時間内に応答を
検出(第1回目の応答)すると電源投入情報をオ
ンとする。その後の応答を検出すると交換台は正
常と確認できる。一方一定時間内に応答がないと
交換台に障害が発生したと確認できる。 〔実施例〕 第2図は本考案の交換台制御装置を説明する概
略構成図である。図において第1図と同じ符号は
同一対象物を示している。尚、Sは通話線を示
す。 本考案は、かかる構成のもと制御線a,bによ
り交換台の電源投入状況と障害状況を識別可能と
したものである。 第3図は、第2図の交換台と交換台制御装置と
の関係をさらに詳細にした構成図である。 図において、交換台Tiの通話情報は台用加入者
回路SLCを介し、マルチプレクサ・デマルチプレ
クサを通りハイウエイHWに乗り交換機側のネツ
トワーク(本例では時分割を示す)NWに接続さ
れる。 一方、制御線a,bは交換台制御装置TCTL内
の台インタフエース回路BDIに入り制御信号が制
御部MPUとメモリMEMにより制御される。ハ
イウエイHW上のインタフエース回路INは例え
ばインサータ及びドロツパー回路から成り、所定
のハイウエイ内のタイムスロツト情報を回線イン
タフエース回路LNIを介して取り込み、又は送出
して、交換機側の中央制御装置CCとの情報のや
りとりを行うためにある。 上記構成のもと、交換台制御装置TCTLはシス
テムの立上げ時交換台T1〜Toの実装/未実装情
報と電源投入状況を示すメモリ内容を全て初期設
定する。その後交換台T1〜Toに対し順次応答要
求信号を送出し、この応答要求信号に対して交換
台Tiから一定の時間内に応答があるか否か識別し
て電源の投入及び障害状況を判別する。 第4図は、この本考案の制御装置を説明するタ
イムチヤートである。図において、Ti側は交換台
を、TCTLは交換台制御装置を示し、上方から下
方へ時間の経過を示している。交換台制御装置
TCTLが電源投入されて立上げ(IPL;イニシヤ
ルプログラムロード)られるとの初期設定時
(IPL時)交換台の実装/未実装情報を全て実装
状態とし、電源投入情報(交換台の)をオフ状態
とする。 次にで示す如く、各交換台Tiへ応答要求信号
を送出し一定時間t間の応答を監視する。交換台
Tiがまた電源投入されていない場合は、この応答
要求信号に対し応答動作はないため無応答で
ある。従つて、交換台制御装置TCTLは一定時間
以内の応答なくを検出し、交換台は電源投入さ
れていないとみなす。交換台Tiが電源投入され
て初めて応答要求信号を検知すると応答を返
送する。交換台制御装置TCTLは応答要求信号送
出を行い一定時間以内に応答を検出すると、
内部処理にでこの応答が初めての応答であるか
否かをチエツクする。 即ち、現在の交換台Tiの電源投入状況がオフ状
態であれば、交換台Tiからの応答(第1回目の応
答)をもつてこの交換台Tiに電源投入されたと判
断し、電源投入情報をオン状態とする。それ以降
の交換台制御装置TCTLと交換台Tiとのやりとり
で応答要求信号送出に対し、応答を検出す
ると電源投入情報がオン状態で応答があるため交
換台Tiは正常に動作していることを確認できる。 一方、交換台Tiにおいて障害が発生し、交換
台制御装置TCTLの応答要求信号送出に対し応
答信号を送出できない(無応答)と、交換台制
御装置TCTLは一定時間t以内に応答がないこと
を検知し、電源投入情報がオン状態で応答ない
ため交換台Tiに障害が発生したことを知る。 第5図は、この制御装置の具体的処理構成を示
し、、特に第3図で示したメモリMEMと制御部
との動作を説明している。図において、メモリ
MEM内情報として交換台の実装未実装情報E、
電源投入情報Pが交換台対応#0〜#nに格納さ
れている。R1,R2,R3,R4はレジスタ、Cは一
定時間計数しタイムアウトでレジスタR4の内容
をレジスタR2に設定するカウンタ、ALUは演算
回路、CMPは正常/異常判別回路である。〇印
数字は第4図の処理に対応している。 まず、交換台制御装置TCTLの初期立上げ時は
実装未実装情報Eは全て実装(例えば“1”設定
等)状態とし、電源投入情報Pは全てオフ状態
(例えば“0”設定等)に設定される。 交換台Tiがまだ電源投入されていなければ、応
答要求に対し無応答であるので、電源投入情報E
から読取りレジスタR1にセツトされた情報(オ
フ状態=“0”)とインタフエース回路BDI(第3
図参照)から読取り情報が無検出でタイムアウト
時レジスタR4からレジスタR2に格納された情報
(無応答=“0”)とを演算回路ALUで演算した結
果、変化なしと判断される。 一方、応答を検出した場合にはレジスタR1
にセツトされた情報“0”とレジスタR2にセツ
トされた情報“1”(応答)の演算結果は変化
(0→1)があるため、第1回目の応答として
レジスタR3の設定情報(電源投入オン状態=
“1”)を該当領域に格納する。 次に、交換台の正常時は、応答要求信号送出
に対し応答があり、電源投入オン状態“1”で応
答あり“1”であるので正常と判定される。異
常発生の場合は応答なし“0”により変化検出さ
れ異常と判定される。 次表はこの判定論理を示す。
[Summary] Regarding the switchboard control device, which identifies whether the switchboard is installed/unmounted and the power-on status at the interface between the switchboard controller and the switchboard, the power-on status of each switchboard is determined by the control line. In order to provide a switchboard control device that is capable of detecting faults and detecting faults, the switchboard control device sends individual response request signals corresponding to each switchboard to all switchboards at regular intervals immediately after IPL. means for sequentially and repeatedly transmitting the response request signal; means for identifying a response from the switchboard to the response request signal; and means for recognizing that the switchboard has been powered on when determining that the response from the switchboard is the first response; and means for determining that a failure has occurred in the corresponding switchboard when there is no response to a subsequent response request signal within a certain period of time. [Industrial Application Field] The present invention relates to a switching system, and in particular, the identification of whether a switching board is installed or not, and the power ON/OFF status at the interface between a switching board control device and a switching board. This invention relates to a switchboard control device that performs the following operations. [Prior Art] Generally, a plurality of switchboards are installed depending on the scale of the exchange system that accommodates the switchboards, and are connected to the exchange air main body via a switchboard control device. FIG. 1 is a schematic configuration diagram illustrating the conventional switchboard control device. In the figure, NW is a switching network, SUB is a subscriber telephone, CC is a central control unit, TTY is a typewriter, TCTL is a switchboard controller, and T 1 to T o are switchboards. The switchboard control device TCTL is configured one-to-one or one-to-multiple with respect to the switchboard T, but in this embodiment, an example of one-to-multiple is shown. When the switching system is started up and becomes operational, and information on mounting/unmounting of switching boards is input as a command from a typewriter or the like, the central controller CC sends this information to the switching board controller TCTL. The switchboard controller TCTL tests the switchboard according to the sent mounting/non-mounting information. The power-on status (power on/off state) from each switchboard is sent to the switchboard controller TCTL via signal lines C 1 to Co and displayed on the display register Reg. Therefore, the switchboard controller TCTL sequentially sends response request signals assigned switchboard number numbers to the control line b for the switchboards whose previous mounted/unmounted information indicates "mounted" and whose power is turned on (turned on). If a response signal is not returned from each switch via control line a within a certain period of time, the switch without the response signal is recognized as a failure. Note that the communication lines are omitted in FIG. 1. [Problem to be solved by the invention] With the above control device, even if the switch board is installed by command, it is necessary to identify whether it is physically (metallic) installed or not. In addition to the control line, there is also a signal line that indicates the power-on status.
It requires C 1 ~C o and is not only uneconomical but also
As the number of replacement units increased, wiring work became complicated. An object of the present invention is to provide a switchboard control device that can determine the power-on status of each switchboard using a control line and detect failures. [Means for solving the problem] The present invention is a switchboard control device that exchanges control information with n switchboards (n is 1 or more). means for sequentially and repeatedly transmitting individual response request signals corresponding to each switchboard at regular time intervals; means for identifying a response from the switchboard to the response request signal; and means for identifying that the response from the switchboard is the first response; The system is equipped with means for recognizing that the switch has been powered on when it is determined that the switch has been powered on, and means for determining that a failure has occurred in the switch when there is no response to a subsequent response request signal within a certain period of time. [Operation] When the switchboard control device TCTL is powered on and started up, all of the switchboard mounting/unmounting information during IPL is set to the mounted state, and the switchboard power-on information is set to the OFF state. Next, a response request signal is sent to each switchboard, and responses are monitored for a certain period of time. When a response is detected within a certain period of time (first response), the power-on information is turned on. If a subsequent response is detected, it can be confirmed that the switchboard is normal. On the other hand, if there is no response within a certain period of time, it can be confirmed that a fault has occurred in the switchboard. [Embodiment] FIG. 2 is a schematic configuration diagram illustrating the switchboard control device of the present invention. In the figure, the same reference numerals as in FIG. 1 indicate the same objects. Note that S indicates a communication line. With this configuration, the present invention makes it possible to identify the power-on status of the switchboard and the failure status using the control lines a and b. FIG. 3 is a block diagram showing the relationship between the switchboard and the switchboard control device shown in FIG. 2 in further detail. In the figure, the call information from the switchboard T i is transmitted via the standby subscriber circuit SLC, passes through a multiplexer/demultiplexer, and then takes the highway HW and is connected to the switchboard side network (in this example, time division is shown) NW. On the other hand, control lines a and b enter the board interface circuit BDI in the switchboard controller TCTL, and the control signals are controlled by the controller MPU and the memory MEM. The interface circuit IN on the highway HW consists of, for example, an inserter and a dropper circuit, and takes in or sends time slot information within a predetermined highway via the line interface circuit LNI, and communicates with the central control unit CC on the exchange side. It exists to exchange information. Under the above configuration, the switchboard controller TCTL initializes all the memory contents indicating the installed/unmounted information and the power-on status of the switchboards T 1 to T o at system start-up. After that, response request signals are sequentially sent to the switchboards T 1 to T o , and it is determined whether or not there is a response from the switchboard T i within a certain time to the response request signal, and the power is turned on and the fault status is determined. Determine. FIG. 4 is a time chart illustrating the control device of the present invention. In the figure, the T i side indicates the switchboard, TCTL indicates the switchboard control device, and the passage of time is shown from the top to the bottom. switchboard control device
When the TCTL is powered on and started up (IPL; initial program load), during the initial setting (at IPL), all the installed/uninstalled information on the switchboard is set to the installed state, and the power-on information (on the switchboard) is turned off. state. As shown below, a response request signal is sent to each switchboard T i and responses for a certain period of time t are monitored. switchboard
If T i is not powered on again, there is no response operation to this response request signal, so there is no response. Therefore, the switchboard controller TCTL detects that there is no response within a certain period of time and assumes that the switchboard is not powered on. When the switchboard T i detects a response request signal for the first time after being powered on, it returns a response. The switchboard controller TCTL sends a response request signal and if a response is detected within a certain time,
Internal processing checks whether this response is the first response. In other words, if the current power-on status of switchboard T i is OFF, it is determined that power has been turned on to switchboard T i upon response from switchboard T i (first response), and the power is turned on. Turn input information on. In the subsequent exchanges between the switchboard controller TCTL and the switchboard T i , when a response is detected for sending a response request signal, the power-on information is on and there is a response, so the switchboard T i is operating normally. You can confirm that. On the other hand, if a failure occurs in the switchboard T i and the switchboard controller TCTL cannot send a response signal to the response request signal sent (no response), the switchboard controller TCTL will not respond within a certain period of time t. Since the power-on information is on and there is no response, it is known that a fault has occurred in the switchboard T i . FIG. 5 shows a specific processing configuration of this control device, and particularly explains the operation of the memory MEM and the control section shown in FIG. 3. In the figure, memory
Mounting and unmounting information E of the switch board as information in MEM,
Power-on information P is stored in switchboard correspondence #0 to #n. R 1 , R 2 , R 3 , and R 4 are registers, C is a counter that counts for a certain period of time and sets the contents of register R 4 to register R 2 upon timeout, ALU is an arithmetic circuit, and CMP is a normal/abnormality determination circuit. . The numbers marked with O correspond to the processing shown in FIG. First, when the switchboard control device TCTL is initially started up, all the installed/uninstalled information E is set to the installed state (for example, set to "1", etc.), and all the power-on information P is set to the off state (for example, set to "0", etc.) be done. If the switchboard T i has not yet been powered on, there is no response to the response request, so the power-on information E
The information set in read register R1 (off state = “0”) and interface circuit BDI (third
As a result of calculating the information stored in the register R 2 from the register R 4 to the register R 2 (no response=“0”) at the time of timeout when no read information is detected (see figure) in the arithmetic circuit ALU, it is determined that there is no change. On the other hand, if a response is detected, register R 1
Since there is a change (0→1) in the calculation result of the information "0" set in the register R2 and the information "1" (response) set in the register R2 , the setting information (response) of the register R3 is used as the first response. Power on state =
“1”) is stored in the corresponding area. Next, when the switchboard is normal, there is a response to the sending of the response request signal, and since the response is "1" when the power is turned on and the switch is "1", it is determined to be normal. If an abnormality occurs, a change is detected due to no response of "0" and it is determined that there is an abnormality. The following table shows this decision logic.

〔考案の効果〕[Effect of idea]

以上説明したように、本考案によれば、交換台
の実装未実装を含めて、制御線による応答信号の
検出あるいは一定時間の無応答検出により電源投
入状況及び障害発生状況の確認が可能となり、従
来の電源投入情報を別信号線で供給することも不
要となるため、その経済性、操作上きわめて効果
の高い交換台制御を実現できる。 また、中央制御装置等による管理も容易とな
る。
As explained above, according to the present invention, it is possible to check the power-on status and failure occurrence status by detecting a response signal from the control line or detecting no response for a certain period of time, even if the switch board is not installed. Since it is no longer necessary to supply the conventional power-on information through a separate signal line, it is possible to realize switchboard control that is extremely economical and operationally effective. Furthermore, management by a central control device or the like becomes easier.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の交換台制御装置を説明する概略
構成図、第2図は本考案の交換台制御装置を説明
する概略構成図、第3図は本考案を適用するシス
テムの一実施例である詳細構成図、第4図は本考
案の制御のタイムチヤート、第5図は本考案の処
理構成図である。 TCTL;交換台制御装置、T1〜To;交換台、
a,b;制御線、MPU;制御部、MEM;メモ
リ。
FIG. 1 is a schematic configuration diagram explaining a conventional switchboard control device, FIG. 2 is a schematic configuration diagram explaining the switchboard control device of the present invention, and FIG. 3 is an example of a system to which the present invention is applied. A detailed configuration diagram, FIG. 4 is a time chart of the control of the present invention, and FIG. 5 is a processing configuration diagram of the present invention. TCTL; switchboard controller, T 1 ~ T o ; switchboard,
a, b; control line, MPU; control unit, MEM; memory.

Claims (1)

【実用新案登録請求の範囲】 n台(nは1以上)の交換台と制御情報をやり
とりする交換台制御装置において、 交換台制御装置がIPLした直後から前記交換台
全てに対し各交換台に対応する個別応答要求信号
を一定の時間間隔で順次繰り返し送出する手段
と、 該応答要求信号に対する交換台からの応答を識
別する手段と、 交換台からの応答が最初の応答であると判断し
たとき前記交換台が電源投入されたと認識する手
段と、 以後の応答要求信号に対する応答が一定時間内
にないとき該当の交換台に障害が発生したと判定
する手段とを備えたことを特徴とする交換台制御
装置。
[Scope of Claim for Utility Model Registration] In a switchboard control device that exchanges control information with n switchboards (n is 1 or more), immediately after the switchboard control device performs an IPL, the switchboard controller transmits information to each switchboard for all said switchboards. means for sequentially and repeatedly transmitting corresponding individual response request signals at regular time intervals; means for identifying a response from the switchboard to the response request signal; and determining that the response from the switchboard is the first response. An exchange characterized by comprising means for recognizing that the switch has been powered on, and means for determining that a failure has occurred in the corresponding switch when there is no response to a subsequent response request signal within a certain period of time. Base control device.
JP2095290U 1990-03-01 1990-03-01 Expired JPH0332126Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2095290U JPH0332126Y2 (en) 1990-03-01 1990-03-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2095290U JPH0332126Y2 (en) 1990-03-01 1990-03-01

Publications (2)

Publication Number Publication Date
JPH02130155U JPH02130155U (en) 1990-10-26
JPH0332126Y2 true JPH0332126Y2 (en) 1991-07-08

Family

ID=31524031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2095290U Expired JPH0332126Y2 (en) 1990-03-01 1990-03-01

Country Status (1)

Country Link
JP (1) JPH0332126Y2 (en)

Also Published As

Publication number Publication date
JPH02130155U (en) 1990-10-26

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