JPS59178514A - System for interrupting emergency power supply of input/output device - Google Patents

System for interrupting emergency power supply of input/output device

Info

Publication number
JPS59178514A
JPS59178514A JP58054206A JP5420683A JPS59178514A JP S59178514 A JPS59178514 A JP S59178514A JP 58054206 A JP58054206 A JP 58054206A JP 5420683 A JP5420683 A JP 5420683A JP S59178514 A JPS59178514 A JP S59178514A
Authority
JP
Japan
Prior art keywords
input
abnormality
output device
power supply
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58054206A
Other languages
Japanese (ja)
Inventor
Kiyoshi Takahashi
清 高橋
Koichi Kondo
弘一 近藤
Toshio Asaka
朝香 俊雄
Takaharu Takai
高井 隆治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58054206A priority Critical patent/JPS59178514A/en
Publication of JPS59178514A publication Critical patent/JPS59178514A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To immediately cope with abnormality when the abnormality occurs, by detecting the cause of the abnormality, sending the detected cause to a central operation processor, and then, cutting off the power supply. CONSTITUTION:An input/output device 3 is equipped with an interface section 4 and mechanism section 5. When abnormality occurs at a part in the mechanism section 5, the input/output device 3 sends a signal representing the abnormality to an error controlling circuit 10 of the interface section 4. Upon receiving the signal, the controlling circuit 10 forms error data corresponding to the signal and sends the data to a central operation processor 1. Therafter, the controlling circuit 10 outputs a power supply cutoff signal and interrupts the power supply of a power supplying section 6 in the mechanism section 5. Since the cause of interruption of the power supply to the input/output device is informed to the central operation processor in this manner, any produced abnormality can be dealt with immediately.

Description

【発明の詳細な説明】 (1ン発明の技術分野 本発明は入出力装置の緊急電源遮断方式に係り、特に入
出力装置用の電源の切断を惹起せしめた入出力装置の原
因情報をその保守、修理等に利用せしめるようにした入
出力装置の緊急電源遮断方式(Q)技術の背景 中央演算処理装置に接続された入出力装置例えばプリン
タでも、そこに電源を切断する必要性が住するが、その
切断原因は1つとは限らない。従っζ、電源を切断に至
らしめた原因を知ることが、保守等に大いなる便宜を与
えるので、このような技術手段の開発が強く要望されて
いる。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to an emergency power cutoff method for an input/output device, and in particular to a method for maintaining the input/output device that causes the input/output device to be disconnected from its power supply. Emergency power cutoff method for input/output devices used for repairs, etc. (Q) Background of the technology Even for input/output devices connected to a central processing unit, such as a printer, there is a need to cut off the power to the device. , the cause of the disconnection is not limited to one.Therefore, knowing the cause of the power disconnection greatly facilitates maintenance, etc., and there is a strong demand for the development of such technical means.

(ハ)従来技術と問題点 従来においては、中央演算処理装置へ接続可能とされて
稼働状態にあるプリンタに何らかの電源切断原因、例え
ばハンマドライバ系に生じた異常が発生すると、電源切
断原因を何ら識別することなく、直ちに電源を切断して
しIFっていた。
(C) Conventional technology and problems Conventionally, when a printer that is connected to a central processing unit and is in operation has some kind of power-off cause, such as an abnormality in the hammer driver system, there is no way to eliminate the cause of the power-off. Without identifying it, I immediately turned off the power and turned it back on.

従って、電源が切断され、プリンタが休止状態になった
後においては、その電源が如何なる原因で切断されたの
かを知る手段がなくなっている。
Therefore, after the power is turned off and the printer enters a hibernation state, there is no way to know what caused the power to be turned off.

これがため、その保守、修理等に必要以」二の時間をか
けてしまう大きな要因となっている。又、原因不明のま
ま電源を再投入した場合、切断原因によっては二次障害
を誘発してしまうこともある。
This is a major reason why it takes more time than necessary for maintenance, repair, etc. Furthermore, if the power is turned on again without knowing the cause, secondary failures may occur depending on the cause of the disconnection.

(ニ)発明の目的 本発明は上述したような従来方式の有する欠点に鑑みて
創案されたもので、その目的は入出力装置にその電源を
切断しなければならない異常の発lf=時に、その異常
原因を検出してこれを中央演算処理装置へ送った徳に電
源を切断するようになし、以て発生した異常に早急な対
応をとりうる入出力装置の緊急電源遮断方式を提供する
ことにある。
(d) Purpose of the Invention The present invention has been devised in view of the drawbacks of the conventional system as described above, and its purpose is to provide an input/output device with an abnormality that requires the power to be cut off. To provide an emergency power-off system for input/output devices that detects the cause of an abnormality and turns off the power after sending the signal to the central processing unit, thereby allowing immediate response to an abnormality that occurs. be.

(ホ)発明の構成 そして、この目的は入出力装置を異常情報処理装置へ接
続する処理系における入出力装置の緊急電源遮断方式に
おいて、ト記入出力装置にそこで発生した異常を検出す
る異常検出部と、検出異常情報を」二記界雷情報処理装
置へ通知する手段とを設け、異常検出時に一1=、記入
出力装置の電源を遮断すると共に、その検出異常情報を
」−記異常情報処理装置へ通知してその異常情報に対す
る処置をとらしめることによって達成される。
(E) Structure of the Invention The purpose of this invention is to provide an abnormality detection unit for detecting an abnormality occurring in an input/output device in an emergency power cutoff method for an input/output device in a processing system that connects the input/output device to an abnormality information processing device. and a means for notifying the detected abnormality information to the information processing device, and when an abnormality is detected, the power to the input/output device is cut off, and the detected abnormality information is transmitted to the abnormality information processing device. This is achieved by notifying the device and instructing it to take action on the abnormal information.

(−・)発明の実施例 以下、添付図面を参照して本発明の詳細な説明する。(-・) Examples of the invention Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

この図において、1は中央演算処理装置で、2はそのメ
モリである。中央演算処理装置1は入出力装置3へ接続
される。入出力装置3はインターフェース部4及び機構
部5を有する。
In this figure, 1 is a central processing unit and 2 is its memory. The central processing unit 1 is connected to an input/output device 3. The input/output device 3 has an interface section 4 and a mechanism section 5.

機構部5には、異常が発生した場合に電源を遮断する必
要がある各部、例えは電源部6.ハンマトライバ7、紙
送り機構8等があり、これらはいずれもそこに異常が発
生した場合にその旨を表わす信号を線9上に送出するよ
うに構成されている。
The mechanism section 5 includes various sections that need to be powered off in the event of an abnormality, such as a power supply section 6. There are a hammer driver 7, a paper feed mechanism 8, etc., and each of these is configured to send a signal on a line 9 indicating an abnormality when an abnormality occurs therein.

線9はインターフェース部4のエラー制御回路10へ接
続されている。エラー制御回路10は異常発生原因に応
じたエラーデータを線11−ヒに送出し、且つ線12上
にエラーデータ転送制御信号を発生ずる。又、回路10
は電源切断信号を線13Pに発生する。
Line 9 is connected to an error control circuit 10 of interface section 4. The error control circuit 10 sends out error data to lines 11-1 according to the cause of the abnormality, and generates an error data transfer control signal on line 12. Also, circuit 10
generates a power down signal on line 13P.

14はメモリで、これはアンドケート15を経てエラー
制御回路10から送られて来るエラーデータを、アドレ
スカウンタ16の制御の下に一時記憶し、そしてその記
憶されたエラーデータを、アドレスカウンタ16の制御
の下に、読み出してアンドゲート17を経て線18.ト
に送出するように構成されている。
Reference numeral 14 denotes a memory, which temporarily stores error data sent from the error control circuit 10 via the AND gate 15 under the control of the address counter 16, and stores the stored error data in the address counter 16. Under control, read out via AND gate 17 to line 18. is configured to send to

線18は中央演算処理装置1へ接続され、メモリ14か
ら読み出され線18を経て転送されて来たエラーデータ
をメモリ2に記憶するようにしである。
A line 18 is connected to the central processing unit 1 so that error data read from the memory 14 and transferred via the line 18 is stored in the memory 2.

次に、ヒ記構成装置の動作を説明する。Next, the operation of the configuration device described above will be explained.

入出力装置3の機構部5内の成る部分例えばハンマドラ
イハフに何らかの原因で異常が発生すると、その異常を
表わす信号が線9を経てエラー検出回路10へ送られる
。エラー検出回路1oは線9」二の信号に応答してそれ
に相応するエラーデータを線11上に送出すると共に、
エラーデータ転送制御信号を綿13上に送出する。
If an abnormality occurs in a part of the mechanical section 5 of the input/output device 3, such as a hammer dryer half, for some reason, a signal representing the abnormality is sent to the error detection circuit 10 via a line 9. The error detection circuit 1o responds to the signal on the line 9''2 by sending corresponding error data on the line 11;
An error data transfer control signal is sent onto the cotton 13.

エラーデータはアンドゲート15を経てメモリ14へ送
られ、アドレスカウンタ16の制御の下にメモリ14に
一旦格納される。
The error data is sent to the memory 14 via the AND gate 15 and temporarily stored in the memory 14 under the control of the address counter 16.

このようなエラーデータ(検出異常情報)の取得後に、
入出力装置のインターフェース部4以外の各部は中央演
算処理装置1から切り離され、エラー制御回路10から
線13上に電源切断信号を発生して電源部6の電源を遮
断する。
After acquiring such error data (detected abnormality information),
Each section of the input/output device other than the interface section 4 is disconnected from the central processing unit 1, and the error control circuit 10 generates a power cutoff signal on the line 13 to cut off the power to the power supply section 6.

又、中央演算処理装置lからの応答に対して入出力装置
が緊急に電源を遮断した旨及びエラーデータをメモリ1
4から読み出してこれらを中央演算処理装置1のメモリ
2に格納する。
In addition, in response to the response from the central processing unit 1, the information that the input/output device has urgently shut off the power and the error data are stored in the memory 1.
4 and store them in the memory 2 of the central processing unit 1.

このように、入出力装置の電源か何らかの原因で緊急遮
断されると、その遮断原因が中央演算処理装置1に知ら
され、それが保持されているから、中央演算処理装置側
で入出力装置が如何なる原因により入出力装置の電源が
遮断されたかを知るこ速やかな対応がとれることとなり
、入出力装置にず。
In this way, if the power supply of an input/output device is suddenly cut off for some reason, the central processing unit 1 is notified of the cause of the cutoff, and this information is retained, so that the central processing unit can turn off the input/output device. Knowing what caused the power to the input/output device to be cut off will allow you to take immediate action and prevent the input/output device from being turned off.

上記実施例においては、検出された異常情報が(ト)発
明の効果 うる等の効果が得られる。
In the embodiment described above, the detected abnormality information provides (g) effects such as the effects of the invention.

【図面の簡単な説明】[Brief explanation of drawings]

添付図面は本発明の一実施例を示す図である。 図中、■は中央/iii算処理装置、3は入出力装置、
4はインターフェース部、5は機構部、IOはエラー制
御回路、14はメモリ、15,1.7はアンドゲート、
16はアドレスカウンタである。
The accompanying drawings illustrate one embodiment of the invention. In the figure, ■ is the central/iii arithmetic processing unit, 3 is the input/output device,
4 is an interface section, 5 is a mechanism section, IO is an error control circuit, 14 is a memory, 15, 1.7 is an AND gate,
16 is an address counter.

Claims (2)

【特許請求の範囲】[Claims] (1)  入出力装置を異常情報処理装置へ接続する処
理系における入出力装置の緊急電源遮断方式において、
ヒ記入出力装置にそこで発生した異常を検出する異常検
出部と、検出異常情報を上記異常情報処理装置へ通知す
る手段とを設しり、異常検出時に土−記入出力装置の電
源を遮断Jると共に、その検出異常情報を一ヒ記異常情
報処理装置へ通知してその異系′情報に対する処置をと
らしめるようにしたことを特徴とする入出力装置の緊急
電源遮断方式。
(1) In the emergency power cutoff method for input/output devices in the processing system that connects the input/output devices to the abnormal information processing device,
The input/output device is equipped with an abnormality detection unit that detects an abnormality occurring therein, and means for notifying the abnormality information processing device of the detected abnormality information, and when an abnormality is detected, the power to the input/output device is cut off and An emergency power cutoff method for an input/output device, characterized in that the detected abnormality information is notified to the abnormality information processing device described above, and the system is configured to take measures against the foreign information.
(2)1−記入出力装置にインターフェース部を設け、
このインターフェース部を介して異常tIV報処理装置
としての中央演算処理装置ヘヒ記入出力装置を接続し、
そのインターフェース部に−[、記異常検出部及び通知
手段を設+Jたことを特徴とする特許請求の範囲第1項
記載の入出力装置の緊急電源遮断方式。
(2) 1-Providing an interface section in the input/output device,
A central processing unit Hehi input/output device as an abnormality tIV information processing device is connected through this interface section,
2. An emergency power cutoff method for an input/output device according to claim 1, wherein the interface section is provided with an abnormality detection section and a notification means.
JP58054206A 1983-03-30 1983-03-30 System for interrupting emergency power supply of input/output device Pending JPS59178514A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58054206A JPS59178514A (en) 1983-03-30 1983-03-30 System for interrupting emergency power supply of input/output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58054206A JPS59178514A (en) 1983-03-30 1983-03-30 System for interrupting emergency power supply of input/output device

Publications (1)

Publication Number Publication Date
JPS59178514A true JPS59178514A (en) 1984-10-09

Family

ID=12964073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58054206A Pending JPS59178514A (en) 1983-03-30 1983-03-30 System for interrupting emergency power supply of input/output device

Country Status (1)

Country Link
JP (1) JPS59178514A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530735A (en) * 1978-08-25 1980-03-04 Hitachi Ltd Input/output control device
JPS5665241A (en) * 1979-11-02 1981-06-02 Hitachi Ltd Input/output device
JPS5676849A (en) * 1979-11-27 1981-06-24 Nec Corp Fault relieving system for unmanned operation electronic computer system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530735A (en) * 1978-08-25 1980-03-04 Hitachi Ltd Input/output control device
JPS5665241A (en) * 1979-11-02 1981-06-02 Hitachi Ltd Input/output device
JPS5676849A (en) * 1979-11-27 1981-06-24 Nec Corp Fault relieving system for unmanned operation electronic computer system

Similar Documents

Publication Publication Date Title
JP4291384B2 (en) Detection method of disconnection and power supply disconnection of IO unit connected to numerical controller
AU651800B2 (en) Monitoring device for control system
JPS59178514A (en) System for interrupting emergency power supply of input/output device
JP2010081030A (en) Emergency disaster alarm transfer system
JP2706027B2 (en) Programmable controller
JPS61169036A (en) System supervisory device
JP3107104B2 (en) Standby redundancy method
JP3298989B2 (en) Failure detection / automatic embedded device
JPS60144842A (en) Fault deciding system of central processor of another system
JPS6031334A (en) Fault supervisory system of communication system
JPS59188751A (en) System for detecting abnormality of peripheral device for electronic computer system
JPH0332126Y2 (en)
JPS6212537B2 (en)
JPH07302208A (en) Protective relay device
JPH09186661A (en) Remote monitoring device
JPS6055420A (en) Power source control system
JPH04268929A (en) Duplicated processor system
JPS59100997A (en) Abnormality alarm system
JPS63237116A (en) Power source supervisory device
JPS61147723A (en) Emergency interruption system for power source
JPS62175046A (en) Alarm informing system
JPH0522408A (en) Exchange system maintenance system
JPH04343199A (en) Communication line controller
JPS63298458A (en) Data transfer circuit
JPS58109949A (en) Error information display system