JPH0332056A - Manufacture of cmis semiconductor device - Google Patents

Abstract

PURPOSE:To make it high-speed by providing a gate oxide film, and stacking a polycrystalline Si film, and removing an oxide film, and accumulating a film of high melting point metal or silicide on the polycrystalline film, and forming a PMOS in a substrate and an NMOS in a p-well. CONSTITUTION:A p-well 11 is provided in an n-type Si substrate 10, and a field oxide film 5 for separation is formed, and gate oxide films 6 are accumulated on an active region 1 and the well, and then a polycrystalline Si film 20 is grown. With the diffusion source oxide film 7 as a mask, p-type impurities are selectively added to other mask 20 so as to form an n-type polycrystalline film 23 and a p-type polycrystalline film 24. Next, a silicide film 25 and the films 23 and 24 are etched en block so as to provide gate electrodes 21 and 22, consisting of polycides, and wiring. P and n polycrystalline films 123 and 124 are put in the form being connected by a silicide film 125, and n<+> source and drain regions 111 and 112 and p<+> source and drain regions 211 and 212 are provided so as to complete a CMOS consisting of an NMOS 100 and a PMOS 200. This way, the same pole gate structure can also be made by addition of a mask process of one time.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a complementary MOS (CMO3) having a homopolar gate, that is, a structure in which PMO3 has a p-type gate electrode and NMOS has an n-type gate electrode. Complementary insulation game for boat fishing)
(CMIS) Concerning the manufacture of semiconductor devices.

[Summary of the invention]

In manufacturing a CMIS according to the present invention, for example, polycrystalline St is selectively converted to n-type using an oxide film that serves as an n-type impurity source with respect to polycrystalline 5ill to be used as a gate electrode, and p-type polycrystalline St is selectively converted to n-type using this oxide film as a mask. Crystalline Sl is selectively used, and the electrical connection between the n-type and p-type polycrystals is made using a high melting point metal or its silicide film on the polycrystalline Sl.

[Conventional technology]

Conventionally, gate electrodes of CMIS have mainly used n-type polycrystalline Si for both PMO3 and NMO3, but for example, 0.5 V
In order to obtain a CMIS with a threshold voltage as low as below, a homopolar gate structure has become effective. Homopolar gate structure CM
When manufacturing IS, different conductivity types (games)! Connecting the poles becomes rJ1 problem. The conventional connection method using metal wiring sacrifices integration density, and the use of silicide technology is technically unstable.

[Invention to be Solved by the Invention] The present invention has been made to improve the above-mentioned problems in a simple manner using existing and established techniques.

[Means to solve the problem]

The method for manufacturing a homopolar gate CMIS semiconductor device of the present invention includes:
A step of providing a gate oxide film on each of the surfaces of the n-type Si substrate and the p-well, and depositing polycrystalline 5ill, for example,
forming an oxide film diffusion source containing n-type impurities selectively on the polycrystalline film on the well; and selectively adding p-type impurities to the polycrystalline film using the oxide film as a mask; A step of removing this oxide film and depositing *H of a high melting point metal or its silicide on the polycrystalline film, a step of providing each gate electrode and wiring in the two-layer structure of the TRM and the polycrystalline film, and an n-type substrate. This consists of a step of forming PMO3 and NMO8 in the p-well.

[Effect]

The p-type and n-type polycrystals S1 are automatically wired using a thin film of high-melting point metal or its silicide on top of the p-type and n-type polycrystals S1.
An integration density equivalent to that of MO3 can be obtained. Furthermore, a homopolar gate structure can be created by adding a single mask process.

〔Example〕

The present invention will be explained in detail below using the drawings.

(1) Example 1 (Figures 1 and 2) Figure 1 is a schematic plan view of 0MO3 according to the present invention, and Figure 2 +al
~fe) is a sectional view taken along the line AA' in FIG. 1 along the manufacturing process. Figure 2 (al) shows that a p-well 11 is provided on an n-type St substrate IO as in the normal CMO3 manufacturing process, and a gate oxide film 6 is formed on the n-active region 1 and p-well 11 by forming isolation field oxide l1I5. This is a cross section of a polycrystalline Si film 20 grown on the entire surface after being deposited on the p-well ti.In this case, the polycrystalline film 20 is undoped or has a low impurity density. A diffusion source oxide film 7 doped with an n-type impurity, for example, phosphorus, so as to cover all of 20.
Deposit and selectively leave this oxidation! This shows a state in which a p-type impurity, such as boron, is selectively added to another polycrystalline film 20 using I7 as a mask. As a result, an n-type polycrystalline film 23 and a p-type polycrystalline film 24 are selectively formed in polycrystalline W920. .

The diffusion B oxide film 7 contains, for example, 5OG (Sp
In On Glass) or doped oxide is used, and if necessary, a CVD oxide film is also provided thereon. For selective addition of boron, ion implantation, pre-deposition, etc. are applied. The density of addition of phosphorus and boron is, for example, about 1019 to 5 XIO"am-'.

FIG. 2(e) shows a polycrystalline film 23, such as a diffusion source oxide film 7.
For example, a silicide film 25 is deposited on the polycrystalline film 23.24 after removing the oxide film on the polycrystalline film 24. The silicide film 25 is, for example, C of WSix or Mo5lx.
A VD film or a sputtered film is applied. Furthermore, high melting point metals such as W and Mo can also be used instead of silicide. Figure 2 (dl), for example, a silicide film 2 in the shape of Figure 1.
5 and polycrystal @23.24 are selectively etched at once to form polycide (Silicide, polySi two-layer structure).
Gate electrodes 21, 22 and wiring (pn polycrystalline film 1
*prn polycrystalline films 124, 123 are composed of silicide H12
It is connected by 5. Hereinafter, as shown in FIG. Hole, each metal arrangement A101, 102.201,
8MO3100 and 2MO after 202.225 shape process
0MO3 consisting of 3200 is completed.

〔Effect of the invention〕

As described above, according to the present invention, zero
MO3 can be realized without reducing the integration density by adding one mask process to the conventional manufacturing process.The present invention is not limited to the examples shown in the embodiments;
It can also be applied to DD and LDD structures. The gate insulating film is not limited to an oxide film, and can be generally applied to CMIS. Furthermore, since the present invention uses silicide or high-melting point metal for part of the wiring, it is also excellent in high-speed performance.

[Brief explanation of drawings]

FIG. 1 is a schematic plan view of 0MO3 according to the present invention,
Figure 2 (al~(sl is A- in Figure 1 along the manufacturing process)
It is an A' line sectional view. 1.10・ 6 ・ ・ ・ 7 ・ ・ 11・ ・ ・ 20・ ・ 23・ ・ 24・ ・ ・ ・ N-type region, gate oxide film, diffusion source oxide film, p-well, polycrystalline St ・- N-type polycrystalline/p-type polycrystalline 25.125・・Silicide 100・・・・NMO5 200・・・・PMO3 or more

Claims (1)

[Claims] In manufacturing a homopolar gate CMIS semiconductor device, after providing a gate insulating film on each of the surfaces of a first semiconductor region of one conductivity type and a second semiconductor region of opposite conductivity type, a polycrystalline semiconductor film is deposited. a second step of selectively forming an oxide film containing an opposite conductivity type impurity on at least the polycrystalline film on the first region; and selecting the polycrystalline film using the oxide film as a mask. a third step of adding impurities of one conductivity type to the polycrystalline film; a fourth step of removing the oxide film and depositing a thin film of a high melting point metal or its silicide on the polycrystalline film; A CMIS semiconductor comprising: a fifth step of selectively etching into a predetermined shape and providing each gate electrode and wiring; and a sixth step of forming a reverse conduction channel transistor in the first region and a single conductivity channel transistor in the second region. Method of manufacturing the device.