JPH033050U - - Google Patents
Info
- Publication number
- JPH033050U JPH033050U JP6389889U JP6389889U JPH033050U JP H033050 U JPH033050 U JP H033050U JP 6389889 U JP6389889 U JP 6389889U JP 6389889 U JP6389889 U JP 6389889U JP H033050 U JPH033050 U JP H033050U
- Authority
- JP
- Japan
- Prior art keywords
- arithmetic
- result output
- output
- arithmetic units
- discrepancy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Hardware Redundancy (AREA)
Description
第１図はこの考案の一実施例のブロツク図であ
る。
１，２……演算装置、３……通信バス、１１１
〜１１ｎ，２１１〜２１ｎ……演算部、１２１〜
１２ｎ，２２１〜２２ｎ……排他的論理和回路、
１３１〜１３ｎ，２３１〜２３ｎ……ＡＮＤ回路
、１４１〜１４ｎ，２４１〜２４ｎ……フリツプ
フロツプ１５１〜１５ｎ，２５１〜２５ｎ……Ｎ
ＯＴ回路、１５，２５……ＯＲ回路、１６，２６
……カウンタ、１７，２７……ＯＲ回路。
FIG. 1 is a block diagram of one embodiment of this invention. 1, 2... Arithmetic device, 3... Communication bus, 111
~11n, 211~21n... calculation section, 121~
12n, 221 to 22n...exclusive OR circuit,
131-13n, 231-23n...AND circuit, 141-14n, 241-24n...Flip-flop 151-15n, 251-25n...N
OT circuit, 15, 25...OR circuit, 16, 26
...Counter, 17, 27...OR circuit.
Claims (1)
装置において、該演算装置の各々に、他方の演算
結果出力を受信して自らの演算結果出力と比較し
不一致を検出する手段と、該不一致が一定時間後
も継続しているときに不一致出力を生じる手段と
を備えることを特徴とする２重化装置。 In a duplication device having two arithmetic units that perform the same arithmetic operation, each of the arithmetic units includes means for receiving the arithmetic result output of the other and comparing it with its own arithmetic result output to detect a discrepancy; and means for producing a mismatched output when the mismatch continues even after a certain period of time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989063898U JPH0731308Y2 (en) | 1989-05-31 | 1989-05-31 | Duplex device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989063898U JPH0731308Y2 (en) | 1989-05-31 | 1989-05-31 | Duplex device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH033050U true JPH033050U (en) | 1991-01-14 |
| JPH0731308Y2 JPH0731308Y2 (en) | 1995-07-19 |
Family
ID=31594358
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989063898U Expired - Lifetime JPH0731308Y2 (en) | 1989-05-31 | 1989-05-31 | Duplex device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0731308Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58189745A (en) * | 1982-04-30 | 1983-11-05 | Nippon Signal Co Ltd:The | Fault detecting method of multiplex device |
-
1989
- 1989-05-31 JP JP1989063898U patent/JPH0731308Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58189745A (en) * | 1982-04-30 | 1983-11-05 | Nippon Signal Co Ltd:The | Fault detecting method of multiplex device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0731308Y2 (en) | 1995-07-19 |