JPH0329187B2 - - Google Patents

Info

Publication number
JPH0329187B2
JPH0329187B2 JP58125288A JP12528883A JPH0329187B2 JP H0329187 B2 JPH0329187 B2 JP H0329187B2 JP 58125288 A JP58125288 A JP 58125288A JP 12528883 A JP12528883 A JP 12528883A JP H0329187 B2 JPH0329187 B2 JP H0329187B2
Authority
JP
Japan
Prior art keywords
channel
transistors
basic cell
basic
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58125288A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6017930A (ja
Inventor
Shinji Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58125288A priority Critical patent/JPS6017930A/ja
Priority to EP84304668A priority patent/EP0131463B1/en
Priority to DE8484304668T priority patent/DE3477312D1/de
Priority to KR1019840003972A priority patent/KR890004568B1/ko
Publication of JPS6017930A publication Critical patent/JPS6017930A/ja
Priority to US07/008,042 priority patent/US4816887A/en
Publication of JPH0329187B2 publication Critical patent/JPH0329187B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP58125288A 1983-07-09 1983-07-09 マスタ・スライス方式に於ける基本セル Granted JPS6017930A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP58125288A JPS6017930A (ja) 1983-07-09 1983-07-09 マスタ・スライス方式に於ける基本セル
EP84304668A EP0131463B1 (en) 1983-07-09 1984-07-09 Masterslice semiconductor device
DE8484304668T DE3477312D1 (de) 1983-07-09 1984-07-09 Masterslice semiconductor device
KR1019840003972A KR890004568B1 (ko) 1983-07-09 1984-07-09 마스터슬라이스형 반도체장치
US07/008,042 US4816887A (en) 1983-07-09 1987-01-21 CMOS gate array with orthagonal gates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58125288A JPS6017930A (ja) 1983-07-09 1983-07-09 マスタ・スライス方式に於ける基本セル

Publications (2)

Publication Number Publication Date
JPS6017930A JPS6017930A (ja) 1985-01-29
JPH0329187B2 true JPH0329187B2 (pm) 1991-04-23

Family

ID=14906364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58125288A Granted JPS6017930A (ja) 1983-07-09 1983-07-09 マスタ・スライス方式に於ける基本セル

Country Status (1)

Country Link
JP (1) JPS6017930A (pm)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2868016B2 (ja) * 1988-12-28 1999-03-10 沖電気工業株式会社 ゲートアレイの基本セル
DE68925897T2 (de) * 1989-04-28 1996-10-02 Ibm Gate-Array-Zelle, bestehend aus FET's von verschiedener und optimierter Grösse
JPH03251338A (ja) * 1990-02-27 1991-11-08 Canon Inc 試料移送装置
US5300790A (en) * 1990-06-15 1994-04-05 Seiko Epson Corporation Semiconductor device
DE69130150T2 (de) * 1990-06-15 1999-04-15 Seiko Epson Corp., Tokio/Tokyo Halbleiteranordnung

Also Published As

Publication number Publication date
JPS6017930A (ja) 1985-01-29

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