JPH03282729A - Data processor - Google Patents

Abstract

PURPOSE:To shorten processing time by directly setting conversion data at a targeted circuit without inputting data to a bit slice ALU after converting at a data conversion circuit. CONSTITUTION:The bit slice ALU 1, data conversion hardware 3, code memory 4, a decoder 5, a DO bus 6, and a DI bus 7 are provided. Also, the input side of a register 2 is connected to the DI bus 7 and a hardware control instruction code to control the data conversion hardware 3 and a hardware control instruction code to control the register 2 are provided in an instruction code 8. In such a way, the conversion data is directly set at the targeted circuit without inputting the data to the bit slice ALU 1 after converting by the data conversion hardware 3. Thereby, the processing time can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data processing device, and particularly to a bit slice A
The present invention relates to a data processing device having an LU and its peripheral circuits.

[Conventional technology]

In information processing devices and the like, bit slice ALUs are used to achieve high-speed calculations, and peripheral circuits are provided around the bit slice ALUs to compensate for cases where the bit slice ALUs cannot perform high-speed processing. An example of the configuration of a conventional bit slice ALU and its peripheral circuits will be described with reference to FIGS. 3 and 4. The example in FIG. 3 includes a bit slice ALL 111 that performs data calculations, a register 12 that stores data converted by this hit slice ALUII, and a register 12 that stores data converted by the bit slice ALUII, and converts data output from the bit slice ALUII and converts it back into the bit slice ALUII. A data conversion hardware 13 for inputting data, a code memory 14 for storing instruction codes for controlling the registers 12 and the data conversion hardware 13, and a code memory 14 for storing instruction codes to control the registers 12 and the data conversion hardware 13 by decoding the instruction codes. A DO bus 6 is an output data path from the bit slice ALU II, and a DI bus 7 is an input data path to the bit slice ALU II. Further, an instruction code 18 for operating the bit slice ALL 111 and its peripheral circuits is stored in the code memory 14 with an arbitrary length, and a hardware control instruction code 20 for controlling the register 12 and data conversion hardware 13 is stored. It is included in the instruction code 18.

The operation of this example is that when converting the data inside the bit slice ALU II and storing it in the register 12, the data is output from the bit slice ALU II to the DO bus 16, and the hardware control instruction code 20 is decoded by the decoder 15. 1) outputs the converted data to the I bus 17 and outputs the converted data to the bit slice ALU 1.
Input the conversion data to 1. The next instruction outputs the conversion data from the bit slice ALU II to the DO bus 6, and sets the conversion data in the register 12 as a result of decoding the hardware control instruction code 20 by the decoder 15.

[Problem to be solved by the invention]

As mentioned above, the conventional data processing device cannot control the data conversion hardware 13 and the register 12 at the same time, so after the data conversion hardware 13 converts the data,
Input to bit slice ALUII and DO again as it is
Since it is output to the bus 6 and set in the register 12, at least two instructions are required, which has the secondary effect of increasing the number of instructions and increasing the processing time.

An object of the present invention is to convert data using data conversion hardware (circuit) and then directly set the converted data to the target circuit without inputting it to the bit slice ALU.
An object of the present invention is to provide a data processing device that can shorten processing time.

[Means to solve the problem]

The data processing device of the present invention includes a bit slice ALU,
Data conversion hardware that converts data output by the bit slice ALU, a register that stores data converted by the data conversion hardware, and an instruction code that simultaneously controls the data conversion hardware and the register. and a decoder for decoding the instruction code from the code memory.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a format diagram showing an instruction code of the embodiment of FIG.

The bit slice ALUI, data conversion hardware, code memory 4, decoder 5, Do bus and DI bus 7 in the embodiment of FIG. 1 are the same as in the example shown in FIG. Connected to DI bus 7, data conversion hardware 3 is included in instruction code 8.
It has a hardware control instruction code 9 for controlling the register 2, and a hardware control instruction code 10 for controlling the register 2.

Next, the operation of this embodiment will be explained. When converting the data inside the bit slice ALUI and storing it in the register 2, output the data from the bit slice ALU 1 to the DO bus, and use the result of decoding the hardware control instruction code 9 by the decoder 5. By controlling the data conversion hardware 3 to convert data, outputting the converted data to the DI bus 7, and controlling the register 2 according to the result of decoding the hardware control instruction code 10 by the decoder 5,
Set the conversion data in register 2.

〔Effect of the invention〕

As explained above, the data processing device of the present invention converts data in the data conversion circuit, and then converts the data into a bit slice AL.
By sending the converted data directly to the target circuit without inputting it to U, there is an effect that the processing time can be shortened.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a format showing an instruction code of the embodiment of FIG. 1, and FIG.
The figure is a block diagram showing an example of a conventional data processing device, and FIG. 4 is a format diagram showing the instruction code of the example shown in FIG. 1.11...Bit slice ALU, 2.12...
Register, 3.13...Data conversion hardware, 4
．． 14...Code memory, 5.15...Decoder,
6.16...DO Babasu 7, 17...DI Babasu 8
゜18...Instruction code, 9,10.20...Hardware control instruction code.

Claims (1)

[Claims] a bit slice ALU; data conversion hardware that converts data output by the bit slice ALU;
a register that stores data converted by the data conversion hardware; a code memory that stores an instruction code for simultaneously controlling the data conversion hardware and the register; and a code memory that decodes the instruction code from the code memory. A data processing device comprising: a decoder for decoding.