JPS5835660A - Microprocessor - Google Patents

Abstract

PURPOSE:To make a microprocessor operate as a processor for two sets of data independent of each other or a processor for single data having the double bit length through it is the one-chip processor, by providing a carry switching circuit and a micro instruction converting circuit. CONSTITUTION:The micro instruction given from the external is stored in a micro instruction register 1. When contents of this register 1 are two micro instructions independent of each other, upper bits and lower bits are given to controlling circuits 4 and 5 respectively through a micro instruction converting circuit 2 by a switching signal. Respective control signals generated in circuits 4 and 5 are given to an operating circuit 6 as well as a sequencer 13 and an operating circuit 9 as well as a sequencer 11 respectively. In this case, carry switching circuits 12 and 20 are closed, and circuits 5 and 9 and sequencers 13 and 11 are operated independently of each other respectively. When contents of the register 1 are a single micro instruction, it is converted in the circuit 2 and is sent to circuits 4 and 5. Circuits 12 and 20 are opened, and circuits 5 and 9 and sequencers 13 and 11 are operated as one body respectively.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a single-chip microprocessor. In particular, the present invention relates to an improvement in which a microprocessor configured to process signals with a large bit width can also be used to process signals with a small bit width.

As integrated circuit technology advances, the number of bits that microprocessors can process has increased from 4 bits to 8 bits and 16 bits.
It has been expanded by bits. In recent years, a 62-bit version is also being planned. As the number of bits that can be processed increases, depending on the processing content, it may be more convenient to use a smaller number of bits. In particular, when looking at the microprocessor L8I as a single product, although it can process large bit widths, demand has not increased significantly, and even if a microprocessor with a large bit width is developed, it will not necessarily lead to an increase in sales volume or a decrease in price. It will not be connected.

SUMMARY OF THE INVENTION An object of the present invention is to provide a device that can operate as two sets of independent data processing devices or a single data processing device with double bit length from a single-chip microprocessor. .

The present invention provides a device that can use either a large bit width or a small bit width K by controlling the υ microinstruction conversion circuit by a switching signal applied from outside the microprocessor. That is, if the microinstructions are two sets of independent instructions, the two sets of microinstruction control circuits generate independent control signals, and the two sets of arithmetic circuits and the corresponding two sequencers operate independently. . On the other hand, if the microinstruction is a single instruction with twice the bit width, two sets of microinstruction control circuits generate control signals for controlling the single microinstruction, and the switching signal is used to control the two sets of microinstruction control circuits. An arithmetic circuit and two sets of sequencers allow carry propagation between lower bits and upper bits. This allows the microprocessor on the same chip to process two sets of independent data, or to process data with twice the bit width. Furthermore, if necessary, data processing can be performed using only one of the two sets.

Two sets of Microprocessor arithmetic circuits of the present invention, a carry switching circuit for operating the two sets of arithmetic circuits as a single double bit width arithmetic circuit, and two sets of sequencers;
A microprocessor that has a carry switching circuit, a microinstruction register, a microinstruction conversion circuit, and two sets of microinstruction control circuits on the same L8 chip is used to operate these two sequencers as a single sequencer. , when this microprocessor is operated as an independent data processing device, the contents of the microinstruction register are transferred to the two sets of microinstruction control circuits through the microinstruction conversion circuit in response to a switching signal from outside the microprocessor. , the microprocessor is controlled as a single data processing device, and the carry switching circuit of the arithmetic circuit and the carry switching circuit of the sequencer are controlled by the switching signal, By connecting the two sets of arithmetic circuits and the two sets of 7-kennas, each becomes a single arithmetic circuit with twice the bit width and a single sequencer with double bit width. When the processor operates as two independent sets of data processing devices, the switching signal causes the contents of the microinstruction register to be passed through the microinstruction conversion circuit to the two sets of microinstruction control circuits as two independent sets of microinstructions. By transferring, an independent control signal is issued, and the switching signal controls the carry switching circuit of the arithmetic circuit and the carry switching circuit of the sequencer, so that the two sets of arithmetic circuits and the two sets of sequencers correspond to each other. It is characterized by having two sets of independent data processing functions and a single data processing function with twice the bit width.

A detailed description will be given below with reference to the drawings.

FIG. 1 shows a block diagram of a first embodiment of the present invention. A microinstruction given from an external memory is stored in a 32-bit microinstruction register (hereinafter referred to as "MxR") 1 at the end of execution of the instruction. This MxR
When the microinstruction is set to 1, the data of MxR1 is sent to the microinstruction conversion circuit 2. This microinstruction conversion circuit 2 is a circuit that forms the core of the present invention.

If the contents of MxR1 are two independent sets of microinstructions, the Oth to 15th bits of the 32-bit instruction are transferred to the control circuit 4 through the microinstruction conversion circuit 2 by a switching signal from outside the L8 chip. enter. The control signals generated here are used by a 16-bit arithmetic circuit @, a 256-word x 16-bit register memory 7, and a sequencer 8.
etc., which controls half of this microprocessor. This M
The 16th to 32nd bits of XRl enter a control circuit 5 which controls the other half of the microprocessor, including a 16-bit arithmetic circuit, a 256-word by 16-bit register memory 10, and a sequencer 11. This M
If the content of electrician R1 is a single microinstruction, electrician R
The 0th to 31st bits of 1 are microinstruction conversion circuit 2
is converted and sent to control circuits 4 and 5. Control circuits 4 and 50 control signals respectively control each half of this microprocessor as before. In this case, the control signals of control circuits 4 and 5 cause the same large-bit-width microinstruction to be executed.

Next is the book! The operation of the microprocessor will be explained using Figures 2 and 3. FIG. 2 is an example of the format of a microinstruction. The instruction in the upper part of FIG. 2 is a 32-bit arithmetic instruction, which calculates the contents of the 8-bit register memory address RA and the 16-bit constant C according to the instruction of the 4-bit arithmetic mode M, and stores the result in the register. Write to memory address Rm. The constant C is input to the lower 16 bits of the arithmetic circuit 6, and the upper 16 bits are "0".
is inserted.

The microinstruction shown in the lower part of Figure 2 consists of two sets of independent 16-bit microinstructions, and calculates the contents of the 4-bit register memory address Rm1 and the 4-bit constant 01 according to the instructions of the 4-bit operation mode M1. and writes the result to register memory address RA1. t + contents of 4-bit register memory address Rm2 and 4-bit F at the same time
It is used to calculate constant 02 in accordance with the instruction of 4-bit calculation mode M2 and write the result to register memory address Rm2. Constants 01 and 02 are each input to the lower 4 bits of the arithmetic circuit 6.9, and the upper 12
A "0" is inserted into the bit.

In the example shown in FIG. 2, the capacity of register memory 7 and register memory 10 is 8 bits of address space.
In the case of the microinstruction shown in the lower part of FIG. 2, only the lower 4 bits of the address are used.

FIG. 3 is a detailed diagram of the microinstruction conversion circuit 2 that performs switching between the case where the microinstruction in the upper row of FIG. 2 is MIRIK4-ft and the case where the microinstruction in the lower row is set.

When the switching signal specifies two independent sets of operations in a microinstruction as shown in the lower part of Figure 2, the function code ν1, which is the identification code of the microinstruction, enters the control circuit 4 as is and is decoded. It is used as a control signal for the contents of the control circuit 4. Function code IP
2 enters the control circuit 5 through a multiplexer (hereinafter referred to as rMpxJ) 33, and is similarly used within the control circuit 5. Register memory address RA1 and RM2
are the top 4 through M P X 30 and 34 respectively
All the bits are set to "0", and the total becomes an 8-bit address, which is sent to the control circuits 4 and 5, and becomes the address of the register memories 7 and 10 as it is. The 16-bit data in register memory 7 and IO is input to arithmetic circuits 6 and 9 and becomes the subject of arithmetic operations.

The calculation modes M1 and M2 are sent to the control circuits 4 and 5 through the MPXs 31 and 35, respectively, to determine the calculation mode and instruct the calculation circuits 6 and 9 to perform calculations.

Constants 01 and 02 are entered into the lower 4 bits of M P X 32 and 36, respectively, and all "0" are inserted into the upper 12 bits. Passed to control circuits 4 and 5 1
The 6-bit constant is sent as is to arithmetic circuits 6 and 9 to be subjected to arithmetic operations.

The carry power of the arithmetic circuits 6 and 9 is input together with the arithmetic mode from the control circuits 4 and 5, respectively, and the carry switching circuit 12 is in a closed state by the switching signal, and the carry is not propagated from the arithmetic circuit 9 to the arithmetic circuit 6. doesn't happen. The arithmetic operation is performed as described above, and the result of the arithmetic operation is written to the same register memory address at the time of reading.

Next, the case where the switching signal specifies a single 32-bit operation in the microinstruction shown in the upper part of FIG. 2 will be explained.

The function code ν is input directly to the control circuit 4,
At the same time, it also enters the control circuit 5 through the M PX 33.

These are decoded together and used within the control circuit so that arithmetic circuits 6 and 9 execute the same microinstruction. Next, the 8-bit register memory address RAtiM
The data is sent to control circuits 4 and 5 through PXs 30 and 34, and 16-bit data at the same address is read from register memories 7 and 10, and input to arithmetic circuits 6 and 9 to be subjected to arithmetic operations. Calculation mode M is MP! The signal is sent to the control circuits 4 and 5 through 31 and 35, and instructs the calculation circuits 6 and 9 to perform the same calculation.

The 16-bit constant C is sent to the control circuit 5 through the MPX35.
The data is sent to the arithmetic circuit 9 as 16-bit data and is subjected to arithmetic operations. The control circuit 4 has MP
16-bit data of all "0" is sent from the X 32 and becomes the subject of calculation by the calculation circuit 6. The carry output from the arithmetic operation of the arithmetic circuit 9 is sent through the carry switching circuit 12 to the upper arithmetic circuit 6 as a carry output. In the calculation X circuit 6, calculation is performed by adding the carry human power. The carry power of the arithmetic circuit 9 is inputted from the control circuit 5 together with the arithmetic mode M.

The calculations are performed as described above, and the calculation results of calculation circuits 6 and 9 are written to the same addresses in register memories 7 and 10, respectively, as in the subsequent writing.

Here, the detailed operation of the arithmetic circuits 6 and 9 is not directly related to the present invention, so a description thereof will be omitted.

Next, the sequencer will be explained. The sequencer 13 is controlled by the control circuit 4, and the sequencer 11 is controlled by the control circuit 5. The incrementers 14 and 15 are circuits that add and count the address of the microinstruction by "1", and normally the contents of the microinstruction address registers 18 and 19 are incremented by "1" by the incrementers 14 and 15. and 17, when the execution of the previous microinstruction is completed, the i microinstruction address registers 18 and 19 are written again and the next instruction is etched.

When a branch-related microinstruction is set in M R1, the results of calculations in arithmetic circuits 6 and 9 are sent to the microinstruction address registers 18 and 17 through MPX 16 and 17, respectively, according to instructions from control circuits 4 and 5. When this microprocessor fetches two sets of 16-bit independent microinstructions, the incrementer 14's carry input is switched by the switching signal. When fetching a single 32-bit microinstruction in which "0" is input through the circuit 20 and the sequencers 11 and 13 operate separately, the carry power of the incrementer 14 switches the carry switching circuit 20 with a switching signal. As a result, the carry outputs of the incrementer 15 are combined, the carry is propagated, and the sequencers 11 and 13 operate as one 32-bit sequencer.

As explained above, according to the present invention, by providing a carry switching circuit and a microinstruction conversion circuit, although it is a single-chip microprocessor, it can be used as an independent two-chip microprocessor.
It can be used as a set of data processors or as a single double bit length data processor. 1+ The same chip can also be used as a microprocessor with two types of pit lengths. Therefore, the microprocessor LB of the present invention can meet the demand for processing with a large bit width, and can also be used for processing with a short bit width, which is in high demand. It can be offered as a price product. When using short bit width processing, parallel processing can be performed to improve its reliability.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an apparatus according to an embodiment of the present invention. FIG. 2 is a diagram showing a microinstruction format. FIG. 3 is a detailed diagram of the microinstruction conversion circuit when executing the microinstruction shown in FIG. 2. 1... Microinstruction register (M engineering i), z-microinstruction conversion circuit, 4.5 - microinstruction control circuit, 6
．． 9...Arithmetic circuit, 11.13...Sequencer, 1
2.20--Carry switching circuit. Patent Applicant NEC Corporation Representative Patent Attorney Takamasa Izu 1 Figure

Claims (1)

[Claims] (1) Two arithmetic circuits capable of executing at least a logical operation, an arithmetic operation, and a shift operation, and a first carry switching circuit that opens and closes a carry signal from one of these two arithmetic circuits to the other. , two sets of sequencers that determine the address of the microinstruction, and a second carry switching circuit that opens and closes a carry signal from one of the two sequencers to the other in conjunction with the first carry switching circuit. A micro-instruction register (MIR) that temporarily stores micro-instructions, a micro-instruction conversion circuit connected to the register a', and the upper and lower bits of the output of this micro-instruction conversion circuit as inputs, respectively. two microinstruction control circuits that provide control signals to the two arithmetic circuits are provided on the same chip; the first and second carry switching circuits are closed;
A mode in which the two arithmetic circuits and the two sequencers process signals with a long bit width, and a mode in which the first and second carry switching circuits are opened and the two arithmetic circuits and the two sequencers process signals with a short bit width. A microprocessor characterized in that it is configured so that it can be used by switching to a mode in which signal processing of different widths is performed independently.