JPH03272179A - Gate turnoff thyristor - Google Patents

Abstract

PURPOSE:To prevent an ON current from concentrating at turnoff and to improve a gate turnoff thyristor in turnoff performance without decreasing it in other characteristics by a method wherein the central part of an island- shaped first conductive layer is set lower than its peripheral part in impurity concentration. CONSTITUTION:An N2 emitter layer 2 is located closer to the center than an N1 emitter layer 1 and backward biased in impurity concentration b starting from a part a closest to a gate electrode 7, an ON current in an emitter layer is made to concentrate on the center with the elapse of a gate turnoff time, and the N2 emitter layer 2 is smaller than a part just under the N1 emitter layer 1 in injection efficiency. Therefore, a current just under the layer 2 returns to an OFF state sooner than a current just under the layer 1. Therefore, as the inner peripheral part of the layer 1 is turned in an ON state just before turnoff, the current of a thyristor of this design is smaller than that of a conventional GTO. Therefore, An ON current can be made to flow more than that in a conventional GTO in intensity by a certain degree compensated by the reduction in current density, so that a thyristor of this design can be improved in gate turnoff performance as compared with a conventional GTO.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to gate turn-off thyristors (hereinafter referred to as GT
(referred to as O), and in particular its emitter structure.

[Conventional technology] FIG. 2 shows an example of a cross section of a conventional GTO.

In FIG. 2, 1 and 4 are n-type electric shock layers, ie, an emitter layer and an n base layer, 3 and 5 are p-type electric shock layers, which are a p base layer and a p-type vine layer, 6 is an anode electrode, and 7 Reference numeral 8 indicates a gate electrode, and 8 indicates a cathode electrode. A plurality of electrodes are formed independently as island-shaped electrodes, and are formed on the n1 layer 1, which is the first conductive layer, on the convex portion of the semiconductor substrate.

9 is a metal plate that electrically connects this cathode electrode 8.

In a GTO with the above structure, when examining the current density C at the time of gate turn-off, firstly, at the start of turn-off, the gate electrode 7 becomes negative with respect to the cathode electrode 8, so that the gate electrode 7 of the pn junction J1 A reverse bias is applied from the nearest portion a, and the on-current flowing from the anode electrode 6 to the cathode electrode 8 in the n emitter layer becomes concentrated in the center of each n1 emitter layer 1 as the turn-off time elapses.

Therefore, just before turn-off is completed, the center of each Nl emitter layer 1 reaches a very high current density.

[Problem to be solved by the invention]

Therefore, if an on-current that exceeds the gate turn-off capability of the semiconductor device flows, the semiconductor device will be thermally destroyed due to this current concentration.
This was a major factor limiting O's turn-off ability.

The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a gate turn-off thyristor with improved turn-off ability without deteriorating other characteristics.

[Means to solve the problem]

In the gate turn-off thyristor according to the present invention, in the first conductive layer in contact with the island-shaped electrode, the impurity concentration is set to be lower at the center than at the outer periphery.

[Function] In this invention, since the impurity concentration of the first conductive layer is lower in the center than in the outer periphery, the current flowing through the first conductive layer is no longer concentrated in the center, and the gate turn-off ability is improved. will improve.

(Embodiment) FIG. 1 is a sectional view of a GTO showing an embodiment of the present invention.

In FIG. 1, the n2 emitter layer 2 is n, the emitter layer 1 is
It is located closer to the center, and its impurity concentration is set lower than that of the ivy layer 1 by n1.

Note that the other configurations are the same as those in FIG. 2, so their explanation will be omitted.

In such a structure, the current density at gate turn-off is reverse biased first from the part a closest to the gate electrode 7, and the vine layer part where the on-current is generated concentrates in the center as the gate turn-off time passes. I will do it, but n2
Since the impurity concentration of the main vine layer 2 is set to be lower than that of the n1 vine layer 1, the injection efficiency immediately below the n2 vine layer 2 is lower than the injection efficiency immediately below the n1 vine layer 1. For this reason, the current directly under the n2 vine layer 2 recovers to the off state more quickly than the current directly under the n1 vine layer 1. Therefore, just before turn-off, the inner peripheral part of the n1 process layer 1 is in the on state, so the GTO of the conventional structure
The current will be lower.

Therefore, since the current density is lowered, more on-current can flow, and the gate turn-off ability is improved compared to the conventional GTO.

Furthermore, regarding the turn-off characteristics, the emitter structure of the 8th part that determines the gate trigger sensitivity is the same as the conventional one, so the gate trigger current does not increase.

In the above embodiment, the case where 1 and 2.4 are n-type conductive layers and 3.5 is a p-type conductive layer is explained, but 1 and 2.4 are p-type and 3 and 5 are n-type conductive layers. A similar effect is achieved in the case of .

Further, in the above embodiment, a reverse blocking type GTO has been described, but the same effect can be achieved with a reverse conduction type or a reverse conduction type GTO.

〔Effect of the invention〕

As explained above, in this invention, the impurity concentration at the center of the island-shaped first conductive layer is set lower than at the outer periphery, thereby preventing concentration of on-current at turn-off and without deteriorating other characteristics. The effect of improving turn-off ability is obtained.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an embodiment of a GTO according to the present invention, and FIG. 2 is a sectional view showing an example of a conventional GTO. In the figure, 1 is an n1 vine layer, 2 is an n2 vine layer, 3 is a p base layer, 4 is an n base layer, 5 is a p vine layer, 6 is an anode electrode, 7 is a gate electrode, and 8 is a The cathode electrode 9 is a metal plate. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] It has a plurality of pn junctions, two different types of electrodes are provided on one main surface, and one type of the two different types of electrodes is formed as a plurality of independent island-shaped electrodes on the convex portion. , a gate turn-off thyristor including a first conductive layer of a semiconductor substrate in contact with the island-shaped electrode, characterized in that the impurity concentration in the central part of the first conductive layer is set lower than the impurity concentration in the outer peripheral part. Gate turn-off thyristor.