JP2630080B2 - Gate turn-off thyristor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gate turn-off thyristor (hereinafter referred to as "GTO"), and more particularly to a GTO in which the injection amount of holes on the anode side is suitable for interrupting a large current at high speed.

[0002]

2. Description of the Related Art In general, a GTO uses a pnpn structure or a pnnip structure similar to a normal thyristor.
A gate electrode is formed so as to surround the plurality of strip-shaped n emitters. As a structure on the anode side, an anode short-circuit structure in which a diffusion layer having the same conductivity type as the n base and a high impurity concentration is formed so as to electrically connect the electrode of the p emitter and the n base is known. As the anode short-circuiting structure, there are a strip-shaped GTO formed in a stripe shape on a part of a projected portion of the n-emitter, and a ring-shaped GTO formed in a ring shape similar to a plurality of concentrically arranged n-emitters. For example, Japanese Patent Application Laid-Open No.
The technique described in Japanese Patent No. 186563 is known. In this prior art, the anode short-circuit structure is formed in a concentric pattern. In this prior art, a ring-shaped anode short-circuit layer is disposed so as to pass through the center of an anode-side projection of an elongated strip-shaped n-emitter region.

A large-capacity GTO in which a plurality of n-emitter regions are arranged radially and in a plurality of rings in the prior art.
When applied to, a unit composed of each n emitter region
The switching operation of the GTO element becomes uneven. The reason for this was that there was an effect of balancing within the ring, but the holes injected into the n base at the time of turn-off are swept out through the gate by forming the p emitter across the different rings, This is because the residual carriers are strongly influenced by the dimensions of the gate layer, particularly the width of the gate electrode, and the remaining carriers cannot be uniformly swept out. In other words, in order to reduce the on-state voltage during conduction, the width of the gate electrode which can be regarded as a ring shape must be widened.
This will increase the hole concentration in the base. For this reason, at the time of turn-off, there has been a problem that the imbalance of the voltage drop due to the gate resistance in each ring in the plane becomes too large, and a predetermined anode current cannot be cut off. That is, in order to increase the concentration of ineffective holes in the n-base in the outer peripheral portion of the ring, the voltage drop due to the gate resistance particularly in the outer peripheral portion was large, and current concentration was liable to occur, and the current interruption resistance was low.

[0004]

In the above prior art, no consideration is given to the amount of holes remaining in the n-base at the time of turn-off, and there is a problem that the turn-off performance is reduced due to the voltage drop of the gate layer. An object of the present invention is to provide a GTO that solves the problems of the conventional structure.

[0005]

In order to achieve the above object, holes are injected into at least a projected portion where each ring of a plurality of n emitters is projected.
When the emitter is provided in a ring shape and the gate electrode for taking out the width of this ring is provided at the center of the pellet, the width is gradually reduced from the center of the pellet toward the periphery to suppress the injection amount of holes. , Large current can be cut off at high speed.

Further, in order to suppress the amount of injected holes, p
An intermediate layer having the same conductivity type as the n base layer and a high impurity concentration is provided between the emitter layer and the n base layer.

[0007]

The above means can reduce the amount of holes injected during conduction as the periphery of the pellet becomes smaller. Therefore, even if there is a voltage drop due to the gate resistance at the time of turn-off, the voltage drop in the outer ring can be reduced. The current does not concentrate at the outer peripheral portion, and a large current can be cut off at high speed.

In order to further suppress the amount of injected holes, an intermediate layer having the same conductivity type and a high impurity concentration as the n base layer is provided between the p emitter layer and the n base layer, so that the extraction gate electrode and The voltage drop due to the gate resistance between the rings can be made equal for each ring, and a higher current can be cut off at a higher speed.

[0009]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a plane pattern viewed from the cathode side of a GTO according to the present invention, and shows 1/4 of a circular GTO. A plurality of elongated n-emitter layers 2 are formed on a circular semiconductor substrate 1.
Are radially arranged in a triple ring, and a gate electrode (not shown) is provided on the p base layer 3 exposed around the triple ring. In the embodiment of the present invention, the case where the n emitter layer 2 has a triple ring is shown, but the effect of the present invention can be achieved even if the number of rings is increased by the current capacity. FIG. 2 is a sectional view taken along the line AA 'of FIG. The semiconductor substrate 1 includes an anode electrode 10, a cathode electrode 20, a gate electrode 30, an n emitter layer 2, a p base layer 3, a p-type high impurity concentration layer 5, a high resistance n base layer 4,
It comprises the emitter layers 71, 72, 73 and the anode short-circuit layer 8. As shown in FIGS. 1 and 2, the p emitter layers 71, 7
The widths d1, d2, d3 of 2,73 are made narrower as the distance from the gate electrode 30 at the center of the pellet increases. That is, d1
Is the widest and d3 is the narrowest. Although not shown, an insulating film such as a silicon dioxide film, a phosphor silicate film, or a silicon nitride film or a passivation film made of a resin such as silicone rubber is provided on the surface where silicon is exposed.

Next, the operation of the present invention will be described. When an anode voltage in which the anode electrode is positive and the cathode electrode is negative is applied, and a positive trigger current is applied to the gate electrode, the GTO is turned on. At this time, a unit G consisting of an arbitrary p emitter, n base, p base, and n emitter
In the n-base of TO, conductivity modulation occurs due to electrons injected from the n-emitter and holes injected from the p-emitter, and the resistance of the n-base is greatly reduced as compared with the case of the thermal equilibrium state. In this ON state, the carrier concentration of electrons and holes in the n-base is substantially equal according to the law of neutrality. In this state, when a reverse bias gate voltage is applied such that the gate electrode 30 is negative and the cathode electrode 20 is positive, excess carriers existing near the junction between the p base layer and the n base layer are swept out by this gate voltage. As a result, the junction between the p-base layer and the n-base layer becomes a depletion layer and shifts to a turn-off state. In order to make a quick transition to the turn-off state, n
It is preferable to keep the excess carrier concentration in the base as low as possible. This is because holes, which are excess carriers in the n-base, try to flow first through the p-base layer, which has a lower potential, due to the gate voltage, but a voltage drop occurs due to the resistance at the p-base and the gate electrode, This is because a reverse bias is less likely to be applied between the emitter and the p base. If the reverse bias is hard to be applied, it becomes difficult to suppress the injection of electrons from the n emitter, and it is difficult to turn off, and as a result, the turn-off time becomes long. Therefore, if you try to shorten the turn-off time,
In the steady ON state, the amount of holes injected from the p emitter should be as small as possible, but if it is too small, the ON voltage becomes too high. In order to lower the on-state voltage, it is necessary to increase the amount of holes injected from the p-emitter in the steady on-state as much as possible, but this increases the turn-off time. The relationship between the trade-off between turn-off and turn-on in the unit GTO described above is not always applicable when a plurality of unit GTOs are formed in one pellet. In other words, if the gate extraction electrode 30 is located at the center of the pellet, the turn-off time of the unit GTO existing in the ring near the center and the ring in the periphery is necessarily different. In other words, the closer the ring is to the center, the smaller the voltage drop due to the resistance at the p base and the gate electrode, and the larger the ring to the periphery, the greater the voltage drop. In order to eliminate such non-uniformity in operation, it is preferable that the gate resistance at the time of turn-off of the ring in the vicinity of the center and the ring in the peripheral portion be equalized. As shown in FIGS. 1 and 2, the p-emitter layers 71, 72,
The width d1, d2, d3 of 73 is narrower as it goes away from the gate electrode 30 at the center of the pellet. That is, d1 is the widest and d3 is the narrowest. By doing so, the concentration of holes in the n base in the steady on state can be increased in the center ring and reduced in the outer ring. Therefore, even if the gate resistance is large, the absolute value of the current due to the holes that are swept out is small, so that the voltage drop due to the resistance at the p base and the gate electrode during turn-off is suppressed. Can be. Also, since the gate resistance in the center ring is originally small, the voltage drop due to the resistance at the p base and the gate electrode during turn-off is suppressed to an arbitrary value or less even if the absolute value of the current caused by the holes to be swept is large. be able to. As described above, in a GTO having a plurality of rings, uniform operation is possible by sequentially reducing the width of the p-emitter layer from the side closer to the gate electrode at the center of the pellet, and a large current can be cut off at high speed.

FIG. 3 is a schematic sectional view showing a different embodiment of the GTO of the present invention, which is characterized in that an intermediate layer 6 having a higher impurity concentration than the n base layer is interposed in contact with the n base layer 4 on the anode side. is there. 3 that are the same as those shown in FIG. 2 represent the same parts, and thus description thereof is omitted. With the intermediate layer 6 interposed, the thickness of the n-base can be reduced as compared with a GTO having a pnpn structure having the same withstand voltage, so that it is effective in reducing the loss and increasing the speed in the ON state of the high withstand voltage GTO. . The reason why the high speed can be achieved is that the presence of the intermediate layer 6 allows p
By suppressing the injection efficiency of holes injected from the emitter and narrowing the width of the p-emitter layer sequentially from the side closer to the gate electrode at the center of the pellet, the voltage drop at the gate resistance during operation is reduced with respect to the entire ring of the pellet. Since the operation can be made uniform, a more uniform operation can be performed, and a large current can be cut off at high speed.

In the above, for ease of understanding the description of the operation of the present invention, the case where there is a gate electrode for extraction at the center of the pellet has been described. It is not limited to when there is
Needless to say, the present invention can be applied to a case where there is a gate electrode for extraction at the outer peripheral portion. In this case, for the central ring, make the width of the p emitter the narrowest,
The outer peripheral ring may be sequentially widened.

[0013]

As described in detail above, according to the present invention, even if a large area pellet is used to cut off a large current,
The operation can be made uniform, and a large current flowing through the GTO can be cut off at high speed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a plane pattern viewed from a cathode side according to the present invention.

FIG. 2 is a cross-sectional view taken along the line AA ′ shown in FIG. 1 according to the present invention;

FIG. 3 is a diagram showing an example in which the present invention is applied to a pnipn structure.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor base, 2 ... n emitter layer, 3 ... p base layer,
4 n base layer, 5 p-type high impurity concentration layer, 6 intermediate layer, 71, 72, 73 p emitter layer, 8 anode short layer, 10 anode electrode, 20 cathode electrode, 30
... Gate electrodes at electrode lead-out locations, 31 gate electrodes.

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Hideo Honma 4026 Kuji-cho, Hitachi City, Ibaraki Prefecture Hitachi, Ltd. Hitachi Research Laboratory (56) References JP-A-63-15464 (JP, A) JP-A-2-2 263470 (JP, A)

Claims (2)

(57) [Claims] 1. A semiconductor device comprising : a semiconductor substrate;
Arranged in a plurality of concentric rings with respect to the heart and each ring
The longitudinal direction is the radial direction of the circular semiconductor
Multiple elongated strips of equal length arranged radially
n emitter layer, p base layer, n base layer, n emitter
One continuous at each projection of the ring-shaped array of layers
A plurality of p-emitter layers formed in a ring shape, and
Anode short-circuit layer formed between adjacent p-emitter layers
When, in gate turn-off thyristor comprising a diameter of the circular semiconductor substrate ring of said plurality of p-emitter layer
The width in the direction is p closest to the takeout gate electrode.
In the ring of the emitter layer, the length is equal to the length of the n emitter layer.
And the ring of the p emitter layer is
A gate characterized in that it is gradually narrowed as it goes away
Turn-off thyristor. 2. The gate turn-off according to claim 1, further comprising an intermediate layer having the same conductivity type and a high impurity concentration as the n base layer between the p emitter layer and the n base layer of the circular semiconductor substrate. Thyristor.