JPH0326924B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplifier, and more particularly to an amplifier whose gain is controlled by an automatic gain control signal.

First, the distortion rate and noise in an amplifier circuit will be explained using FIGS. 1 to 4. Note that FIGS. 3 and 4 are diagrams for explaining the operating points of the circuits shown in FIGS. 1 and 2, respectively.

In Figures 1 and 2, R ₁ , R ₂ , R ₃ and
R ₄ is a resistor, Q ₁ and Q ₂ are transistors, R _L is a load, a is a signal input terminal, b is a signal output terminal,
C ₁ and C ₂ are bypass capacitors, I is a constant current source, A is the amplifier from the next stage onwards, and V _CC1 is the voltage
Indicates the power supply of V _CC1 .

In the circuit shown in Figure 1, the emitter of transistor _Q1 is grounded through resistor _R4 , so the base voltage versus collector current of transistor _Q1 is shown as shown in Figure 3A, and its slope is 1/ _R4 . approximately equal to. Also, since the base bias voltage V _{B (Q1)} of the transistor Q ₁ is the power supply voltage V _CC1 divided by the resistors R ₁ and R ₂ , V _{B (Q1)} = V _CC × R ₂ /R ₁ + R ₂ ( 1) is given by. If the input signal is a sine wave, the above bias voltage is applied to the center and it is expressed as A in FIG. 3, and the collector current of transistor _Q1 in response to that input signal is as shown in C in FIG.
The waveform shown by the dotted line in FIG. 3A shows the waveform when the input signal increases, and the waveform shown by the dotted line in C is the collector current at that time. Further, the gain A ₁ of the first amplifier is given by the following equation (2): A ₁ ≈R _L /26/Ie (Qi) + R ₄ (2). Here, I _{e (Q1)} is the bias current of transistor Q ₁ and the unit is mA. The characteristic of the amplifier shown in FIG. 1 is that by providing a current feedback resistor _R4 , the nonlinearity of the diode between the base and emitter of the transistor can be improved, and as a result, the distortion factor can be improved. Also, the base potential of transistor _Q1
If V _{B (Q1)} is chosen to be sufficiently large, it can be avoided from falling into the non-linear region of the threshold of the diode mentioned above. However, the provision of the resistor R ₄ has the disadvantage that the gain decreases as can be seen from _equation (2). The influence of the noise generated at the output terminal b becomes large, worsening the S/N ratio (signal-to-noise ratio) at the output terminal b, resulting in an amplifier with an extremely poor S/N ratio.

Figure 2 shows transistor Q ₂ to improve the S/N ratio.
A bias capacitor _C2 is provided at the emitter of the transistor _Q2 .
Therefore, the base voltage versus output current waveform of transistor _Q2 exhibits a curve as shown in FIG. 4D, which approximates the emitter-base diode curve. FIG. 4A shows the base input signal waveform of transistor _Q2 , and shows the same sine wave signal as FIG. 3A. Also, Fig. 4(o) shows the collector current waveform.

The gain _A 2 in FIG. 2 is given by the following equation (3).

A ₂ =R _L /26/I _e(Q2) (3) where I _e(Q2) is the bias current of transistor Q ₂ , and the unit is mA. Transistor in Figure 2
In the amplifier configured by Q ₂ , if Ie in equation (3) is chosen large, the gain A ₂ can be set several tens of times higher than in the circuit shown in Figure 1. It has the advantage that the influence of noise of A is small and the S/N ratio is good. However, from the viewpoint of distortion, as shown by the dotted line in Figure 4, when the input signal becomes a little large, the distortion of the collector current increases due to the nonlinearity between the base and emitter. I can't do anything.

By the way, in radio receivers, etc., it is desirable to have a good S/N ratio when the input signal is small, and when the input signal is large, the signal level is high and the S/N ratio is low.
Since the ratio is sufficiently large, there is a need for an amplifier that can transmit the signal waveform without distortion.

SUMMARY OF THE INVENTION An object of the present invention is to provide an amplifier that has a good S/N ratio when a small signal is input and a good distortion rate when a large signal is input.

Another object of the present invention is to provide an amplifier with further improved low noise and low distortion characteristics by expanding the gain control function.

The present invention provides a first amplifier circuit with a good distortion factor whose input end is connected to a signal input terminal, a first terminal connected to the output end of the first amplifier circuit, and a signal output terminal connected to the first amplifier circuit. a current supply circuit having a second terminal and in which a current flowing between the first and second terminals is controlled in response to a gain control signal; and a current supply circuit having an input terminal connected to the signal input terminal; a second amplifier circuit with low noise, the output terminal of which is connected to the first terminal or the second terminal; and a second amplifier circuit that controls the operating current of the second amplifier circuit in response to the gain control signal. The invention is characterized by comprising means for controlling gain.

In this way, the present invention connects a first amplifier circuit with a good distortion factor and a second amplifier circuit with low noise so that their input terminals are common, and controls the second amplification circuit by a gain control signal. By controlling the gain of the circuit, an output with a good S/N ratio is obtained when a small signal is input, and an output with an excellent distortion rate is obtained when a large signal is input.
Furthermore, a current supply circuit whose current supply capability is controlled in response to the gain control signal is provided between at least the output terminal of the first amplifier circuit and the signal output terminal to expand the gain control range and further reduce noise and distortion. The rate characteristics have been improved.

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 5 shows an embodiment of the invention, which includes resistors R ₁ to R ₁₇ , transistors Q ₁ to Q ₉ , capacitors C ₁ and C ₂ , load R _L , power supply V _CC , another amplifier A, It is composed of a rectifier circuit (automatic gain control signal generation circuit) B.

Next, its operation will be explained. When the input signal is small and the S/N ratio is important, the output signal appearing at terminal b is also small, and as a result, the rectified output at terminal C produced by rectifying means B is small. Therefore, transistor _Q4 is in an inactive state. In other words,
It is considered to be a parallel amplification composed of transistor Q ₁ and transistor Q ₂ , and its amplification degree A ₀ is (2)
From equation (3), it becomes as follows.

A ₀ = A ₁ + A ₂ ≒ R _L /26/Ie (Q ₁ ) + R ₄ + R _L /26/Ie (Q ₂ )
...(4) Since it is expressed as the sum of the amplification degree of the circuit in Fig. 1 and the amplification degree of the circuit in Fig. 2, the amplification degree is sufficiently higher than that in Fig. 1 and is generated in the subsequent stage amplifier A. The influence of noise is small and the S/N ratio can be increased. When the input signal increases, the rectified output of the rectifying means B increases, the voltage at the terminal C increases, and the transistor _Q4 operates, lowering the base potential of the transistor _Q3 and reducing the current flowing through the transistor _Q2 . Therefore, the denominator of the second term A ₂ in equation (4) increases and the gain A ₀ decreases. In other words, a gain control circuit is constituted by the rectifying means B and transistors Q ₂ , Q ₃ and Q ₄ , and by the function of this gain control circuit, as the input signal increases, the amplification degree of transistor Q ₂ is reduced, and the transistor Q At an input signal level where the distortion of transistor _Q2 increases, the gain of transistor _Q2 is significantly reduced and the gain of transistor _Q1 becomes dominant. As a result, the influence of distortion caused by transistor Q ₂ on the output signal can be reduced. At an even larger input signal, transistor Q ₂ is turned off and no longer transmits the signal, and the output is no longer distorted by transistor Q ₂ .

In this way, it has a characteristic that the S/N ratio is large at weak input and there is little distortion for large input signal levels, but since the next stage amplifier A further amplifies the signal, distortion is more likely to occur. Even greater gain control was required for the first-stage amplifier, and to meet this requirement, transistor
In addition to the gain control circuit composed of Q ₂ , Q ₃ , and Q ₄ , a gain control circuit composed of transistors Q ₁₁ , Q ₈ , and Q ₉ is further provided. In other words, when the input signal level is sufficiently low and the rectified output voltage of terminal C is small,
That is, when gain control transistor Q ₄ and transistor Q ₁₁ are in the off state, transistor
Q ₈ and Q ₁₀ are in the off state, and transistors Q ₉ and Q ₃ are in the active state. That is, the base potential of transistor Q ₉ is higher than the base potential of transistor Q ₈ by the potential drop of diode D ₁ , and the base potential of transistor Q ₃
This is because the base potentials of R15 _{and R15} are set higher than the base potential of transistor _Q10 . Therefore, transistor Q ₁ and transistor Q ₂ operate as a parallel amplifier and transistor
_Q9 is connected in cascade to transmit signal current to load R _L. When the input signal increases and the rectified output of terminal C increases and transistor Q ₄ and transistor Q ₁₁ become operational, they lower the base potentials of transistors Q ₃ and Q ₉ , respectively. As the input signal increases, the base potential of transistor _Q3 gradually becomes the base potential of transistor _Q10 ,
The base potential of transistor Q ₉ is the same as that of transistor Q ₈
The currents of transistor Q ₃ and transistor Q ₉ decrease as they approach the base potential of , respectively. As a result, the gain of transistor _Q2 decreases. A decrease in the current of transistor Q ₉ results in a decrease in the transmission signal of transistor Q ₁ and transistor Q ₂ to load R _L , resulting in a decrease in the overall gain. Further, due to the increase in the input signal, the base potential of transistor Q ₃ becomes lower than that of transistor Q ₁₀ , and the base potential of transistor Q ₉ becomes lower than that of transistor Q ₈ , so that the current in transistors Q ₃ and Q ₉ becomes extremely small.

At this time, the value of _R15 is set so that the voltage drop across resistor _R15 is smaller than the voltage drop across diode _D1 , so the current in transistor _Q3 is reduced faster than that in transistor _Q9 . I can do things. Furthermore, since the values of resistors R ₆ , R ₇ , R ₁₂ , and R ₁₃ are selected so that they have the following relationship, R ₆ /R ₇ > R ₁₂ /R ₁₃ ...(5) The effect is significant, and ( 5) By choosing the value on the right side of equation to be sufficiently larger than the value on the left side, transistor Q ₃ can be reduced before the current in transistor Q ₉ decreases.
can cut off the current. Therefore, it is possible to realize a first stage amplification having a gain control circuit with extremely small distortion even when the input signal level fluctuates widely. Note that diodes D ₃ and D ₄ are transistor Q ₄
This is to prevent saturation.

Also, in semiconductor integrated circuits, transistors
It is clear that Q ₁ and transistor Q ₂ can be of multi-emitter structure with the same collector and the same base and the operation will be exactly the same in this case as well.

As described above, according to the circuit configuration according to the present invention, it is possible to perform large gain control without impairing the S/N ratio even at a small input signal level, and the amplifier has extremely low distortion even at a large input signal.
An amplifier with further improved low noise and low distortion is provided.

[Brief explanation of drawings]

Figures 1 and 2 are circuit diagrams for explaining the distortion rate and noise characteristics of the amplifier, and Figures 3 and 4 are circuit diagrams for explaining the distortion rate and noise characteristics of the amplifier.
The figures are diagrams for explaining the operations of the circuits shown in FIGS. 1 and 2, respectively, and FIG. 5 is a circuit diagram showing one embodiment of the present invention. R ₁ , R ₂ ,..., R ₁₇ are resistors, D ₁ ,..., D ₄ are diodes, Q ₁ , Q ₂ ,..., Q ₁₁ are transistors, C ₁ ,
C ₂ is a bypass capacitor, ZD is a Zener diode, V _CC1 is a power supply, I is a constant current source, a, b and c
is the terminal, R _L is the load, A is the amplifier from the next stage onwards, B
is a rectifier.

Claims (1)

[Claims] 1. A first amplifier circuit with a good distortion rate whose input terminal is connected to the signal input terminal, a transistor connected between the output terminal of the first amplifier circuit and the signal output terminal, and a transistor connected to the signal input terminal. a second amplifier circuit with less noise, the input end of which is connected and the output end of which is connected to the output end of the first amplifier circuit; and the operation of the transistor and the second amplifier circuit in response to a gain control signal. and a gain control circuit that controls the current in such a manner that the operating current of the second amplifier circuit is reduced faster than the operating current of the transistor.