EP0156411B1 - Darlington transistor arrangement - Google Patents
Darlington transistor arrangement Download PDFInfo
- Publication number
- EP0156411B1 EP0156411B1 EP85200245A EP85200245A EP0156411B1 EP 0156411 B1 EP0156411 B1 EP 0156411B1 EP 85200245 A EP85200245 A EP 85200245A EP 85200245 A EP85200245 A EP 85200245A EP 0156411 B1 EP0156411 B1 EP 0156411B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- transistor
- current
- emitter
- base
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000000295 complement effect Effects 0.000 claims description 2
- 230000007423 decrease Effects 0.000 description 3
- 238000010276 construction Methods 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/30—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
- H03F3/3066—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor the collectors of complementary power transistors being connected to the output
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/34—DC amplifiers in which all stages are DC-coupled
- H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
- H03F3/3432—DC amplifiers in which all stages are DC-coupled with semiconductor devices only with bipolar transistors
- H03F3/3435—DC amplifiers in which all stages are DC-coupled with semiconductor devices only with bipolar transistors using Darlington amplifiers
Definitions
- the invention relates to a Darlington transistor arrangement comprising an input transistor having a collector, a base and an emitter and an output transistor having a collector, a base and an emitter, the emitter of the input transistor driving the base of the output transistor, the collector of the input transistor being connected to the input of a current amplifier circuit which amplifies the collector current of the input transistor and supplies it to an output which is connected to the base of the output transistor, the current amplifier circuit being a current mirror circuit comprising an input-current path which is connected to the collector of the input transistor and which comprises the series arrangement of the collector-emitter path of a first transistor which has a low impedance connection between its collector and base, and a first resistor, and an output current path which is connected to the base of the output transistor and which comprises the collector-emitter path of a second transistor, whose base-emitter junction is arranged in parallel with the base-emitter junction of the first transistor.
- Darlington arrangements are known for example from Tietze, Schenk, Halbleiter- scenstechnik, 1978, pages 56-58 and may be employed for example as power transistors in audio amplifiers.
- the current gain factor of such a Darlington arrangement is equal to the product of the current gain factors of the input transistor and the output transistor.
- the arrangement is generally preceded by an additional transistor whose emitter current is equal to the base current of the input transistor.
- this additional transistor has the disadvantage that a supply voltage which is equal to at least three base-emitter voltages is required for a satisfactory operation of the arrangement. Therefore, the arrangement is not suitable for use with very low supply voltages.
- a Darlington arrangement has the problem that the current-gain factor of the output transistor decreases in the case of large currents. This gives rise to a highly non-linear relationship between the output current of the output transistor and the base current of the input transistor, causing distortion of the output signal.
- a Darlington transistor arrangement as defined in the opening paragraph is known from GB-A-2 095 941A, Fig. 9, but this arrangement does not solve the problem of the decreasing current gain factor of the output transistor in case of large currents.
- a Darlington transistor arrangement whose input transistor requires comparatively small base currents for large output currents, which is suitable for use at comparatively low supply voltages, and in which the relationship between the output current and the base current is substantially linear.
- a Darlington transistor arrangement of the type specified in the opening paragraph is characterized in that a second resistor is arranged in series with the collector-emitter path of the second transistor and in that the ratio between the resistance values of the first and the second resistor is larger than the ratio between the emitter areas of the second and the first transistor.
- the base current of the output transistor and hence the overall current gain factor of the arrangement is increased.
- the base current required for the input transistor is therefore smaller.
- the current gain factor of the current amplifier circuit is two, only one third of the original base current is required in order to obtain a specific output current.
- the arrangement requires only two base-emitter voltages, it is also suitable for use with comparatively lower supply voltages.
- the use of a current mirror circuit as a current amplifier circuit results in a simple construction of the arrangements.
- the use of current mirror circuits as current amplifier circuits is known per se, for example from Valvo Berichte, Band x1x, Heft 3, pages 107 to 114.
- the relationship between the output current and the base current of the input transistor is linearised by selecting the ratio between the resistance values of the first and the second resistor to be larger than the ratio between the emitter areas of the second and the first transistor.
- the current gain factor is determined mainly by the ratio between the emitter areas of the second and the first transistor, and for large currents the current gain factor is determined by the ratio between the resistance values of the first and the second resistor, yielding a small gain factor for small currents and a large current gain factor for large currents.
- a suitable and simple construction of such a current mirror is obtained if, in accordance with a further characteristic feature, the collector of the first transistor is connected to its base.
- Fig. 1 shows a Darlington transistor arrangement with a current amplifier circuit to explain the arrangement in accordance with the invention, which amplifier circuit has a current gain factor which is independent of the magnitude of the output current.
- the emitter of an NPN input transistor T is connected to the base of an NPN output transistor T 2 , whose emitter in the present example is connected to the negative power-supply terminal 2, in the present case to earth.
- a load to which the output current of the Darlington arrangement can be delivered may be connected to the collector of the output transistor T 2 .
- the collector of the input transistor T is connected to the input of a current mirror circuit comprising a PNP transistor T 3 arranged as a diode and having its emitter connected to the positive power-supply terminal 3 and an PNP transistor T 4 whose base-emitter junction is connected in parallel with that of the transistor T 3 .
- the emitter area of transistor T 4 is twice as large as that of transistor T 3 . Since transistors T 3 and T 4 have the same base-emitter voltages the collector current of transistor T 4 will be twice as large as the collector current of T 3 and consequently as the collector current of input transistor T 1 .
- the collector current of transistor T 4 together with the emitter current of transistor T 1 is applied to the base of the output transistor T 2 .
- the overall current-gain factor of the arrangement is three times as large as the current gain factor of the conventional Darlington arrangement.
- the load presented to the drive source then also remains small.
- a drawback of the Darlington transistor arrangement shown in Fig. 1 is that the decrease of the current gain factor of the output transistor in the case of large output currents given rise to a non-linear relationship between the output current and the base current of the input transistor.
- Fig. 2 shows a Darlington transistor arrangement forming a first embodiment of the invention which does not have this drawback. Identical parts bear the same reference numerals as in Fig. 1.
- a resistor R 2 500 ⁇ is arranged in the emitter circuit of transistor T 2 .
- the current gain of the current mirror circuit is then substantially equal to the ratio between the emitter areas of the transistors T 4 and T 3 , i.e.
- the current gain is substantially equal to the ratio between the resistors R 1 and R 2 owing to the small difference in the base-emitter voltages of the transistors T 3 and T 4 , and in the present example it is equal to 12.4.
- the overall current gain factor of the arrangement consequently increases as the input currents increase.
- the decrease in the current gain factor of the output transistor for large currents is partly compensated for, so that a more linear relationship between the input and the output current is obtained. This reduces distortion of the output signal.
- Fig. 3 shows a Darlington transistor arrangement forming a second embodiment of the invention, in which the input transistor T s and the output transistor T 6 are PNP transistors instead of NPN transistors and in which the emitter of output transistor T 6 is connected to the positive instead of to the negative power-supply terminal.
- the arrangement operates as in the same way as that shown in Fig. 2, the current gain factor of the current mirror circuit in the present example being 4 for small currents and being 25 for large currents.
- Fig. 4 shows schematically a push-pull amplifier provided with a Darlington arrangement in accordance with the invention. Corresponding parts bear the same reference numerals as in Figs. 2 and 3.
- the push-pull amplifier comprises an input stage 10 having outputs 11 and 12 which drive the complementary output transistors T 6 and T 2 of the output stage. These transistors T 6 and T 2 have their emitters connected to the positive and to the negative power supply terminals, 3 and 2 respectively.
- the collectors are connected to the output 13 of the amplifier, to which a load R L is connected.
- the output transistor T 2 forms a Darlington arrangement with transistor T 2 , as is shown in Fig. 2.
- a current source 15 is connected to the emitter of transistor T 1 to improve the linearity and high-frequency behaviour of the Darlington transistor.
- the output transistor T 6 forms a Darlington arrangement with the transistor T s .
- the base of transistor T 5 is driven by an emitter-follower transistor Tg.
- the base of transistor T 6 can be driven to the value of the positive supply voltage minus one base-emitter voltage.
- the emitter oftransistorTg is connected to a current source 14 for the same reason as in the case of transistor T,.
- the scope of the invention is not limited to the embodiments shown.
- the resistors R 2 and R 4 may be dispensed with and in the embodiments shown in Figs. 1, and 3 a current source may be arranged in the emitter circuit of the input circuit.
- a current source may be arranged in the emitter circuit of the input circuit.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Description
- The invention relates to a Darlington transistor arrangement comprising an input transistor having a collector, a base and an emitter and an output transistor having a collector, a base and an emitter, the emitter of the input transistor driving the base of the output transistor, the collector of the input transistor being connected to the input of a current amplifier circuit which amplifies the collector current of the input transistor and supplies it to an output which is connected to the base of the output transistor, the current amplifier circuit being a current mirror circuit comprising an input-current path which is connected to the collector of the input transistor and which comprises the series arrangement of the collector-emitter path of a first transistor which has a low impedance connection between its collector and base, and a first resistor, and an output current path which is connected to the base of the output transistor and which comprises the collector-emitter path of a second transistor, whose base-emitter junction is arranged in parallel with the base-emitter junction of the first transistor.
- Darlington arrangements are known for example from Tietze, Schenk, Halbleiter- schaltungstechnik, 1978, pages 56-58 and may be employed for example as power transistors in audio amplifiers.
- Since the emitter current of the input transistor is equal to the base current of the output transistor when signal current is considered, the current gain factor of such a Darlington arrangement is equal to the product of the current gain factors of the input transistor and the output transistor. When the arrangement is used as a power transistor, in which case the output transistor must be capable of delivering large currents, the base current of the input transistor should not become too large in view of the load presented to the driver stage. Therefore, in order to preclude overloading of the driver stage, the arrangement is generally preceded by an additional transistor whose emitter current is equal to the base current of the input transistor. However, this additional transistor has the disadvantage that a supply voltage which is equal to at least three base-emitter voltages is required for a satisfactory operation of the arrangement. Therefore, the arrangement is not suitable for use with very low supply voltages.
- Further, a Darlington arrangement has the problem that the current-gain factor of the output transistor decreases in the case of large currents. This gives rise to a highly non-linear relationship between the output current of the output transistor and the base current of the input transistor, causing distortion of the output signal.
- A Darlington transistor arrangement as defined in the opening paragraph is known from GB-A-2 095 941A, Fig. 9, but this arrangement does not solve the problem of the decreasing current gain factor of the output transistor in case of large currents.
- It is the object of the present invention to provide a Darlington transistor arrangement whose input transistor requires comparatively small base currents for large output currents, which is suitable for use at comparatively low supply voltages, and in which the relationship between the output current and the base current is substantially linear. According to the invention a Darlington transistor arrangement of the type specified in the opening paragraph is characterized in that a second resistor is arranged in series with the collector-emitter path of the second transistor and in that the ratio between the resistance values of the first and the second resistor is larger than the ratio between the emitter areas of the second and the first transistor.
- By amplifying the collector current of the input transistor by means of the current amplifier circuit and applying it to the base of the output transistor, the base current of the output transistor and hence the overall current gain factor of the arrangement is increased. To obtain a specific output current the base current required for the input transistor is therefore smaller. For example, if the current gain factor of the current amplifier circuit is two, only one third of the original base current is required in order to obtain a specific output current. As the arrangement requires only two base-emitter voltages, it is also suitable for use with comparatively lower supply voltages. The use of a current mirror circuit as a current amplifier circuit results in a simple construction of the arrangements. The use of current mirror circuits as current amplifier circuits is known per se, for example from Valvo Berichte, Band x1x,
Heft 3, pages 107 to 114. - The relationship between the output current and the base current of the input transistor is linearised by selecting the ratio between the resistance values of the first and the second resistor to be larger than the ratio between the emitter areas of the second and the first transistor. For small currents the current gain factor is determined mainly by the ratio between the emitter areas of the second and the first transistor, and for large currents the current gain factor is determined by the ratio between the resistance values of the first and the second resistor, yielding a small gain factor for small currents and a large current gain factor for large currents.
- A suitable and simple construction of such a current mirror is obtained if, in accordance with a further characteristic feature, the collector of the first transistor is connected to its base.
- The invention will now be described in more detail, by way of example, with reference to the accompanying drawing, in which:
- Fig. 1 shows a Darlington transistor arrangement provided with a current amplifier circuit having a constant current gain factor,
- Fig. 2 shows a Darlington transistor arrangement forming a first embodiment of the invention,
- Fig. 3 shows a Darlington transistor arrangement forming a second embodiment of the invention, and
- Fig. 4 shows schematically a push-pull amplifier provided with a Darlington transistor arrangement in accordance with the invention.
- Fig. 1 shows a Darlington transistor arrangement with a current amplifier circuit to explain the arrangement in accordance with the invention, which amplifier circuit has a current gain factor which is independent of the magnitude of the output current. In this Figure the emitter of an NPN input transistor T, is connected to the base of an NPN output transistor T2, whose emitter in the present example is connected to the negative power-
supply terminal 2, in the present case to earth. A load to which the output current of the Darlington arrangement can be delivered may be connected to the collector of the output transistor T2. The collector of the input transistor T, is connected to the input of a current mirror circuit comprising a PNP transistor T3 arranged as a diode and having its emitter connected to the positive power-supply terminal 3 and an PNP transistor T4 whose base-emitter junction is connected in parallel with that of the transistor T3. In the present example the emitter area of transistor T4 is twice as large as that of transistor T3. Since transistors T3 and T4 have the same base-emitter voltages the collector current of transistor T4 will be twice as large as the collector current of T3 and consequently as the collector current of input transistor T1. The collector current of transistor T4 together with the emitter current of transistor T1 is applied to the base of the output transistor T2. If it is assumed that the collector current of transistor T, is substantially equal to the emitter current, the overall current gain factor of the arrangement will be equal to (β1 + 2β1) P2 = 3β1 β2, where β1 and β2 are the respective current gain factors of the transistors T, and T2. As a result of the presence of the current-mirror circuit the overall current-gain factor of the arrangement is three times as large as the current gain factor of the conventional Darlington arrangement. Thus, in order to obtain a specific output current only one third of the base current required originally is necessary. For large output currents the load presented to the drive source then also remains small. - As an alternative to the current mirror circuit shown it is possible to employ other current mirror circuits, such as those described in the aforementioned article in Valvo Berichte.
- A drawback of the Darlington transistor arrangement shown in Fig. 1 is that the decrease of the current gain factor of the output transistor in the case of large output currents given rise to a non-linear relationship between the output current and the base current of the input transistor.
- Fig. 2 shows a Darlington transistor arrangement forming a first embodiment of the invention which does not have this drawback. Identical parts bear the same reference numerals as in Fig. 1. A resistor R1, whose resistance value in the present example is equal to R, = 6.2 kΩ, is arranged in the emitter circuit of transistor T3. Similarly, a resistor R2 = 500Ω is arranged in the emitter circuit of transistor T2. For small collector currents the voltages across the resistors R1 and R2 are low relative to the base-emitter voltages of transistors T3 and T4. The current gain of the current mirror circuit is then substantially equal to the ratio between the emitter areas of the transistors T4 and T3, i.e. in the present example it is equal to two. For large currents the current gain is substantially equal to the ratio between the resistors R1 and R2 owing to the small difference in the base-emitter voltages of the transistors T3 and T4, and in the present example it is equal to 12.4. The overall current gain factor of the arrangement consequently increases as the input currents increase. As a result of this, the decrease in the current gain factor of the output transistor for large currents is partly compensated for, so that a more linear relationship between the input and the output current is obtained. This reduces distortion of the output signal.
- Fig. 3 shows a Darlington transistor arrangement forming a second embodiment of the invention, in which the input transistor Ts and the output transistor T6 are PNP transistors instead of NPN transistors and in which the emitter of output transistor T6 is connected to the positive instead of to the negative power-supply terminal. The collector of transistor T5 is again connected to the input of a current mirror comprising an NPN transistor T7 arranged as a diode and having a resistor R3 = 500Q arranged in its emitter circuit and an NPN transistor T8 having an emitter area which is 4x as large as that of transistor T7 and having a resistor R4 = 200 arranged in its emitter circuit.
- Further, the arrangement operates as in the same way as that shown in Fig. 2, the current gain factor of the current mirror circuit in the present example being 4 for small currents and being 25 for large currents.
- Fig. 4 shows schematically a push-pull amplifier provided with a Darlington arrangement in accordance with the invention. Corresponding parts bear the same reference numerals as in Figs. 2 and 3. The push-pull amplifier comprises an
input stage 10 havingoutputs output 13 of the amplifier, to which a load RL is connected. The output transistor T2 forms a Darlington arrangement with transistor T2, as is shown in Fig. 2. Acurrent source 15 is connected to the emitter of transistor T1 to improve the linearity and high-frequency behaviour of the Darlington transistor. In the same way as shown in Fig. 3 the output transistor T6 forms a Darlington arrangement with the transistor Ts. The base of transistor T5 is driven by an emitter-follower transistor Tg. Thus, the base of transistor T6 can be driven to the value of the positive supply voltage minus one base-emitter voltage. The emitter oftransistorTg is connected to acurrent source 14 for the same reason as in the case of transistor T,. - The scope of the invention is not limited to the embodiments shown. For example, in the embodiment shown in Figs. 2 and 3 the resistors R2 and R4 may be dispensed with and in the embodiments shown in Figs. 1, and 3 a current source may be arranged in the emitter circuit of the input circuit. Within the scope of the present invention it is also possible to employ any other current mirror circuit instead of the current mirror circuit shown.
Claims (5)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8400635 | 1984-02-29 | ||
NL8400635A NL8400635A (en) | 1984-02-29 | 1984-02-29 | DARLINGTON TRANSISTOR SWITCH. |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0156411A1 EP0156411A1 (en) | 1985-10-02 |
EP0156411B1 true EP0156411B1 (en) | 1990-01-31 |
Family
ID=19843564
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP85200245A Expired - Lifetime EP0156411B1 (en) | 1984-02-29 | 1985-02-25 | Darlington transistor arrangement |
Country Status (9)
Country | Link |
---|---|
US (1) | US4633100A (en) |
EP (1) | EP0156411B1 (en) |
JP (1) | JPH0618300B2 (en) |
KR (1) | KR930007294B1 (en) |
CA (1) | CA1223927A (en) |
DE (1) | DE3575826D1 (en) |
HK (1) | HK86591A (en) |
NL (1) | NL8400635A (en) |
SG (1) | SG86190G (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2587562B1 (en) * | 1985-09-17 | 1987-11-20 | Thomson Csf | DEVICE FOR CONTROLLING AN OUTPUT CIRCUIT OF AN INTEGRATED CIRCUIT |
JPS62262505A (en) * | 1986-05-09 | 1987-11-14 | Hitachi Ltd | Electric circuit |
US4730124A (en) * | 1987-02-11 | 1988-03-08 | Tektronix, Inc. | High transconductance composite PNP transistor |
FR2651623A1 (en) * | 1989-09-01 | 1991-03-08 | Radiotechnique Compelec | INTEGRATED CIRCUIT HAVING SATURATION CONDITION DETECTION. |
IT1244208B (en) * | 1990-12-20 | 1994-07-08 | Sgs Thomson Microelectronics | INTRINSIC OFFSET RECOVERY CIRCUIT ESPECIALLY FOR AMPLIFIERS |
US5134310A (en) * | 1991-01-23 | 1992-07-28 | Ramtron Corporation | Current supply circuit for driving high capacitance load in an integrated circuit |
DE4111999A1 (en) * | 1991-04-12 | 1992-10-15 | Hartmut Koellner | CONVERTER CONTROL |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5514568B2 (en) * | 1973-12-07 | 1980-04-17 | ||
US3979606A (en) * | 1975-09-05 | 1976-09-07 | Rca Corporation | Current level detector |
US4228404A (en) * | 1979-02-05 | 1980-10-14 | National Semiconductor Corporation | Low voltage compound inverter buffer circuit |
US4334198A (en) * | 1980-04-24 | 1982-06-08 | Rca Corporation | Biasing of transistor amplifier cascades |
US4371792A (en) * | 1980-07-24 | 1983-02-01 | National Semiconductor Corporation | High gain composite transistor |
JPS5746513A (en) * | 1980-09-05 | 1982-03-17 | Toshiba Corp | Darlington complementary output circuit |
JPS5783912A (en) * | 1980-11-12 | 1982-05-26 | Toshiba Corp | Current amplifying circuit |
JPS57162505A (en) * | 1981-03-31 | 1982-10-06 | Toshiba Corp | Transistor circuit |
US4542399A (en) * | 1983-02-22 | 1985-09-17 | National Semiconductor Corporation | Feed forward Darlington circuit |
-
1984
- 1984-02-29 NL NL8400635A patent/NL8400635A/en not_active Application Discontinuation
-
1985
- 1985-02-25 DE DE8585200245T patent/DE3575826D1/en not_active Expired - Lifetime
- 1985-02-25 CA CA000475080A patent/CA1223927A/en not_active Expired
- 1985-02-25 EP EP85200245A patent/EP0156411B1/en not_active Expired - Lifetime
- 1985-02-26 JP JP60035414A patent/JPH0618300B2/en not_active Expired - Lifetime
- 1985-02-27 KR KR1019850001244A patent/KR930007294B1/en not_active IP Right Cessation
- 1985-02-27 US US06/706,066 patent/US4633100A/en not_active Expired - Fee Related
-
1990
- 1990-10-24 SG SG861/90A patent/SG86190G/en unknown
-
1991
- 1991-10-31 HK HK865/91A patent/HK86591A/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0156411A1 (en) | 1985-10-02 |
US4633100A (en) | 1986-12-30 |
CA1223927A (en) | 1987-07-07 |
SG86190G (en) | 1991-01-04 |
JPS60218911A (en) | 1985-11-01 |
JPH0618300B2 (en) | 1994-03-09 |
HK86591A (en) | 1991-11-08 |
KR850006989A (en) | 1985-10-25 |
DE3575826D1 (en) | 1990-03-08 |
NL8400635A (en) | 1985-09-16 |
KR930007294B1 (en) | 1993-08-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2001522566A (en) | Variable gain amplifier with improved linearity and bandwidth | |
EP0004099B1 (en) | Electrically variable impedance circuit | |
US4249136A (en) | PWM Signal power amplifier | |
JPS648923B2 (en) | ||
US5859568A (en) | Temperature compensated amplifier | |
EP0156411B1 (en) | Darlington transistor arrangement | |
US4723111A (en) | Amplifier arrangement | |
US3914704A (en) | Feedback amplifier | |
US4135162A (en) | Power amplifier circuits | |
JP2578096B2 (en) | Switching device | |
US4922208A (en) | Output stage for an operational amplifier | |
US5382919A (en) | Wideband constant impedance amplifiers | |
JP2877315B2 (en) | An integrable class AB output stage for low frequency amplifiers | |
US4068187A (en) | Audio-frequency power amplifiers | |
EP0156410B1 (en) | Amplifier arrangement | |
US4706039A (en) | Amplifier arrangement | |
US4538116A (en) | Output stage for an operational amplifier | |
EP0406964B1 (en) | Amplifier arrangement | |
US4167708A (en) | Transistor amplifier | |
US4345214A (en) | Variable emitter degeneration gain-controlled amplifier | |
EP0116982B1 (en) | Amplifier arrangement | |
US5376900A (en) | Push-pull output stage for amplifier in integrated circuit form | |
US4123723A (en) | Transistor amplifier circuit | |
US4831337A (en) | Wideband amplifier | |
JP3427482B2 (en) | Operational amplifier |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Designated state(s): CH DE FR GB IT LI |
|
17P | Request for examination filed |
Effective date: 19860327 |
|
17Q | First examination report despatched |
Effective date: 19880812 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): CH DE FR GB IT LI |
|
REF | Corresponds to: |
Ref document number: 3575826 Country of ref document: DE Date of ref document: 19900308 |
|
ITF | It: translation for a ep patent filed |
Owner name: ING. C. GREGORJ S.P.A. |
|
ET | Fr: translation filed | ||
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed | ||
ITTA | It: last paid annual fee | ||
ITPR | It: changes in ownership of a european patent |
Owner name: CAMBIO RAGIONE SOCIALE;PHILIPS ELECTRONICS N.V. |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: PFA Free format text: PHILIPS ELECTRONICS N.V. |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: CD |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 19970203 Year of fee payment: 13 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 19970218 Year of fee payment: 13 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 19970422 Year of fee payment: 13 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: CH Payment date: 19970520 Year of fee payment: 13 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 19980225 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LI Free format text: LAPSE BECAUSE OF THE APPLICANT RENOUNCES Effective date: 19980228 Ref country code: FR Free format text: THE PATENT HAS BEEN ANNULLED BY A DECISION OF A NATIONAL AUTHORITY Effective date: 19980228 Ref country code: CH Free format text: LAPSE BECAUSE OF THE APPLICANT RENOUNCES Effective date: 19980228 |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: PL |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 19980225 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 19981103 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST |