JPH0325974A - Solid state image sensor - Google Patents

Solid state image sensor

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Publication number
JPH0325974A
JPH0325974A JP1161427A JP16142789A JPH0325974A JP H0325974 A JPH0325974 A JP H0325974A JP 1161427 A JP1161427 A JP 1161427A JP 16142789 A JP16142789 A JP 16142789A JP H0325974 A JPH0325974 A JP H0325974A
Authority
JP
Japan
Prior art keywords
charge
charge transfer
region
converter
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1161427A
Other languages
Japanese (ja)
Other versions
JP2555888B2 (en
Inventor
Keiji Toriyama
鳥山 景示
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
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Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1161427A priority Critical patent/JP2555888B2/en
Publication of JPH0325974A publication Critical patent/JPH0325974A/en
Application granted granted Critical
Publication of JP2555888B2 publication Critical patent/JP2555888B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To eliminate remaining charge and to prevent generation of an after image by providing a shallowest region of a first conductivity type well of a solid state image sensor having a vertical overflow drain structure shiftingly from the center of a photoelectric converter to a charge transfer unit side to be provided. CONSTITUTION:A P-type well 2 is formed on a N-type semiconductor substrate 1, and a N-type region 3 for forming a photoelectric converter and a N-type region 4 for forming charge transfer means are formed therein. The shallowest part of the well is formed not at the center of the converter but a part near the charge transfer means. Since the part of highest depleting potential of the converter is disposed near the charge transfer unit, the potential of the converter of the region near the charge transfer unit is pulled by a fringe electric field of a reading pulse when a pulse voltage for reading a signal charge is applied to a polysilicon electrode. Thus, all the signal charge can be read to the charge transfer unit, and no remaining charge is generated in the converter.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は固体撮像素子に関し、特に縦型オーバーフロー
ドレイン構造を有丁る固体撮像素子の残像を防止丁る構
造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a solid-state image sensor, and more particularly to a structure for preventing afterimages in a solid-state image sensor having a vertical overflow drain structure.

〔従来の技術〕[Conventional technology]

固体撮像素子では光電変換素子に蓄積できる信号電荷量
に限度が有ることから、照度の高い允のスポットが入射
した時に,光電変換によシ生じた信号電荷が光電変換素
子からあふれ出して隣接した光電変換素子や電荷転送部
に流れ込み、画像崩れを生じるプルーミング現象が有る
。縦型オーバーフロードレイン構造はこのブルーミング
現象を防止するためのものであシ%允1I!変換素子の
過剰な信号電荷を半導体基板に抜き取る. 第5図18lは従来の縦型オーバーフロードレイン構造
t−有する固体撮像素子のセル部の縦断面図である。
In solid-state imaging devices, there is a limit to the amount of signal charge that can be stored in the photoelectric conversion element, so when a bright spot with high illuminance is incident, the signal charge generated by photoelectric conversion overflows from the photoelectric conversion element and causes damage to the adjacent photoelectric conversion element. There is a pluming phenomenon that flows into the photoelectric conversion element and the charge transfer section, causing image distortion. The vertical overflow drain structure is designed to prevent this blooming phenomenon. The excess signal charge of the conversion element is extracted to the semiconductor substrate. FIG. 5 18l is a vertical cross-sectional view of a cell portion of a solid-state imaging device having a conventional vertical overflow drain structure.

N型半導体基板1上にP型ウェル2が形或されこの中に
光電変換素子のN型領域3と電荷転送手段のN型領域4
が形成されている。各セル間はチャネルストップ領域5
によって分離される。また絶縁膜6金介して電荷の読み
出しおよび転送を行なうためのパルス電圧を印加するポ
リシリコン電極7が形成されて釦シ、充電変換素子領域
以外のセル部に党が入射するのを防ぐためにR允膜8が
設けられている。
A P-type well 2 is formed on an N-type semiconductor substrate 1, in which an N-type region 3 of a photoelectric conversion element and an N-type region 4 of a charge transfer means are formed.
is formed. Channel stop area 5 between each cell
separated by In addition, a polysilicon electrode 7 for applying a pulse voltage for reading and transferring charges through the insulating film 6 is formed on the button. A membrane 8 is provided.

P型ウェル2とN型半導体基板1の間に逆バイアス電圧
を印加し、光電変換素子をなすN型領域3とN型半導体
基板1をバンチスルー状態にすることによって過剰電荷
をN型半導体基板1に抜き取る。この様なブルーミンク
防止状態となるよう半導体基板に逆バイアス電圧を印加
した時に釦いても、電荷転送を正常に行なえるよう電荷
転送手段のN型領域は電荷転送手段の動作範囲内にトい
て半導体基板と電気的に分離されている必要がある。こ
のため第5図(alに示す様にP型ウエルは充電変換素
子の直下で電荷転送手段が形成されている領域よシも浅
い部分が生じる様に形成される。
By applying a reverse bias voltage between the P-type well 2 and the N-type semiconductor substrate 1 and bringing the N-type region 3 forming the photoelectric conversion element and the N-type semiconductor substrate 1 into a bunch-through state, excess charges are transferred to the N-type semiconductor substrate. Remove it to 1. To prevent such blooming, even if the button is pressed when a reverse bias voltage is applied to the semiconductor substrate, the N-type region of the charge transfer means is within the operating range of the charge transfer means so that charge transfer can be performed normally. It must be electrically isolated from the semiconductor substrate. For this reason, as shown in FIG. 5 (al), the P-type well is formed so that there is a shallow portion directly below the charge conversion element in the area where the charge transfer means is formed.

従来P型ウェルは光電変換累子の中央部で最も浅く形成
されてる。第5図(blは第5図(alの従来例の信号
電荷の無い空乏化状態のチャネル電位を示したものであ
るが、光電変換素子の電位はP型ウエルの浅くなクてい
る中央部で高くなっている。
Conventionally, the P-type well is formed at its shallowest depth at the center of the photoelectric conversion crystal. Figure 5 (bl shows the channel potential in a depleted state with no signal charge in the conventional example in Figure 5 (al); It is getting high.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の縦型オーバーフロードレイン構造を有す
る固体撮像素子では光電変換素子から電荷転送手段に信
号電荷を読み出す際に九if換素子の中央部の空乏化電
位が高いためにこの部分の信号電荷が読み出せずに残ク
残像現象を生じるという問題点がある。第6図は従来の
縦型オーバーフロードレイン構造を有する固体撮像累子
にかける信号電荷読み出しの際のチャネル電位と信号電
荷の動きを示したものである。
In the above-mentioned conventional solid-state image sensor having the vertical overflow drain structure, when signal charges are read out from the photoelectric conversion element to the charge transfer means, the depletion potential in the central part of the 9IF conversion element is high, so that the signal charges in this part are There is a problem in that the image cannot be read out and a residual image phenomenon occurs. FIG. 6 shows the movement of channel potential and signal charges when reading out signal charges applied to a solid-state imaging element having a conventional vertical overflow drain structure.

第6図(alに示した光電変換によシ発生し蓄積された
信号電荷9Vi読み出し電極に読み出しパルス電圧を印
加することによって第6図(blに示す様にそのほとん
どは電荷転送部に読み出される。しかし一都の電荷は読
み出されず空乏化電位の高い充電変換部の中央に残留電
荷10として取シ残される。入射光量が一定の場合はこ
の残留電荷の量は定常状態となシ一定となるが、入射党
量すなわち蓄積される信号電荷lが変化した時に残留電
荷の量が変化するため残像現象を生じる。
By applying a read pulse voltage to the signal charge 9Vi readout electrode generated and accumulated by the photoelectric conversion shown in Fig. 6 (al), most of the signal charge is read out to the charge transfer section as shown in Fig. 6 (bl). However, the charge at Ichito is not read out and remains as a residual charge 10 in the center of the charge conversion section where the depletion potential is high.If the amount of incident light is constant, the amount of this residual charge is in a steady state and remains constant. However, when the amount of incident light, that is, the accumulated signal charge l changes, the amount of residual charge changes, resulting in an afterimage phenomenon.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の固体撮像索子は、電荷転送直下に比較して光電
変換S直下で浅くなった第1導t型ウエルの形成された
第2導電型半導体基板を備えた縦型オーバーフロードレ
イン構造を有する固体撮像素子において、前記第1導電
型ウェルの最も浅い領域を前記−Xt変換部の中心から
前記電荷転送部側にずらして設けた電荷読み出しの残留
電荷防止手段を有しているというものである。
The solid-state imaging probe of the present invention has a vertical overflow drain structure including a second conductive type semiconductor substrate in which a first conductive T-type well is formed which is shallower directly below the photoelectric conversion S than directly below the charge transfer. The solid-state imaging device has residual charge prevention means for charge readout, which is provided by shifting the shallowest region of the first conductivity type well from the center of the -Xt conversion section toward the charge transfer section. .

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する.第1図
(alぱ本発明の第1の実施例の固体撮像素子のセル部
の縦断面図である。
Next, the present invention will be explained with reference to the drawings. FIG. 1 is a vertical sectional view of a cell portion of a solid-state image sensing device according to a first embodiment of the present invention.

N型半導体基板1上にP型ウェル2が形成され、この中
に+t変換素子金な丁N型領域3と電荷転送手段をなす
N型領域4が形或されている.各セル間はチャネルスト
ップ領域5によって分離される。1た絶縁11!6を介
して電荷読み出し釦よび転送を行うためのパルス電圧を
印710するポリシリコン電極7が形成されてレ9、充
電変換素子領域以外のセル部に九が入射するのを防ぐた
めにR允農8が設けられている。
A P-type well 2 is formed on an N-type semiconductor substrate 1, and an N-type region 3 serving as a +t conversion element and an N-type region 4 serving as a charge transfer means are formed in this well. Each cell is separated by a channel stop region 5. A polysilicon electrode 7 is formed to apply a pulse voltage 710 for charge readout and transfer through an insulator 11!6, and a polysilicon electrode 7 is formed to prevent the charge from entering the cell area other than the charge conversion element region. In order to prevent this, Runno 8 is provided.

P型ウェルはN型半導体基板に逆バイアス電圧金印加し
光電変換素子をなすN型領域とN型半導体基板をパンチ
スルー状態としてブルーミング現象を防止する場合にも
,電荷転送手段をなすN型領域が素子の動作範囲内でN
型半導体基板と電気的に分離される様に充電変換素子の
厘下で電荷転送手段が形成されている領域よクも浅い部
分が生じる様に形或するが、従来例と異なうP型ウェル
の最も浅い部分は充電変換素子の中央ではなく電荷転送
手段寄シの部分に形成する。
The P-type well is also used when applying a reverse bias voltage gold to the N-type semiconductor substrate to punch-through the N-type region forming the photoelectric conversion element and the N-type semiconductor substrate to prevent the blooming phenomenon. is within the operating range of the element
The P-type well is shaped so that it has a shallower area than the area where the charge transfer means is formed under the charge conversion element so as to be electrically isolated from the P-type semiconductor substrate. The shallowest part is formed not at the center of the charge conversion element but near the charge transfer means.

第1図(bJは第1図(alの第1の実施例の信号電荷
の無い空乏化状態のチャネル電位を示したものである。
FIG. 1 (bJ shows the channel potential in a depleted state with no signal charge in the first embodiment of FIG. 1 (al).

光tf′!!I8素子の電位はP型ウェルの浅くなって
いる電荷転送手段に近い領域で高い部分が生じる。
Light tf'! ! A high potential of the I8 element occurs in a shallow region of the P-type well near the charge transfer means.

第2図は本実施例にかける信号電荷読み出しの際のチャ
ネル電位と信号電荷の動@を示したものである。
FIG. 2 shows the channel potential and the movement of signal charges when reading signal charges according to this embodiment.

第2図1a)に示した光電変換によク発生し蓄積された
信号電荷9は読み出し電極に読み出しパルス電圧を印加
することによって第2図(b+に示す様に電荷転送部に
読み出される。本発明では第2図の電位に示す様に充電
変換部の空乏化電位の最も高い部分が電荷転送部に近い
ため信号電荷読み出しのためのパルス電圧をポリシリコ
ン電極に印加した時に読み出しパルス電圧のフリンジ電
界で電荷転送部に近い領域の九電K換部の電位が引っ張
られることによって、信号電荷はすべて電荷転送部に読
み出すことができ、光電変換部に残留電荷は生じない。
The signal charge 9 generated and accumulated by the photoelectric conversion shown in FIG. 2 (a) is read out to the charge transfer section as shown in FIG. 2 (b+) by applying a read pulse voltage to the read electrode. In the invention, as shown in the potential in Figure 2, the highest depletion potential of the charge conversion section is close to the charge transfer section, so when a pulse voltage for reading out signal charges is applied to the polysilicon electrode, a fringe of the readout pulse voltage occurs. By pulling the electric potential of the nine-electron K converter in the area close to the charge transfer section by the electric field, all signal charges can be read out to the charge transfer section, and no residual charge is generated in the photoelectric conversion section.

従来、残像の発生の原因となっていた残留電荷を無くす
ることによシ残像現象の発生を防止することが可能とな
る。
By eliminating the residual charge that conventionally caused the occurrence of afterimages, it is possible to prevent the occurrence of afterimages.

第3図は本実施例の固体撮像素子の製造方法の一例をセ
ル部の縦断面図で簡単に示したものである。
FIG. 3 briefly shows an example of the method for manufacturing the solid-state image sensing device of this embodiment using a vertical cross-sectional view of a cell portion.

第3図(alに示す様にN型半導体基板1上にレジスト
パターン12をマスクとしてイオン注入を行ない選択的
にP型不純物を導入(13) Lた後、熱処理によシ不
純物を拡散し第3図(blに示す様に選択的に接合深さ
の異なるP型ウェル2を形或する。
As shown in FIG. 3 (al), ions are implanted onto the N-type semiconductor substrate 1 using the resist pattern 12 as a mask to selectively introduce P-type impurities (13). As shown in FIG. 3 (bl), P-type wells 2 with different junction depths are selectively formed.

絶縁膜6を形成し7c後絶縁膜6のパターンと自己整合
に光電変換素子をなすN型領域3および電荷転送手段を
なすh型軸域41I:それぞれ形或する。
After the insulating film 6 is formed 7c, an N-type region 3 forming a photoelectric conversion element and an H-type axial region 41I forming a charge transfer means are formed in self-alignment with the pattern of the insulating film 6.

ここで絶縁換6のパターンは、P型ウエルを形或丁るイ
オン注入時のレジストパターン12の中心が党!変換素
子をなすN型領域3の中心から電荷転送手段のN型領域
4に近くなる方向にずれる様に形成する。
Here, the pattern of the insulation exchanger 6 is such that the center of the resist pattern 12 at the time of ion implantation that forms the P-type well is located at the center of the resist pattern 12! It is formed so as to be shifted from the center of the N-type region 3 forming the conversion element in a direction closer to the N-type region 4 of the charge transfer means.

その後第1図(a)に示す様にポリシリコン電極7、遮
允換8を形成して固体撮像索子金光或する。選択酸化の
パターンとP型ウエルのノ;ターンのずらし童はたとえ
ば光電変換素子のN型領域の幅が5μmとすれば2μm
程度にすると最も効果が太きい。
Thereafter, as shown in FIG. 1(a), a polysilicon electrode 7 and a switch 8 are formed to form a solid-state imaging element. For example, if the width of the N-type region of a photoelectric conversion element is 5 μm, the width of the selective oxidation pattern and the P-type well is 2 μm.
The effect is most pronounced when the amount is reduced.

第4図(a)は本発明の第2の実施例の固体撮像素子の
セル部のklvfr面図である。
FIG. 4(a) is a klvfr plane view of a cell portion of a solid-state image sensing device according to a second embodiment of the present invention.

本実施例は光電変換素子として埋込フオトダイオードを
使用したものであシ、N型半導体基板l上にP型ウェル
2が形成されこの中に光電変換素子のN型領域3と電荷
転送手段のN型領域4が形底されている。各セル間はチ
ャネルストップ領域5によって分離されこのチャネルス
トップ領域に接続して光電変換素子表面の1′l71 
11が形成されている.また絶縁膜6を介して,ポリシ
リコン電極7、R允農8が形成されている。本実施例に
診いてもP型ウェルの最も浅い部分が光電変換素子の中
心でなく、電荷転送手段寄シに形成することによる残像
現象の防止効果は第1の実施例と同様である。
In this embodiment, a buried photodiode is used as a photoelectric conversion element, and a P-type well 2 is formed on an N-type semiconductor substrate 1. The N-type region 4 is rounded. Each cell is separated by a channel stop region 5, and connected to the channel stop region 1'l71 on the surface of the photoelectric conversion element.
11 is formed. Further, a polysilicon electrode 7 and an R-shaped electrode 8 are formed with an insulating film 6 interposed therebetween. In this embodiment, the effect of preventing image retention by forming the shallowest part of the P-type well not at the center of the photoelectric conversion element but near the charge transfer means is the same as in the first embodiment.

これまで述べた例では単にN型半導体基板としてきたが
、基板として半導体基板上にN型のエビタキシャル/I
を成長したものを使用しても効果は同じである。
In the examples described so far, we have simply used an N-type semiconductor substrate, but an N-type epitaxial/I
The effect is the same even if you use a grown one.

〔発明の効果〕 以上説明したように、本発明の縦型オー/くーフロード
レイン構造を有する固体撮像素子は電荷転送S直下に比
較して九t変換部直下で浅くなった1g1導電型ウェル
の形成された第2導電型半導体基板を備え、第1導電型
ウェルの最も浅い領域を充電変換部の中心から電荷転送
m側にずらすことによシ、光電変換部の空乏化電位の最
も高い領域が電荷転送部寄シに形成され、信号電荷読み
出しに際し読み出しパルス電圧のフリンジ電界によシ電
位が引っ張られることによって、この光電変換部の空乏
化電位の最も高い領域に取り残される残留電荷を無くし
、残像現象の発生を防止できる効果がある。
[Effects of the Invention] As explained above, the solid-state imaging device having the vertical O/C-flow drain structure of the present invention can form a 1g1 conductivity type well that is shallower directly below the 9T conversion section than directly below the charge transfer S. By shifting the shallowest region of the first conductivity type well from the center of the charge conversion section toward the charge transfer m side, the region of the photoelectric conversion section with the highest depletion potential can be The electric potential formed near the charge transfer section is pulled by the fringe electric field of the readout pulse voltage when reading signal charges, thereby eliminating the residual charge left behind in the region of the photoelectric conversion section with the highest depletion potential, and causing an afterimage. It has the effect of preventing the phenomenon from occurring.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(aJは本発明の第1の実施例の固体撮像素第1
の実施例にわける信号電荷読み出しの際のチャネル電位
と信号電荷の動きを示すチャネル電位図、第3図は第1
の実施例の固体撮像素子の製造方法の一例を説明するた
めの縦断面図、第4図ta+は本発明の第2の実施例の
尚体撮像素子の縦断面図、第4図(bJは第4図(al
の固体撮像素子の空乏化時のチャネル電位図、第5図(
aJは従来の固体撮像素子の縦断面図、第5図(b)は
第5図ja)の固体撮像素子の空乏化時のチャネル電位
図、第6図は第5図の従来例にかける信号電荷の読み出
しの際のチャネル電位と信号電荷の動きを示すチャネル
電位図である。 1・・・N型半導体基板、2・・・P型ウェル、3・・
・光電変換素子のN型領域、4・・・電荷転送手段のN
型領域、5・・・チャネルストップ領域、6・・・絶縁
a,7・・・ポリシリコン電極、8・・・連党膜、9・
・・信号電荷、10・・・残留電荷、11・・・光電変
換素子表面のr層,l2・・・レジストパターン、13
・・・P型不純物。
FIG. 1 (aJ is the first solid-state image sensor of the first embodiment of the present invention.
FIG. 3 is a channel potential diagram showing the channel potential and movement of signal charges during signal charge readout in the embodiment.
FIG. 4 (ta+) is a vertical cross-sectional view for explaining an example of the manufacturing method of the solid-state image sensor according to the second embodiment of the present invention, and FIG. 4 (bJ is Figure 4 (al
Channel potential diagram during depletion of the solid-state imaging device, Figure 5 (
aJ is a vertical cross-sectional view of a conventional solid-state image sensor, FIG. 5(b) is a channel potential diagram during depletion of the solid-state image sensor shown in FIG. 5ja), and FIG. 6 is a signal applied to the conventional example shown in FIG. FIG. 7 is a channel potential diagram showing the movement of channel potential and signal charges when reading out charges. 1... N-type semiconductor substrate, 2... P-type well, 3...
・N-type region of photoelectric conversion element, 4...N of charge transfer means
Mold region, 5... Channel stop region, 6... Insulation a, 7... Polysilicon electrode, 8... Continuation film, 9...
...Signal charge, 10...Residual charge, 11...R layer on the surface of the photoelectric conversion element, l2...Resist pattern, 13
...P-type impurity.

Claims (1)

【特許請求の範囲】[Claims] 電荷転送部直下に比較して光電変換部直下で浅くなった
第1導電型ウェルの形成された第2導電型半導体基板を
備えた縦型オーバーフロードレイン構造を有する固体撮
像素子において、前記第1導電型ウェルの最も浅い領域
を前記光電変換部の中心から前記電荷転送部側にずらし
て設けた電荷読み出しの残留電荷防止手段を有している
ことを特徴とする固体撮像素子。
In a solid-state imaging device having a vertical overflow drain structure including a second conductivity type semiconductor substrate in which a first conductivity type well is formed which is shallower directly below the photoelectric conversion unit than directly below the charge transfer unit, the first conductivity 1. A solid-state image pickup device, comprising residual charge prevention means for reading charge, which is provided by shifting the shallowest region of the mold well from the center of the photoelectric conversion section toward the charge transfer section.
JP1161427A 1989-06-23 1989-06-23 Method of manufacturing solid-state image sensor Expired - Lifetime JP2555888B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1161427A JP2555888B2 (en) 1989-06-23 1989-06-23 Method of manufacturing solid-state image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1161427A JP2555888B2 (en) 1989-06-23 1989-06-23 Method of manufacturing solid-state image sensor

Publications (2)

Publication Number Publication Date
JPH0325974A true JPH0325974A (en) 1991-02-04
JP2555888B2 JP2555888B2 (en) 1996-11-20

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Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5442208A (en) * 1992-12-09 1995-08-15 U.S. Philips Corporation Charge-coupled device having charge reset

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022677A (en) * 1988-06-17 1990-01-08 Fujitsu Ltd Solid-state image sensing element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH022677A (en) * 1988-06-17 1990-01-08 Fujitsu Ltd Solid-state image sensing element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5442208A (en) * 1992-12-09 1995-08-15 U.S. Philips Corporation Charge-coupled device having charge reset

Also Published As

Publication number Publication date
JP2555888B2 (en) 1996-11-20

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