JPH03244039A - Fault information collecting system for information processor - Google Patents

Abstract

PURPOSE:To collect the fault information at a high speed and with high reliability by connecting a specific flip-flop to an exclusive scan bus together with an optional flip-flop which stores the contents of a storage means like a register file, etc. CONSTITUTION:A register file RF 1-1 is provided together with a read address register RA 1-2, an output data signal line 1-3, a read data register RD 1-4, a read data set instruction flip-flop S 1-5, a write suppression instruction flip-flop WI 1-6, an AND gate 1-7, a write enable signal line WE 1-8, etc. Then the contents of an optional word of a storage means like the RF 1-1, etc., are stored in an optional flip-flop in accordance with the value of a specific flip-flop. At the same time, the specific flip-flop and an optional flip-flop where the contents of the storage means like the RF 1-1, etc., are connected to an exclusive scan path different from the ordinary scan paths. In such a constitution, the fault information on an information processor can be collected at a high speed and with high reliability.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a failure information collection method for an information processing device, and more particularly to a failure information collection method for an information processing device in which a fault has occurred due to a diagnostic control device.

(Prior art) Conventionally, failure information collection methods for this type of information processing equipment include:
When a failure occurs, the diagnostic control device uses the existing scan canvas to download register files and RAM (Random Ac
There is a method in which the contents of a storage means such as a cess memory are stored in an arbitrary flip-flop on a scan canvas and then read out.

In addition, the information processing device in which the fault has occurred has a microprogram for fault handling, and the microprogram reads out the contents of storage means such as register files and RAM, and sends the diagnostic control device to a dedicated bus or main memory. There is a way to transfer the information via .

[Problem to be solved by the invention]

In the conventional fault information collection method for information processing equipment described above,
In the case of the existing method using a scan canvas, the length of the scan canvas increases with the recent increase in the scale of integrated circuits, and the processing time to read the contents of an arbitrary word of zero means written in a register file, RAM, etc. This has the disadvantage that it takes a long time to recover the information processing device when a failure occurs. In particular, when performing fault processing such as collecting fault information from the faulty information processing equipment from the diagnostic control device when a fault occurs and then retrying the process from the time the fault occurred, it takes a long time to retry. This poses a problem in that it may even affect other normally operating information processing devices.

Furthermore, in the case of a method using a microprogram for troubleshooting, the microprogram of the information processing device in which the trouble has occurred is operated, so there is a drawback that reliability is low.

In view of the above-mentioned points, an object of the present invention is to connect a specific flip-flop and any flip-flop in which the contents of storage means such as a register file or RAM to a special scan path different from a normal scan path. An object of the present invention is to provide a failure information collection method for an information processing apparatus that enables a diagnostic control device to perform failure information collection processing of the information processing apparatus at high speed and with high reliability when a failure occurs.

[Means to solve the problem]

The information collection method of the information processing device of the present invention includes a storage means and a scan canvas that connects a plurality of flip-flops, and when a failure occurs, the contents of the plurality of flip-flops connected to the scan canvas are read out from a diagnostic control device. In the information processing apparatus, a word I/content storage stage 1 for storing the contents of any word 1 of the above-mentioned one word means in an arbitrary word 1 in accordance with a value of the 1.5 constant word 1; a dedicated scan canvas different from the scan canvas that connects a specific flip-flop and the arbitrary flip-flop in which the contents of an arbitrary word of the storage means are stored; and a word content readout means for storing the content of an arbitrary word in the storage means in the arbitrary Norinob Flo-7 and then reading it out using the dedicated scan canvas.

[Effect]

In the failure information collection method of the information processing device of the present invention, the word content storage means stores the contents of any word of the storage means in any flip-flop according to the value of a specific flip-flop, and The scan canvas connects a specific flip-flop and an arbitrary flip-flop in which the contents of an arbitrary word of the storage means are stored, and the word content reading means is configured to read the word content storage means from the word content storage means when a fault occurs. After storing the contents of the word in an arbitrary flip-flop, it is read out using a dedicated scan canvas.

〔Example〕

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a circuit block diagram showing a main part of an information processing apparatus to which a fault information collection method according to an embodiment of the present invention is applied. This information processing device has a register file (RF)
1-1, read address register (RA) 1-2,
Output data signal line 13 and read data register (RD
) 1-4, a read data set instruction flip-flop (S) 1-5, and a write suppression instruction flip-flop (W).
l) 1-6, Antogame 1-1-7, and Lighty Fu-
Pull signal line (WE) 1-8, normal scan-in signal pin (NSI) 19, normal scan-out signal pin (NSO) 1-10, read-only scan-in signal pin (R3I) 111, read-only scan Out signal pins (R2O) 1-12 and select signal pins (R2O)
3M) 1-13, selectors 1-14 and 1-15, registers 1-16 and 1-19, and flip-flop
2, 1-17 and 1-18.

The register file 1-1 is composed of a plurality of words, and when a read address is input by the output of the read address register 1-2, it outputs the contents of the word corresponding to the read address to the output data signal line 1-3. . Also,
The register file 11 has a write enable signal line 1-
By setting 8 to logic "1", data is written to the word corresponding to the read at I/S output from the read address register 12.

The read data set instruction flip-flop 15 outputs data signal line 1-3-1 to the read data register 1-4 in response to a read data set instruction signal (RDS) when the value is logic 1. to be set.

The lie I/inhibition instruction flip-flop 1-6 sends its inverted output signal to the ant game 1 when the value is logic "1".
-1-7 and set the write enable signal lines 1-8 to logic "0" to force register file 1.
- Prevents data from being written to 1.

The normal scan-in signal input from the normal scan-in signal pins 1 to 9 is input to the flip-flop of the leftmost bit of the register 116, and its output is input to the right-hand adjacent flip-flop, which is connected sequentially. The output signal j is inputted to the rightmost flip-flop, and the output node j is inputted to the leftmost bit flip-flop of the read address register 1-2 via the selector 1-14. As shown below, read address register 1-2 ~ write I/inhibition flip-flop 1-6 ~ flip-flop knob 1 17
- Flip-flop 1-18 - Selector 1-15 - Read data set instruction Flip-flop 1-5 - Read address register l-4 - Register 1-19 is outputted to normal scan out signal bin 1-10, A scan canvas (hereinafter referred to as normal canvas) is formed.

As is well known, the normal scan-in signal pins 1-9 to normal scan-out signal pins 1-10 are invalid during normal operation.
In other words, even if a clock signal is applied to each flip-flop and register, the manual data on the normal canvas is not set, but it is activated in the diagnostic mode, and the human data on the normal canvas is set as each flip-flop and register is applied. Set in flip-flop 7 and register. Here, the diagnostic mote is a diagnostic control device (not shown)
shall be set as follows.

The select signal bin 1-13 is a pin that inputs the select signals of the selectors 1-14 and 1-15, and if the select signal is logic "0", the upper input data in the figure is selected. This is a condition for configuring a normal canvas, and is also applied to the ant gate 1-7 to set the write enable signal 1-8 to logic "0" and inhibit writing of data to the register file 1-1.

The read-only scan-in signal input from the read-only scan-in signal bin 1-11 is input from the read-only scan-in signal bin 1-11.
At this time, if the select signal bin 1-13 is logic 1'', the lower input data is selected in the selectors 114 and 1-15, so the read-only scan-in signal bingo]J ~ selector 1-14 ~ Read address register 1-2 ~ Write inhibit flip-flop 1-6 ~ Selector 1-15 ~ Read data set instruction flip-flop 1-5 ~ Read data register]-4
Read-only scan-out signal via pins 1-12
A scan canvas different from the normal canvas (
A read-only scan canvas (hereinafter referred to as a read-only scan canvas) is formed.

It should be noted that this read-only scan canvas is not activated unless it is in diagnostic mode, as a matter of course.

Referring to FIG. 2, the failure information collection process performed by the diagnostic control device when a failure occurs in the information processing device includes a diagnostic mode setting and normal canvas activation step 2-1, and a normal canvas data collection step 2-2. , read-only scan canvas activation step 2-3, register file 0 word content read step 2-4, diagnostic mode release and read data set step 2-5,
Diagnosis mode setting, read data collection and next word content read step 2-6, end determination step 2-7,
The process consists of a power up/down correction step 28 and a diagnostic mode cancellation step 2-9.

Next, the operation of the failure information collection method of the information processing apparatus of this embodiment configured as described above will be explained. In this case, it is assumed that the information processing device in which the fault has occurred (hereinafter referred to as the device to be diagnosed) notifies the diagnostic control device when the fault occurs, and also stops its own clock signal.
Also, the number of words in register file 1-1 is N (positive integer)
shall be.

When a fault occurs in the device to be diagnosed, the diagnostic control device sets the device to be diagnosed in the diagnostic mode and sets the normal canvas by inputting a logic “o” to the select signal pins 1-13 of the device to be diagnosed. Activate (Step 2-
1).

Next, the diagnostic control device inputs arbitrary data to the normal scan-in signal pin i9 of the device to be diagnosed, and supplies a clock signal as many times as the total number of flip-flow knobs forming the normal canvas. By doing so, the flip-flop connected to the normal scan out signal pin 1=10 is sequentially outputted to the normal scan out signal pin 1=10.
(Step 2-2)
.

Subsequently, the diagnostic control device activates the REIT-only scan canvas by inputting logic "1" to the select signal bin]-13 of the device to be diagnosed (step 2-3).

Next, in order to read the O-th word data of the register file 11, the diagnostic control device inputs the value of the register 1-2 to "01. .

(The subscript number 16 indicates that the previous number is a hexadecimal number. The same applies hereafter), write inhibit flip-flop 1-6
and read data set instruction signal/knob flop 1-
By inputting data that makes each value of read address register 1-5 logic "1" and supplying a clock signal as many times as the total number (number of hits) of flip-flops in the read address register 1-dedicated scan canvas. A logic value of 0.6° is applied to the write inhibit flip-flop 1-6 and a logic value of 1 is applied to the read data set instruction flip-flop 1-5 (step 2-4).

Next, the diagnostic control device cancels the diagnostic mode of the device to be diagnosed, and by supplying a clock signal once, the Oth word of the register file 1-1 is read according to the value 016'' of the read address register 1-2. data is output to the output data signal line 1-3, and since the value of the -1° data center instruction flip-flop 1-5 is logic "1", the read data set instruction signal causes the read data register 1-4 to be output. At this time, since the value of the write inhibit flip-flop 16 is logic "1", the write enable full signal 1-
8 is forced to logic “0” and register file 1-
Destruction of data due to writing to 1 is suppressed (step 2-5).

Next, the diagnostic control device sets the device to be diagnosed in the diagnostic mode again, and sends the scan-in signal bin 1 exclusively for the board of the device to be diagnosed in order to read the data of the next 1st word of the register file 1-1. -11, input the data that makes the values of read address register 1-2, °'II6 write inhibit flip-flop 1-6 and read data set instruction flip-flop 1-5 logic "■" respectively, and read By supplying the clock signal as many times as the total number of flip-flops (via 1/number) of the dedicated scan canvas, read address registers 1-2
``],'' is set to logic ``1'' in Jrll stop flinoff flonoff 1-6 and read data set instruction flip-flop 1-5, respectively.
By supplying the clock signal, read data register 1-
Scan-out signal pin 1-1 dedicated to reading the 0th word data of register file 1-1 sold in 4 to 8
2 and collect it (step 2-6).

By repeating the above steps 2-5 and 2-6 N times for the number of words in the register file 1-1 while increasing the number of inputs to the read address register 1-2 by +1, the register file Collect the contents of all words in 1-1 (Step 7, 2-7 and 2-1).
8).

When the collection of the contents of all sources 1 of the register file 1-1 is completed, the diagnostic control device releases the diagnostic mode of the device to be diagnosed and ends the failure information collection process (step 2-9).

In this embodiment, the failure information collection process for the register file 1-1 has been described, but it is possible to collect failure information from other storage means such as RAM by using similar means. Needless to say.

〔Effect of the invention〕

As explained above, the present invention provides a
It is possible to store the contents of an arbitrary word of a storage means such as M in an arbitrary flip-flop according to the value of a specific flip-flop, and also to store the contents of a specific flip-flop, a register file, a storage means such as a RAM, etc. By connecting any stored flip-flops to a dedicated scan canvas different from a normal scan canvas, the diagnostic control device can collect fault information from the information processing equipment at high speed and with high reliability when a fault occurs. This has the effect of reducing the recovery time of the processing equipment.

[Brief explanation of drawings]

FIG. 1 is a circuit block diagram showing the main parts of an information processing device to which a fault information collection method according to an embodiment of the present invention is applied, and FIG. 2 shows information in a diagnostic control device using the fault information collection method of this embodiment. 3 is a flowchart showing failure information collection processing when a failure occurs in a processing device. In H, ■-1...Register file (RF), 1-2...
- REIT address register (RA), 1-3 - Output data signal line, 1-4 - REIT data register (RD), 1-5 -
・・Leet data center 1 ~ instruction flip-flop (S)
, 1-6... Write inhibit flip-flop (W5 ■), 1-7... AND gate, 1-8... Write enable signal line (WE), 1-9
...Normal scan-in signal bin (NSI), 1-10...Normal scan-out signal bin (NSO)
), 1-11...Read-only scan-in signal bin (R3I
), 1-12... Read-only scan out signal pin (R3
O), 1-13...Select signal pin (R3M), 1-14.
1-15 selector, 1-16, 1-19 register, 117.1-], and 8 flip-flop. 6

Claims (1)

[Scope of Claims] An information processing device comprising a storage means and a scan canvas connecting a plurality of flip-flops, and reading out the contents of the plurality of flip-flops connected to the scan canvas from a diagnostic control device when a failure occurs, comprising: word content storage means for storing the contents of an arbitrary word of the storage means in an arbitrary flip-flop according to the value of a specific flip-flop; and the contents of the arbitrary word of the specific flip-flop and the storage means are stored. a dedicated scan canvas different from the scan canvas to which the arbitrary flip-flop is connected; and a diagnostic control device that stores the content of an arbitrary word of the storage means in the arbitrary flip-flop using the word content storage means when a failure occurs. a fault information collection method for an information processing apparatus, characterized in that the method further comprises word content reading means for reading the word content using the dedicated scan canvas after the data has been read out using the dedicated scan canvas.