JPH03242941A - Field effect semiconductor device - Google Patents

Abstract

PURPOSE:To improve the controllability of rear-side etching by a method wherein an operating layer is formed on the surface of a buffer layer, a source electrode and a drain electrode are provided on the surface of this operating layer while a recessed part is provided in the surface of the operating layer between the two electrodes, the rear side of the operating layer is so exposed as to correspond to the recessed part, and a gate electrode is provided on the surface thus exposed. CONSTITUTION:A buffer layer 2 of AlGaAs is formed on the surface of a semiconductor substrate 1 of semi-insulative GaAs, and an operating layer 3 of GaAs of high carrier density is formed on the surface of this buffer layer 2. The semiconductor substrate 1 is etched selectively from the rear side at a spot corresponding to a region between a source electrode 4 and a drain electrode 5 formed on the surface of the operating layer 3, and the bottom of a recessed part 9a thus formed is etched further. Then a recessed part 9b is dug in and the rear side of the operating layer 3 is exposed at the bottom of this part. A gate electrode 8 of Schottky contact is provided on this flat exposed face 7 and then a recessed part 6 is formed so as to adjust the thickness of the operating layer 3. According to this constitution, the controllability of a process of digging-in (etching) onto the rear side of the operating layer can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a field effect semiconductor device. Specifically, the present invention relates to a GgAs M with an inverted gate structure.
The present invention relates to field effect semiconductor devices such as ESFBTs.

[Background Art] What is shown in FIG. 3 is a conventional field effect transistor (F
ET) shows the structure of 20. Typically, in the FET 20, an active layer 22 is formed on the surface of a semiconductor substrate 21 by ion implantation or epitaxial growth, and a source electrode 23 and a drain electrode 24 are provided in open contact with the surface of the active layer 22.

A Schottky contact gate electrode 25 is provided between both electrodes on the same plane as the drain electrodes 23 and 24.

What is shown in FIG. 4 is a conventional inverted gate type transistor 30. As shown in FIG. In the inverted gate transistor 30, an active layer 32 is formed on the surface of a semiconductor substrate 31, and a source electrode 33 and a drain electrode Fi34 in open contact are provided on the surface of the active layer 32, and then a picture electrode 33 is formed. The semiconductor substrate 31 is partially etched to correspond to the area between . has been established.

- [Problem to be solved by the invention] In the FET shown in Fig. 3, a back gate effect occurs, and due to this back gate effect, FET characteristics such as low transfer conductance and high mutual conductance are affected. It was a problem. Furthermore, in the high frequency range, the electron transit time between the source and drain electrodes cannot be ignored, which hinders the high-speed operation of the FET.

On the other hand, in the case of an inverted gate transistor as shown in Fig. 4, the back gate effect can be eliminated, and since there is no gate electrode between the drain and source electrodes, the distance between the drain and source electrodes can be reduced. Shorten and make FET
□ enables high-speed operation. However, in such an FET with an inverted gate structure, the semiconductor substrate must be partially etched from the backside to expose the backside of the active layer flatly in order to form a gate electrode. Since the active layer and the active layer are made of the same material, it is difficult to control etching, and it is difficult to etch only the semiconductor substrate.Therefore, there are no reports of an inverted gate transistor being realized.

Furthermore, in a FET with a recessed structure (not shown), the surface of the active layer is etched to create a recess before forming the gate electrode, so that the thickness of the active layer can be adjusted to obtain the desired pinch-off voltage. After controlling and obtaining the desired pinch-off voltage, a gate electrode is formed within the recessed portion. However, FETs with a recessed structure in which the epitaxial layer is the active layer
In this case, even if the pinch-off voltage deviates from the desired value after the gate electrode is formed, the pinch-off voltage cannot be corrected after the gate electrode is formed.

The present invention has been made in view of the drawbacks of the conventional examples described above, and its purpose is to provide a field effect semiconductor device with an inverted gate structure that has high controllability of backside etching and is highly practical. It's about doing.

[Means for Solving the Problems] Therefore, in the field effect semiconductor device of the present invention, a buffer layer having etching characteristics different from that of the active layer is formed on the surface of the semiconductor substrate, and the active layer is formed on the surface of the buffer layer. , a source electrode and a drain electrode are provided on the surface of the active layer, and a recess is formed in the surface of the active layer between the two electrodes,
The semiconductor substrate and the buffer layer are partially removed by etching to expose the back surface of the active layer corresponding to the recessed portion, and a gate electrode is provided on the exposed surface of the back surface of the active layer.

[Function] In the present invention, a buffer layer having different etching characteristics from the active layer is provided between the semiconductor substrate and the active layer, so when the buffer layer is etched from the back side, the buffer layer is etched. By using an etching method in which the active layer is not easily etched, only the buffer layer can be etched without etching the active layer, and the controllability of back side etching can be improved. For this reason,
By forming a gate electrode on the back surface of the active layer, a field effect semiconductor device with an inverted gate structure can be easily manufactured.

In this way, if it becomes possible to manufacture a semiconductor device with an inverted gate structure, the back gate effect can be eliminated, so that FET characteristics such as transfer conductance and mutual conductance can be improved. Further, by adopting an inverted gate structure, the distance between the drain and source electrodes can be shortened, and the semiconductor device can operate at high speed. Furthermore, since the recessed portion and the gate electrode are placed on the front and back sides of the active layer, the depth of the recessed portion can be adjusted regardless of whether before or after the gate electrode is formed, making it possible to control the pinch-off voltage with high precision. can.

[Example] Hereinafter, one embodiment of the present invention will be described in detail based on the accompanying drawings.

FIG. 1 is a cross-sectional view of a GaAs MESFETIO having an inverted gate structure, which is an embodiment of the present invention. Also, Fig. 2 (a) (b) (c) (d) (e
) is a cross-sectional view showing the manufacturing order of this GaAsMBSFETIO.

Explaining the manufacturing order, first, as shown in FIG.
A buffer layer 2 is formed, and an active layer 3 of high carrier concentration GaAs is formed on the surface of this buffer layer 2.

Here, the semiconductor substrate 1 and the active layer 3 are made of the same material (GaAs).
On the other hand, the buffer layer 2 is formed of a different material from the semiconductor substrate 1 and the active layer 3, and the semiconductor substrate 1, the buffer layer 2, and the active layer 3 have a double heterostructure. Next, the surface of the active layer 8 is coated with the coating shown in FIG.
), an open contact source electrode 4 and drain electrode 5 are formed in a predetermined pattern. Next, using an etching method in which the buffer layer 2 is difficult to be etched but the semiconductor substrate l is easily etched, the semiconductor substrate 1 is etched on the back side at a location corresponding to the region between the source electrode 4 and the drain electrode 5. selectively etched from

For example, according to RIE (reactive ion etching) using CCQ4, G
Only aAs can be selectively etched.

As a result, as shown in FIG. 2(C), the semiconductor substrate 1 is partially removed corresponding to the region between the source and drain electrodes 4 and 5, and the buffer layer 2 is deposited at the bottom of the formed recess 9a. be exposed. Further, when etching the buffer layer 2, the active layer 8 is not easily etched, but if the bottom surface of the recess 9a is further etched using an etching method that easily etches the buffer layer 2, the buffer layer 8 is etched.
is etched to form a recess 9b, and the back surface of the active layer 3 is exposed at the bottom of the recess 9b. At this time, buffer layer 2
Since only the active layer 3 is selectively etched, the etching of the back surface can be controlled with high accuracy, and as shown in FIG. 2(d), the back surface of the active layer 3 is not dug and is exposed flatly. be able to. After exposing the back surface of the active layer 3 in this way, as shown in FIG. 2(e),
A gate electrode 8 with Schottky contact is formed on this flat exposed surface 7.
will be established. Next, while monitoring the pinch-off voltage,
By etching the surface of the active layer 3 between the source and drain electrodes 4 and 5 to provide a recess 6, a desired pinch-off voltage can be adjusted.

In this way, by forming the recess portion 6 after providing the gate electrode 8 and adjusting the thickness of the active layer 3, a pinch-off electrode having the set value can be obtained at the final stage.

Therefore, according to the above method, an inversion gate structure as shown in FIG. 1 can be realized. Therefore, the back gate effect can be eliminated.

Also, since it has an inverted gate structure, the source electrode 4
The distance between the electrode 5 and the drain electrode 5 can be shortened, the electron travel time can be shortened, and the high-speed operation of the M8SFET can be improved. As a selective etching method, for example, RI
Although E has been described, an etching solution may also be used. Moreover, this etching method specifically varies depending on the material of the buffer layer and the like.

Further, in the above description, the recessed portion 6 is provided after the formation of the gate electrode 8, but even if the gate electrode 8 is provided after the formation of the recessed portion 6, the pinch-off voltage may be corrected again after the formation of the gate electrode 8. can.

[Effects of the Invention] According to the present invention, by placing the buffer layer on the back side of the active layer, the controllability of the etching process on the back side of the active layer can be improved, and the layer can be exposed flatly. A gate electrode can be formed on the back surface of the active layer, making it possible to realize a semiconductor device with an inverted gate structure.

In this way, by making an inverted gate structure possible, the back gate effect can be eliminated and the characteristics of the semiconductor device can be improved. Furthermore, since the distance between the source electrode and the drain electrode can be shortened, high-speed operation is possible, making it suitable as a high-frequency device.

Furthermore, since the gate electrode and the recessed portion are configured separately, 1. Pinch-off voltage can be controlled as desired.

[Brief explanation of drawings]

Figure 1 is a sectional view showing one embodiment of the present invention, Figure 2 (a)
(b) (c) (d) (e) are sectional views showing the same manufacturing method as above, FIG. 3 is a sectional view of a conventional example, and FIG. 4 is a sectional view of another conventional example. 9-0l...Semiconductor substrate 2...Buffer layer 3...Active layer 4...Source electrode 5...Drain electrode 6...Recess portion 7...Exposed surface 8 on the back surface of the active layer ...gate electrode

Claims (1)

[Claims] (1) A buffer layer having different etching characteristics from the active layer is formed on the surface of the semiconductor substrate, the active layer is formed on the surface of the buffer layer, a source electrode and a drain electrode are provided on the surface of the active layer, and a source electrode and a drain electrode are provided between the two electrodes. A recess is formed in the surface of the active layer, the semiconductor substrate and the buffer layer are partially removed by etching to expose the back surface of the active layer corresponding to the recess, and a gate is formed on the exposed surface of the back surface of the active layer. A field effect semiconductor device characterized by being provided with an electrode.