JPH03240859A - Multiprocessor shared resource control system - Google Patents

Multiprocessor shared resource control system

Info

Publication number
JPH03240859A
JPH03240859A JP3888690A JP3888690A JPH03240859A JP H03240859 A JPH03240859 A JP H03240859A JP 3888690 A JP3888690 A JP 3888690A JP 3888690 A JP3888690 A JP 3888690A JP H03240859 A JPH03240859 A JP H03240859A
Authority
JP
Japan
Prior art keywords
lock
shared resource
processor
occupied
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3888690A
Other languages
Japanese (ja)
Inventor
Eiji Kito
鬼頭 英二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3888690A priority Critical patent/JPH03240859A/en
Publication of JPH03240859A publication Critical patent/JPH03240859A/en
Pending legal-status Critical Current

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  • Multi Processors (AREA)

Abstract

PURPOSE:To prevent a shared resource from being abnormally occupied by providing the first means to show whether the shared resource is occupied by any one of processors or not, and the second means to be turned to a certain state different from any previous states each time the processor to occupy the shared resource is changed. CONSTITUTION:When using a shared resource 4, a processor 1 investigates a lock flip-flop 41 of the shared resource 4 and when lock is enabled, a lock counter 42 is incremented. Then, a processing is exerted onto the occupied shared resource 4 and the lock is released. When the lock is disabled since the other processor, for example, a processor 2 already occupies the shared resource 4, the value of a lock counter 2 is read. After starting the possession of the lock, when there is no change in the value of the lock counter 2 even after the lapse of the maximum resource occupation time, the lock counter 42 is incremented and the lock is released.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はマルチプロセッサ共有資源管理方式に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a multiprocessor shared resource management method.

〔従来の技術〕[Conventional technology]

マルチプロセッサの共有資源管理において、最大占有時
間を越えであるプロセッサが資源を占有していることを
他のプロセッサが検出できる方式は提案されていない。
In the shared resource management of multiprocessors, no method has been proposed that allows other processors to detect that a processor is occupying a resource for a period exceeding the maximum occupation time.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

本発明の目的は、マルチプロセッサの共有資源管理にお
いであるプロセッサが共有資源を最大占有時間を越えて
占有している場合、他のプロセッサが資源のロックを解
除できる方式を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for managing shared resources of a multiprocessor, in which when a processor occupies a shared resource for a period exceeding the maximum occupancy time, other processors can unlock the resource.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のマルチプロセッサ共有資源管理方式は、複数の
プロセッサが共有する資源に、前記プロセッサのいずれ
かによって占有されているか否かを示す第1の手段と、
占有する前記プロセッサが変るごとに以前のいずれの状
態とも異なる状態をとる第2の手段とを備えている。
The multiprocessor shared resource management method of the present invention includes a first means for indicating whether or not a resource shared by a plurality of processors is occupied by any of the processors;
and second means for taking a state different from any previous state each time the occupied processor changes.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.

プロセッサ1,2.3は共通アドレスデータバス5を介
して共有資源4に接続されている。共有資源4は、プロ
セッサからセット、リセットが可能なロックフリップフ
ロップ41とロックカウンタ42とを有している。
The processors 1, 2.3 are connected to a shared resource 4 via a common address data bus 5. The shared resource 4 includes a lock flip-flop 41 and a lock counter 42 that can be set and reset by the processor.

第2図は第1図に示す実施例の処理動作のフローチャー
トである。例えば、プロセッサ1は、共有資源4を使用
しようとすると、共有資源4のロックフリップフロップ
41をTAS命令により調査しく101)、ロック可能
であればロックカウンタ42をインクリメントしく10
2)、占有した共有資源4に処理を行い(103)、ロ
ックを解除する(104)。
FIG. 2 is a flowchart of the processing operation of the embodiment shown in FIG. For example, when the processor 1 attempts to use the shared resource 4, it checks the lock flip-flop 41 of the shared resource 4 using a TAS command (101), and if the lock is possible, increments the lock counter 42 by 10.
2) Processes the occupied shared resource 4 (103) and releases the lock (104).

既に他のプロセッサ、例えばプロセッサ2が占有してお
りロック不可能であれば、ロックカウンタ2の値を読み
込む(105)。ロックの獲得を始めてから最大資源占
有時間を越えて、かつ、ロックカウンタ2の値に変化が
なければ(106)、ロックカウンタ42をインクリメ
ントしロックを解除する(108)。最大資源占有時間
を越えていないか、又は、ロックカウンタ31の値が変
化している場合は一定時間の待ちを行う(107)。
If it is already occupied by another processor, for example processor 2, and cannot be locked, the value of lock counter 2 is read (105). If the maximum resource occupancy time has passed since the start of lock acquisition and there is no change in the value of lock counter 2 (106), lock counter 42 is incremented and the lock is released (108). If the maximum resource occupancy time has not been exceeded or if the value of the lock counter 31 has changed, the process waits for a certain period of time (107).

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、共有資源に、占有されて
いるか否かを示す手段、例えばロックフリップフロップ
と、2つの時刻の間で占有するプロセッサが変っている
か否かを示す手段、例えばロックカウンタとを有するこ
とにより、異常に共有資源が占有されていた場合それを
発見して解除できる効果がある。
As explained above, the present invention provides a means for indicating whether a shared resource is occupied, such as a lock flip-flop, and a means for indicating whether or not the occupied processor has changed between two times, such as a lock flip-flop. By having a counter, if a shared resource is abnormally occupied, it can be discovered and released.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のブロック図、第2図は第1
図に示す実施例の処理動作のフローチャートである。 1.2.3・・・プロセッサ、4・・・共有資源、41
・・・ロックフリップフロップ、42・・・ロックカウ
ンタ、5・・・共通アドレスデータバス。
FIG. 1 is a block diagram of one embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
3 is a flowchart of the processing operation of the embodiment shown in the figure. 1.2.3... Processor, 4... Shared resource, 41
. . . lock flip-flop, 42 . . . lock counter, 5 . . . common address data bus.

Claims (1)

【特許請求の範囲】[Claims] 複数のプロセッサが共有する資源に、前記プロセッサの
いずれかによって占有されているか否かを示す第1の手
段と、占有する前記プロセッサが変るごとに以前のいず
れの状態とも異なる状態をとる第2の手段とを備えたこ
とを特徴とするマルチプロセッサ共有資源管理方式。
a first means for indicating whether or not a resource shared by a plurality of processors is occupied by any of the processors; and a second means that takes a state different from any previous state each time the processor that occupies the resource changes. A multiprocessor shared resource management method characterized by comprising means.
JP3888690A 1990-02-19 1990-02-19 Multiprocessor shared resource control system Pending JPH03240859A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3888690A JPH03240859A (en) 1990-02-19 1990-02-19 Multiprocessor shared resource control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3888690A JPH03240859A (en) 1990-02-19 1990-02-19 Multiprocessor shared resource control system

Publications (1)

Publication Number Publication Date
JPH03240859A true JPH03240859A (en) 1991-10-28

Family

ID=12537693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3888690A Pending JPH03240859A (en) 1990-02-19 1990-02-19 Multiprocessor shared resource control system

Country Status (1)

Country Link
JP (1) JPH03240859A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06301658A (en) * 1993-04-14 1994-10-28 Nec Corp Recovery system in loose coupling electronic computer system
US8108719B2 (en) 2006-10-13 2012-01-31 Nec Corporation Information processing device and failure concealing method therefor
JP2013214331A (en) * 2013-07-22 2013-10-17 Panasonic Corp Compiler

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06301658A (en) * 1993-04-14 1994-10-28 Nec Corp Recovery system in loose coupling electronic computer system
US8108719B2 (en) 2006-10-13 2012-01-31 Nec Corporation Information processing device and failure concealing method therefor
JP2013214331A (en) * 2013-07-22 2013-10-17 Panasonic Corp Compiler

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