JPH03236683A - Clamp circuit - Google Patents

Abstract

PURPOSE:To prevent an output amplitude from being decreased by adopting the constitution such that an input impedance to a burst signal and an impedance of a clamp circuit are not selected both low. CONSTITUTION:PNP transistors(TRs) 10,11 are connected as a differential pair, NPN TRs 13, 14 are formed a current mirror circuit and an output terminal 5 is going to a voltage equal to a reference voltage applied to a terminal 3 to supply an equal current to the current mirror circuit. A constant current source 21 is controlled by a signal converted to have a proper amplitude from a clamp pulse and a current flows only at clamping. Thus, charge/discharge current flows to a clamp capacitor 8 only at the clamping.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a clamp circuit, and particularly to a clamp circuit that receives a video signal as an input.

[Conventional technology]

A conventional clamp circuit of this type includes a circuit as shown in FIG. As shown in the figure, NPN type transistors 13 and 14 are differentially connected. PNP transistors 10 and 11 constitute a current mirror, and since they attempt to cause equal currents to flow, terminal 7 attempts to have an equal voltage with respect to the reference voltage applied to terminal 3. The switch 19 is turned on and off by clamp pulse input.
The switch is turned on during clamp operation. When the switch is turned on, the clamp capacitor 8 is operated by the constant current source 22 and the transistor 15 to cause current to flow in and out, that is, as follows:
When the switch 19 is turned on, the input signal is divided into the impedance on the input side and the impedance on the clamp circuit side, and is applied to the output terminal. In this circuit, the N of the emitter follower is used to quickly charge and discharge the clamp capacitance.
A PN type transistor is provided to make the impedance as low as possible. Therefore, if a clamping operation is performed when a burst signal is input, which is the reference for the amplitude, the output waveform will have a smaller amplitude than the burst signal, as shown in Figure 6, and there will be a difference between the output and the video input signal. It will happen.

It is possible to insert a large resistor to increase the impedance on the clamp circuit side, but this actually reduces the ability to charge the clamp capacitance to hold the clamp voltage, and it may take too long to reach the clamp voltage. and cannot be used as a clamp circuit.

SUMMARY OF THE INVENTION An object of the present invention is to provide a clamp circuit in which the amplitude of the output does not decrease even if a clamp operation is performed when a burst signal is input.

[Means to solve the problem]

The clamp circuit of the present invention includes a differential pair circuit to which a reference voltage is applied to a first input terminal, a capacitor provided between the output terminal and the input terminal of the differential pair circuit, and a capacitor of the differential pair circuit. an amplifying means provided between an output terminal and an output terminal; and means for connecting the output of the amplifying means to a second input terminal of the differential pair circuit;
and a control means for controlling the operation of the differential pair circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram for explaining a first embodiment of the present invention. PNP type transistors 10 and 11 are connected as a differential pair. Since the NPN transistors 13 and 14 form a current mirror circuit and attempt to flow equal currents, the voltage at the output terminal 5 tends to be equal to the reference voltage applied to the terminal 3. The constant current source 21 is controlled by a signal converted from the clamp pulse to have an appropriate amplitude, and can flow current only during the clamp operation.

Therefore, only during the clamp operation, charging/discharging current flows through the clamp capacitor 8 so that the voltage at the output terminal 5 is equal to the voltage applied to the terminal 3. When the clamp is not in operation, the differential amplifier composed of the PNPNPN transistor and 11 is disconnected, and the input signal is outputted through the amplifier.

With this configuration, if we ignore the current flowing into the amplifier 9 at the terminal 2 and set the gain of the amplifier to 1 (from Kirchoff's theorem), Vot+t is the voltage at the output terminal 5, and VIN is the input terminal voltage of l, R8 is the resistance value of resistor 18, C is the capacitance of clamp capacitor 8, ■. is the current value of the constant current source.

The closer A is to 1, the less the amplitude of the burst signal will decrease. For example, if the clamp capacitance is 2μF,
The resistance value of the resistor 18 is 8Ω, and the frequency of the burst signal is 3.
If the frequency is 58 MHz and 300 μA is applied to the constant current source 21, A=0.914 from the above equation.

As described above, according to this embodiment, the input side impedance of the burst signal and the clamp circuit side impedance are not low impedances, so the amplitude of the output does not become small.

FIG. 2 is a circuit diagram for explaining a second embodiment of the present invention. This embodiment replaces the PNP transistors 10 and 11 with NPN transistors in the circuit of the first embodiment shown in FIG.
is replaced with a PNP type transistor.

The operation of this embodiment is basically the same as that of the first embodiment.

FIG. 3 is a circuit diagram for explaining a third embodiment of the present invention. The difference between this embodiment and the first embodiment is that resistors 19 and 20 are provided between the PNP transistors 10 and 11 forming a differential pair and the constant current source 21, and the base of the PNP transistor 11 is connected to the ground. This is because a capacitor 23 is provided between the potentials.

With this configuration, if the current flowing into the amplifier 9 at the terminal 2 is ignored, and the gain of the amplifier is 1, (from Kirchhoff's theorem), VOtlT is the voltage at the output terminal 5, and VlN is the voltage at the input terminal 1. voltage, g□ is gm of transistor 10.11,
gmE is g□ of the differential amplifier composed of transistors 10 and 11, R8 is the resistance value of resistor 18, Rp is the resistance value of resistor 17, RE is the resistance value of resistors 19 and 20, and C1 is the capacitance of clamp capacitor 8. value, C2 is the capacitance value of capacitor 23,
■. is the current value of the constant current source 21.

If (2) is modified, Considering that the resistors 19 and 20 are included in the differential amplifier, the closer A is to 1, the less the amplitude of the burst signal will decrease. For this purpose, it is better for K r , K 2 and gYB to be small. In order to reduce gmE, the resistance value R2 of the resistor 19.20 may be increased. However, since there is a voltage drop due to R8, it cannot be made too large.

To reduce K1, it is sufficient to reduce Rs, which is 75
The receiver can be made sufficiently small by allowing the emitter follower to receive the passed signal.

The effect of the resistance value Rp of the capacitor 23 and the resistor 17 can be seen in 2. For example, set the frequency of the burst signal to 3.58
MHz, clamp capacitance t C+ = 2 pF, resistance 1
The current of the constant current source 21 is set to Rs28Ω. =500
Let it be μA. Resistance 19.20 R6 = 100Ω, resistance 1
RP of 7 = Ω to 10, C of Fun7゛ 23, = 10p
If you put it in F, it becomes 0.986.

When resistor 19.20, resistor 17, and capacitor 23 are removed, 2 = 1 in the formula (■), and if you ignore the formula (■), A =
It becomes 0.764.

As described above, this embodiment is effective in that it does not reduce the amplitude of the burst signal. That is, at the burst signal frequency, the impedance is high and the burst signal can be input, and at the horizontal synchronization frequency, it is possible to perform a clamping operation. In particular, when the current of the constant current source 21 is increased so that the clamp capacitor 8 can be charged rapidly, the present invention is effective because gY becomes large according to equation (2).

FIG. 4 is a circuit diagram for explaining a second embodiment of the present invention. This embodiment replaces the PNP transistors 10 and 11 with NPN transistors in the circuit of the third embodiment shown in FIG.
is replaced with a PNP type transistor, and the operation is basically the same as that of the third embodiment.

〔Effect of the invention〕

As explained above, the present invention has a structure in which both the impedance on the input side of the burst signal and the impedance on the clamp circuit side are not low impedances.
It is possible to prevent the output amplitude from becoming small.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a circuit diagram for explaining the first embodiment of the present invention;
FIG. 2 is a circuit diagram for explaining a second embodiment of the present invention, FIG. 3 is a circuit diagram for explaining a third embodiment of the present invention, and FIG. 4 is a circuit diagram for explaining a fourth embodiment of the present invention. FIG. 5 is a circuit diagram for explaining the embodiment, FIG. 5 is a circuit diagram for explaining a conventional example, and FIG. 6 is a diagram showing input and output waveforms of the circuit in FIG. 1...Input terminal, 2,7...Terminal, 3
...Reference voltage input terminal, 4...Clamp pulse input terminal, 5...Output terminal, 6...
...Power supply, 8...Clamp capacity, 9...
...Amplifier, 10-11...PNP type transistor, 13-15...NPN type transistor,
16-20...Resistance, 21.22...
Constant current source, 23... Capacitor.

Claims (1)

[Claims] 1. A differential pair circuit to which a reference voltage is applied to a first input terminal, a capacitor provided between the output terminal and the input terminal of the differential pair circuit, and the differential pair circuit. an amplification means provided between an output terminal and an output terminal of the amplifier, means for connecting the output of the amplification means to a second input terminal of the differential pair circuit, and a control means for controlling the operation of the differential pair circuit. A clamp circuit comprising: 2. The clamp circuit according to claim 1, further comprising a capacitive element provided between the second input terminal of the differential pair circuit and the power supply. 3. The clamp circuit according to claim 1 or 2, wherein the control means is a circuit means for selecting whether or not to supply a constant current to the differential pair circuit based on a control signal.