JPH0221781Y2 - - Google Patents

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Publication number
JPH0221781Y2
JPH0221781Y2 JP1982169035U JP16903582U JPH0221781Y2 JP H0221781 Y2 JPH0221781 Y2 JP H0221781Y2 JP 1982169035 U JP1982169035 U JP 1982169035U JP 16903582 U JP16903582 U JP 16903582U JP H0221781 Y2 JPH0221781 Y2 JP H0221781Y2
Authority
JP
Japan
Prior art keywords
capacitor
transistor
circuit
vca
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982169035U
Other languages
Japanese (ja)
Other versions
JPS5973821U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16903582U priority Critical patent/JPS5973821U/en
Publication of JPS5973821U publication Critical patent/JPS5973821U/en
Application granted granted Critical
Publication of JPH0221781Y2 publication Critical patent/JPH0221781Y2/ja
Granted legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Description

【考案の詳細な説明】 本考案は電子ボリユームに関するものである。[Detailed explanation of the idea] The present invention relates to electronic volumes.

従来の電子回路で信号を制御する電子ボリユー
ムを第1図に示す。
FIG. 1 shows an electronic volume whose signals are controlled by a conventional electronic circuit.

入力端子1から入つて来た音楽信号は、抵抗R
0,R2,R4,R6を通して増幅器2を通して
出力端子4に取り出される。
The music signal coming in from input terminal 1 is connected to resistor R.
0, R2, R4, and R6, and is taken out to the output terminal 4 through the amplifier 2.

アツプ・ダウン・カウンター5で、パルス発生
器6からのパルスをスイツチ7を閉じた時アツ
プ・ダウン・カウンター5はアツプ・カウンター
としてスイツチ8を閉じた時はダウン・カウンタ
ーとしてカウントされるように構成されている。
アツプ・ダウン・カウンターの出力Q1,Q2,
Q3,Q4によつてトランジスタ11,12,1
3,14がON・OFFの制御を受ける。今、例え
ば、アツプ・ダウン・カウンター5の出力によつ
てトランジスタ11、および13がON、トラン
ジスタ12および14がOFFの場合、端子1の
音楽信号はR1/(R1+R0)・R5/(R2+R4+R5)に減衰 されて出力端子4に取り出される。しかし、この
ように構成された電子ボリユームによつて制御さ
れる音楽信号は階段状にしか制御されず、微妙な
調整が困難であり、またスイツチング素子を使用
するため信号系統に雑音が混入する恐れがあつ
た。
The up-down counter 5 is configured so that when the switch 7 is closed, the pulse from the pulse generator 6 is counted as an up-down counter, and when the switch 8 is closed, the up-down counter 5 is counted as a down counter. has been done.
Up/down counter output Q1, Q2,
Transistors 11, 12, 1 by Q3 and Q4
3 and 14 are subject to ON/OFF control. Now, for example, if transistors 11 and 13 are turned on and transistors 12 and 14 are turned off by the output of up-down counter 5, the music signal at terminal 1 will be R1/(R1+R0) and R5/(R2+R4+R5). The signal is attenuated and taken out to the output terminal 4. However, the music signal controlled by the electronic volume configured in this way is controlled only in a stepwise manner, making it difficult to make delicate adjustments, and since switching elements are used, there is a risk that noise may be mixed into the signal system. It was hot.

本考案は上記のような複雑な回路を用いない段
階状でなくなめらかに制御し、しかも雑音などが
混入しにくい電子ボリユームを提供するものであ
る。
The present invention provides an electronic volume that does not use the above-mentioned complicated circuits, can be controlled smoothly without steps, and is less likely to be contaminated by noise.

VCAの制御電圧となる電圧をコンデンサの充
電電圧とし、、その充電用としてPNPトランジス
タを用いた定電流回路と放電用としてNPNトラ
ンジスタを用いた定電流回路を具備し、上記いず
れかの定電流回路を動作させることによつて上記
コンデンサの充電電圧を制御し、その電圧によつ
てVCAが制御されるように構成するものである。
The voltage that is the control voltage of the VCA is used as the charging voltage of the capacitor, and it is equipped with a constant current circuit using a PNP transistor for charging and a constant current circuit using an NPN transistor for discharging, and any of the above constant current circuits The charging voltage of the capacitor is controlled by operating the capacitor, and the VCA is controlled by the voltage.

本考案の一実施例を図面と共に説明する。 An embodiment of the present invention will be described with reference to the drawings.

第2図は本考案の一実施例を示す回路の略図
で、信号は入力端子1よりVCA22に供給され、
VCA22で制御された信号は出力端子4より出
力される。
FIG. 2 is a schematic diagram of a circuit showing an embodiment of the present invention, in which a signal is supplied from input terminal 1 to VCA 22,
The signal controlled by the VCA 22 is output from the output terminal 4.

VCAの制御端子23は高入力インピーダンス
のバツフアアンプ24の出力で制御される。
The control terminal 23 of the VCA is controlled by the output of a buffer amplifier 24 with high input impedance.

バツフアアンプ24の入力端子25にはコンデ
ンサ26が接続され、コンデンサ26の電圧でバ
ツフアアンプが制御される。スイツチ27はコン
デンサ26の充電電圧を定電流で放電させるため
のスイツチで、スイツチ28はコンデンサ26に
定電流で充電するためのスイツチである。
A capacitor 26 is connected to an input terminal 25 of the buffer amplifier 24, and the buffer amplifier is controlled by the voltage of the capacitor 26. The switch 27 is a switch for discharging the charging voltage of the capacitor 26 with a constant current, and the switch 28 is a switch for charging the capacitor 26 with a constant current.

今、スイツチ28を閉じると、抵抗31を通し
てトランジスタ32のベース電流IB1が流れ、電
源29とトランジスタ32のベースに接続されて
いるダイオード34,35によつて定電圧のベー
ス電圧VB1が加えられる。したがつてトランジス
タ32のベースエミツタ間の電圧をVBE1とすれ
ば、トランジスタ32のコレクタ電流IC1は電源
29とエミツタと接続する抵抗38の値をR3と
するとIC1≒VB1−VBE1/R3となる。
Now, when the switch 28 is closed, the base current I B1 of the transistor 32 flows through the resistor 31, and a constant base voltage V B1 is applied by the power supply 29 and the diodes 34 and 35 connected to the base of the transistor 32. . Therefore, if the voltage between the base and emitter of the transistor 32 is V BE1 , then the collector current I C1 of the transistor 32 is I C1 ≒ V B1 − V BE1 /R3, where the value of the resistor 38 connected to the power supply 29 and the emitter is R3. becomes.

これは、トランジスタ32のコレクタ電圧に関
係なく定電流となりコンデンサ26の充電電流と
なる。
This becomes a constant current regardless of the collector voltage of the transistor 32, and becomes a charging current for the capacitor 26.

次にスイツチ27を閉じた場合、抵抗30を通
じてトランジスタ33のベース電流IB2が流れ、
トランジスタ33のベースとアース間に接続され
るダイオード36,37によつて定電圧のベース
電圧VB2が加えられる。したがつてトランジスタ
33のベース・エミツタ間の電圧をVBE2とすれ
ば、トランジスタ33のコレクタ電流IC2はエミ
ツタを接地する抵抗39の値をR4とすると、IC2
≒VB1−VBE2/R4となる。これはトランジスタ33 のコレクタ電圧に関係なく定電流となり、コンデ
ンサ26の放電電流となる。
Next, when the switch 27 is closed, the base current I B2 of the transistor 33 flows through the resistor 30.
A constant base voltage V B2 is applied by diodes 36 and 37 connected between the base of the transistor 33 and ground. Therefore, if the voltage between the base and emitter of the transistor 33 is V BE2 , the collector current I C2 of the transistor 33 will be I C2 if the value of the resistor 39 that grounds the emitter is R4.
≒V B1 −V BE2 /R4. This becomes a constant current regardless of the collector voltage of the transistor 33, and becomes a discharge current of the capacitor 26.

コンデンサ26は高入力インピーダンスのバツ
フアアンプ24の入力端子に接続されている。ス
イツチ27,28が開いている状態ではトランジ
スタ32,33は不導通となり充電された制御特
性は第3図に示されるような特性を持つため、バ
ツフアアンプ24の出力電圧がすなわちVCAの
制御電圧となつて入力端子1から入つてきた信号
を減衰させる。したがつて信号の大きさをスイツ
チ27,28によつてなめらかに制御することが
できる。また以上の回路構成において抵抗38,
39を連動する2つのボリユームに置き換えた場
合コンデンサ26との時定数によりVCAの制御
電圧の変化の速さを自由に選ぶことができる。コ
ンデンサ26の値を変えても同様である。
Capacitor 26 is connected to the input terminal of buffer amplifier 24 with high input impedance. When the switches 27 and 28 are open, the transistors 32 and 33 are non-conductive and the charged control characteristics have the characteristics shown in FIG. 3, so the output voltage of the buffer amplifier 24 becomes the control voltage of the VCA. to attenuate the signal coming in from input terminal 1. Therefore, the magnitude of the signal can be smoothly controlled by the switches 27 and 28. In addition, in the above circuit configuration, the resistor 38,
When 39 is replaced with two interlocking volumes, the speed of change of the VCA control voltage can be freely selected depending on the time constant with the capacitor 26. The same holds true even if the value of the capacitor 26 is changed.

上記のように本考案によれば、なめらかに制御
減衰することができ、信号に変動雑音などが混入
しない電子ボリユームを簡単な回路構成で実現で
きる。
As described above, according to the present invention, an electronic volume that can perform smooth controlled attenuation and that does not include fluctuating noise or the like in the signal can be realized with a simple circuit configuration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の電子ボリユームの回路図、第2
図は本考案の一実施例の回路図、第3図は第2図
に用いるVCAの信号減衰度対制御電圧特性例を
示す図である。 1は入力端子、22はVCA、4は出力端子、
24はバツフアアンプ、26はコンデンサ、2
7,28はスイツチ、29は電源、30,31,
38,39は抵抗、32,33はトランジスタ、
34,35,36,37はダイオードである。
Figure 1 is a circuit diagram of a conventional electronic volume, Figure 2 is a circuit diagram of a conventional electronic volume.
The figure is a circuit diagram of an embodiment of the present invention, and FIG. 3 is a diagram showing an example of signal attenuation versus control voltage characteristics of the VCA used in FIG. 2. 1 is the input terminal, 22 is the VCA, 4 is the output terminal,
24 is a buffer amplifier, 26 is a capacitor, 2
7, 28 are switches, 29 is a power supply, 30, 31,
38 and 39 are resistors, 32 and 33 are transistors,
34, 35, 36, and 37 are diodes.

Claims (1)

【実用新案登録請求の範囲】 (1) 充・放電用のコンデンサと、第1のスイツチ
でベースバイアスを導通状態にして上記コンデ
ンサに定電流を流し充電する第1のトランジス
タと、第2のスイツチでベースバイアスを導電
状態にし上記コンデンサより定電流を流し放電
する第1のトランジスタとは極性が異なる第1
のトランジスタに直列接続された第2のトラン
ジスタと、上記コンデンサに充電された電圧を
ホールドするホールド回路と、ホールド回路の
出力によつて信号を減衰又は増強せしめる
VCA回路とを具備し上記第1及び第2のスイ
ツチをON又はOFFしてVCA回路を制御する
ことを特徴とする電子ボリユーム装置。 (2) 第1及び第2のトランジスタのそれぞれのエ
ミツタに直列に連動する可変抵抗器を設けバイ
アス回路のエミツタ抵抗値を変えて電流量を制
御しコンデンサの充電及び放電の速さを変えて
VCA回路を制御する速さを変えることを特徴
とする実用新案登録請求の範囲第(1)項記載の電
子ボリユーム装置。
[Claims for Utility Model Registration] (1) A charging/discharging capacitor, a first transistor that conducts a base bias with a first switch and charges the capacitor with a constant current, and a second switch. The first transistor has a different polarity from the first transistor which sets the base bias to a conductive state and causes a constant current to flow and discharge from the capacitor.
a second transistor connected in series to the transistor; a hold circuit that holds the voltage charged in the capacitor; and a signal attenuated or amplified by the output of the hold circuit.
1. An electronic volume device comprising a VCA circuit and controlling the VCA circuit by turning on or off the first and second switches. (2) A variable resistor is connected in series to the emitter of each of the first and second transistors, and the emitter resistance value of the bias circuit is changed to control the amount of current and change the charging and discharging speed of the capacitor.
The electronic volume device according to claim (1) of the utility model registration, characterized in that the speed at which the VCA circuit is controlled is changed.
JP16903582U 1982-11-08 1982-11-08 electronic volume device Granted JPS5973821U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16903582U JPS5973821U (en) 1982-11-08 1982-11-08 electronic volume device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16903582U JPS5973821U (en) 1982-11-08 1982-11-08 electronic volume device

Publications (2)

Publication Number Publication Date
JPS5973821U JPS5973821U (en) 1984-05-19
JPH0221781Y2 true JPH0221781Y2 (en) 1990-06-12

Family

ID=30369382

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16903582U Granted JPS5973821U (en) 1982-11-08 1982-11-08 electronic volume device

Country Status (1)

Country Link
JP (1) JPS5973821U (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0541480Y2 (en) * 1985-09-06 1993-10-20

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501779A (en) * 1973-05-04 1975-01-09

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55155107U (en) * 1979-04-20 1980-11-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501779A (en) * 1973-05-04 1975-01-09

Also Published As

Publication number Publication date
JPS5973821U (en) 1984-05-19

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