JPH07106872A - Operational amplifier with high slew rate - Google Patents

Abstract

PURPOSE:To simply obtain the operational amplifier with high slew rate without impairing a characteristic in a small signal input state by turning off a current switch circuit section in the small signal input state and utilizing charge/ discharge of a phase compensation capacitor in a large signal input state. CONSTITUTION:When a signal inputted to a noninverting input terminal IN+ is a small signal, transistors(TRs) 8, 9 being components of a differential switch circuit of a current switch circuit section are turned off and a TR 10 is turned on. Thus, in the small signal input state, the current switch circuit section is disconnected from an operational amplifier circuit section and it is operated singly. When an input is a large amplitude step signal, a power supply switch circuit section is turned on, and a current is supplied from a constant current source included in the current switch section to a differential input stage comprising TRs 21-24 of the operational amplifier circuit section. Thus, in the input state of a large amplitude signal, a charge/discharge current of a phase compensation capacitor C32 is increased to realize a high slew rate.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an operational amplifier,
In particular, the present invention relates to an operational amplifier that can realize a high slew rate.

[0002]

2. Description of the Related Art Conventionally, various types of operational amplifiers are known, but a commonly used configuration example is shown in FIG.
Shown in. In FIG. 2, reference numerals 21 and 22 denote PNP transistors which form a differential input stage. The emitters are commonly connected to the power source V _CC through the constant current source 30, and the bases are connected to the inverting input terminal IN ₋ and the non-inverting input terminal IN ₋ , respectively. It is connected to the inverting input terminal IN ₊ . 23 and 24 are NPNs forming a current mirror circuit
In the transistor, the collector and base of the transistor 23 are connected to the collector of the transistor 21, the emitter is grounded, and the collector of the transistor 24 is the transistor.
The collector and the base of 22 are connected to the base and collector of the transistor 23, respectively, and the emitter is grounded.

Reference numerals 25, 26, and 27 are PNP transistors forming the second stage. The collector and base of the transistor 25 are connected to the power supply V _CC through the constant current source 31, and the collector and base of the transistor 26 are transistors. The collector of the transistor 27 is connected to the emitter of the transistor 26, the base is connected to the collectors of the transistors 22 and 24, and the emitter is grounded. A phase compensation capacitor 32 is connected to. Reference numerals 28 and 29 are NPN transistors and PNP transistors which form an output stage. The collector of the transistor 28 is connected to the power supply V _CC , the base is connected to the collector and the base of the transistor 25, and the emitter is connected to the output terminal OUT.
The emitter of 29 is connected to the output terminal OUT, the base is connected to the emitter of the transistor 26 and the collector of the transistor 27, and the collector is grounded.

An operational amplifier having such a configuration is shown in FIG.
As shown in (A) of FIG. 1, the symbol 100 is used to connect the inverting input terminal IN _- and the output terminal OUT to form a voltage follower circuit, and the positive large-amplitude step signal V is applied to the non-inverting input terminal IN _+. Input _IN , output voltage V _OUT
The transient response of is as shown in FIG. In FIG. 3B, the slope (dV _OUT / dt) of the portion where the output voltage V _OUT rises linearly is called the slew rate (SR). The principle of generating this slew rate can be explained as follows. Here, it is assumed that the current values of the constant current sources 30 and 31 are I ₃₀ and I ₃₁ , respectively, and the relationship of I ₃₀ <I ₃₁ is established.

When the operational amplifier shown in FIG. 2 is connected as shown in FIG. 3A and a positive large-amplitude step signal V _IN is input to the non-inverting input terminal IN ₊ , the transistor is turned on.
21 is turned on, the transistor 22 is turned off, and the current I ₃₀ of the constant current source 30 flows through the transistors 21 and 23. Here, if the phase compensation capacitor 32 is not connected, the current does not flow into the base of the transistor 27, so that the transistor 27 is turned off, so that the collector potential V _C27 of the transistor 27 rises in an instant. Then, along with this, the output voltage V _OUT also rises in an instant.
On the other hand, when the phase compensation capacitor 32 is connected, the collector potential V _C27 of the transistor 27 rises while charging the phase compensation capacitor 32. Here, since the current I ₃₂ flowing into the phase compensation capacitor 32 is equal to the collector current I _C24 of the transistor 24, it becomes a constant current I ₃₀ folded by the current mirror composed of the transistors 23 and 24. Therefore, since the phase compensating capacitor 32 is charged by the constant current I ₃₀ , the collector potential V _C27 of the transistor 27 linearly rises, and the output voltage V _OUT also linearly rises accordingly.

On the other hand, when a negative large-amplitude step signal is input to the non-inverting input terminal IN ₊ , the respective operations are reversed and the phase compensation capacitor 32 is discharged by the constant current I ₃₀ , so that the transistor 27 collector potential V _C27
Linearly decreases, and the output voltage V _OUT also linearly decreases accordingly.

From the above, the slew rate SR of the operational amplifier shown in FIG. 2 is determined by the time for charging / discharging the phase compensation capacitor 32. If the value of the capacitor 32 is C ₃₂ ,
It is expressed by the following equation (1). SR = I ₃₀ / C ₃₂ (1)

[0008]

When it is attempted to obtain a high slew rate in the conventional operational amplifier described above, the current value I ₃₀ of the constant current source 30 is as shown in the above equation (1).
May be increased, or the value C ₃₂ of the phase compensation capacitor ₃₂ may be decreased. However, only by changing the simply constant value C ₃₂ in the current value I ₃₀ and the phase compensating capacitor 32 of the constant current source 30, since the operation of the circuit becomes unstable at the time of a small signal input, eventually, the current value I ₃₀ There was a problem that the capacitor capacitance value C ₃₂ must be set and the entire circuit must be redesigned.

The present invention has been made in order to solve the above problems in the conventional operational amplifier, and provides an operational amplifier in which a high slew rate can be easily obtained and the slew rate can be arbitrarily set. The purpose is to

[0010]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention has a common emitter connected to a power supply via a first constant current source, and each base is connected to a first power source.
And first and second transistors connected to the second signal input terminal, and first and second resistors having one ends connected to collectors of the first and second transistors and the other ends commonly connected. And a third resistor having one end connected to a common connection point of the first and second resistors and the other end grounded, and a common resistor connected to a power source via a second constant current source, Each base is connected to the collector of the first transistor,
The third, fourth, and fifth transistors connected to the common connection point of the collector of the second transistor and the first and second resistors, and each of the third, fourth, and fifth transistors The collectors are respectively the first, second and third
Differential input stage in which the current switch circuit section serving as the current terminal and the emitter are connected in common to the power source through the third constant current source, and each base is connected to the second and first signal input terminals, respectively. And a sixth and a seventh transistor, which has a collector and a base connected to the collector of the sixth transistor, and an emitter which is grounded, and an eighth transistor which has a collector connected to the collector of the seventh transistor and a base. Connected to the bases of the eighth transistors,
A ninth transistor having an emitter grounded, a base having a base connected to the collector of the ninth transistor and having a grounded emitter, and a load and output circuit connected to the collector of the tenth transistor, The tenth
And an operational amplifier circuit section composed of a phase compensating capacitor connected between the collector and the base of the transistor, the first current terminal of the current switch circuit section is connected to the collector of the eighth transistor, The second current terminal is connected to the collector of the ninth transistor and the third current terminal is connected to the ground potential to form an operational amplifier.

In the operational amplifier configured as described above, when a small signal is input, the current switch circuit section is turned off, the current switch circuit section and the operational amplifier circuit section are separated, and the operational amplifier circuit section operates independently. On the other hand, when a large-amplitude signal is input to the input terminal, the current switch circuit section is turned on, and the differential input stage of the operational amplifier circuit section is supplied with current from the constant current source included in the current switch circuit section. As a result, when a large amplitude signal is input, the current for charging and discharging the phase compensation capacitor increases, and a high slew rate can be realized. Further, the slew rate can be arbitrarily set by changing the current value of the constant current source included in the current switch circuit unit.

[0012]

EXAMPLES Next, examples will be described. 1 is a circuit configuration diagram showing an embodiment of an operational amplifier according to the present invention.
The same or corresponding elements as those of the conventional example shown in FIG. In FIG. 1, reference numeral 1 is a constant current source whose one end is connected to a power supply V _CC, which is connected to a common emitter connection point of a differential input stage composed of PNP transistors 2 and 3 having the same characteristics. It is designed to supply electric current. The base of the transistor 2 is connected to the non-inverting input terminal IN ₊ , the base of the transistor 3 is connected to the inverting input terminal IN _−, and the emitters of the transistors 2 and 3 are grounded via the load resistors 4 and 5, respectively. The resistor 6 for level shifting is connected.

Reference numerals 8, 9 and 10 are PNP transistors which form a differential switch circuit. The base of the transistor 8 is the collector of the transistor 2 and the collector is the transistor 23 of the operational amplifier circuit section which is composed of the components 21 to 32. , The base of the transistor 9 is connected to the collector of the transistor 3, the collector is connected to the collector of the transistor 24 constituting the operational amplifier circuit section, and the base of the transistor 10 is for load resistances 4 and 5 and for level shifting. It is connected to the connection point with the resistor 6, the collector is grounded, and the emitters of the transistors 8, 9 and 10 are commonly connected to the power supply V _CC via the constant current source 7. Then, the constant current source 7 includes the transistors 8, 9, 10
It is designed to set the current that flows in the differential switch circuit consisting of
A current switch circuit section for the operational amplifier circuit section having the same configuration as the conventional example is configured.

[0014] Next, in thus constituted operational amplifier, as shown in FIG. 3 (A), the inverting input terminal IN _-
And output terminal OUT are connected (voltage follower circuit)
The operation when a signal is input to the non-inverting input terminal IN ₊ will be described. However, the current values of the constant current sources 1 and 7 are I ₁ , I ₇ , respectively, the resistance values of the load resistors 4, 5 are R _C , and the resistance value of the level shift resistor 6 is R ₆ .

When the condition of imaginary short circuit is satisfied at the time of inputting a small signal, an equal current I _1/2 flows through the transistors 2 and 3, and the base potential V of the transistors 8 and 9 is increased.
_B8 and V _B9 are equal. At this time, the transistor 8,
Base potentials V _B8 , V _B9 , and V _B10 of ₉ and ₁₀ are expressed by the following equations (2) and (3), respectively. V _B8 = V _B9 = I ₁ R ₆ + I ₁ · R _C / 2 (2) V _B10 = I ₁ R ₆ (3) Here, operational amplification composed of the constituent elements 21 to 32 In the input range of the circuit portion, the relationship between the current value I ₁ of the constant current source ₁ and the resistance value R ₆ of the level shift resistor 6 is set to I ₁ R so that the transistors 2, 3, 8 and 9 do not enter saturation. ₆ = 400mV
It is necessary to set it to the degree. As can be seen from the expressions (2) and (3), the base potentials V _B8 and V _B9 of the transistors 8 and 9 are the base potential V _B of the transistor 10 which is the reference voltage.
Differences compared to the _B10 voltage [Delta] V _B as high, the differential voltage [Delta] V _B is expressed by the following equation (4). ΔV _B = I ₁ · R _C / 2 (4) Here, if ΔV _B ≈150 mV is set, the transistor 8
And 9 turn off, transistor 10 turns on, and constant current I ₇
All flow to transistor 10 whose collector is grounded.
Therefore, when a small signal is input, the current switch circuit section is separated from the operational amplifier circuit section, and the operational amplifier circuit section operates independently.

On the other hand, when a positive large-amplitude step signal is input to the non-inverting input terminal IN ₊ , the operations of the current switch circuit section and the operational amplifier circuit section are as follows. That is, in the current switch circuit section, the transistor 2 is off,
The transistor 3 is turned on, and all the current I ₁ of the constant current source 1 flows through the transistor 3. As a result, the base potentials V _B8 , V _B9 and V _B10 of the transistors 8, ₉ and ₁₀ are expressed by the following equations (5), (6) and (7). V _B8 = I ₁ R ₆ (5) V _B9 = I ₁ (R ₆ + R _C ) (6) V _B10 = I ₁ R ₆ (7) Above (5), (6) ) And (7), the base potentials V _B8 and V _B10 of the transistors ₈ and ₁₀ are equal, and the base potential V _B9 of the transistor 9 is different from V _B8 and V _B10 by the difference voltage ΔV _B ′ = I ₁ R Only _C = 300 mV higher. Therefore, transistors 8 and 10 turn on and transistor 9 turns off.

On the other hand, in the differential input stage composed of the components 21 to 24 of the operational amplifier circuit section, the transistor 21 is turned on, the transistor 22 is turned off, and the constant current I ₃₀ is
Flows to 21. The collector current I _C23 of the transistor 23 is
The sum of the collector current I _C21 of the transistor 21 and the collector current I _C8 of the transistor 8 in the current switch circuit portion is represented by the following equation (8). _{I C23 = I C21 + I C8} = I 30 + I 7/2 ··· (8) , where the charging current I ₃₂ of the phase compensation capacitor 32, since equal collector current I _C23 of the transistor 23, the charging current I ₃₂ is represented by the following equation (9). _{I 32 = I C21 + I C8} = I 30 + I 7/2 ··· (9)

The operation when a large negative amplitude step signal is input to the non-inverting input terminal IN ₊ is as follows. That is, in the current switch circuit, the transistor 2 is turned on, the transistor 3 is turned off, thereby turning on the transistor 9 and 10, electric current of I _7/2, respectively, the transistor 8 is turned off. On the other hand, in the differential input stage of the operational amplifier circuit section, the transistor 21 is turned off, the transistor 22 is turned on, and the constant current I ₃₀ flows through the transistor 22. Here, since no current flows into the transistor 24, the collector current I _C22 of the transistor ₂₂ and the collector current I _{C9 of the} transistor 9 become the discharge current I ₃₂ of the phase compensation capacitor ₃₂ , and this discharge current I ₃₂ is given by It is represented by 10). Discharge current I ₃₂ of _{I 32 = I C22 + I C9} = I 30 + I 7/2 ··· (10) above (9), (10) than the large amplitude step signal input time of the phase compensation capacitor 32, The following formula (1
It becomes 1). _{I 32 = I C21 + I C8} = I C22 + I C9 = I 30 + I 7/2 ··· (11) Accordingly, the slew rate SR is expressed by the following equation (12). SR = I ₃₀ / C ₃₂ + I ₇ / 2C ₃₂ (12) As can be seen from the above (1) and (12), the slew rate SR of this embodiment is I _It becomes bigger by 7/2.

As described above, in the present embodiment, since the characteristics when a small signal is input do not change, a high slew rate can be easily realized. Further, by changing the current value I ₇ of the constant current source 7, it is possible to set the slew rate arbitrarily.

[0020]

As described above on the basis of the embodiments,
According to the present invention, an operational amplifier having a high slew rate can be easily realized without impairing the characteristics when a small signal is input. Furthermore, the slew rate can be set arbitrarily by changing the value of the constant current source included in the current switch circuit unit.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of a high slew rate operational amplifier according to the present invention.

FIG. 2 is a circuit configuration diagram showing a configuration example of a conventional operational amplifier.

FIG. 3 is a diagram for explaining a slew rate in an operational amplifier and a diagram showing a transient response waveform when a large amplitude step signal is input.

[Explanation of symbols]

1 constant current source 2,3 PNP transistor which constitutes differential input stage 4,5 load resistance 6 level shift resistor 7 constant current source 8,9,10 PNP transistor 21,22,23 which constitutes differential switch circuit 24 PNPs and NPs that make up the differential input stage
N-transistors 25, 26, 27 NPN transistors 28, 29 constituting the second stage NPN and PNP transistors 30, 31 constituting the output stage Constant current source 32 Phase compensation capacitor

Claims (1)

[Claims] 1. An emitter is connected in common to a power source via a first constant current source, and each base is connected to a first and second base, respectively.
The first and second transistors connected to the signal input terminals of the first and second transistors, the first and second resistors having one ends connected to the collectors of the first and second transistors and the other ends commonly connected, One end is connected to the common connection point of the first and second resistors, the other end is grounded, and the third resistor is connected in common to the power source through the second constant current source, and each base is connected. The collector of the first transistor and the second transistor, respectively.
And a third, fourth and fifth transistor connected to the common connection point of the first and second resistors, and the collectors of the third, fourth and fifth transistors are Connected to the power source via the third constant current source with the emitter common to the current switch circuit section, which is the first, second and third current terminals, respectively, and the bases are respectively the second and first signals. Sixth and seventh transistors forming a differential input stage connected to the input terminals, an eighth transistor having a collector and a base connected to the collector of the sixth transistor, an emitter grounded, and a collector The seventh transistor has a collector connected to the base of the eighth transistor and a base connected to the base of the eighth transistor, and an emitter grounded to a ninth transistor and a base connected to the ninth transistor. A transistor connected to the rectifier and having its emitter grounded;
A load and output circuit connected to the collector of the transistor, and an operational amplifier circuit unit composed of a phase compensating capacitor connected between the collector and the base of the tenth transistor. A first current terminal is connected to the collector of the eighth transistor, the second current terminal is connected to the collector of the ninth transistor, and the third current terminal is connected to the ground potential. amplifier.