JPH03225992A - Surface mount printed circuit board and its manufacture - Google Patents
Surface mount printed circuit board and its manufactureInfo
- Publication number
- JPH03225992A JPH03225992A JP2176590A JP2176590A JPH03225992A JP H03225992 A JPH03225992 A JP H03225992A JP 2176590 A JP2176590 A JP 2176590A JP 2176590 A JP2176590 A JP 2176590A JP H03225992 A JPH03225992 A JP H03225992A
- Authority
- JP
- Japan
- Prior art keywords
- component
- solder resist
- circuit pattern
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 229910000679 solder Inorganic materials 0.000 claims abstract description 54
- 239000004020 conductor Substances 0.000 claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims abstract description 19
- 238000007747 plating Methods 0.000 claims abstract description 13
- 238000005530 etching Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- 239000011248 coating agent Substances 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000005476 soldering Methods 0.000 claims 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 20
- 239000011889 copper foil Substances 0.000 abstract description 12
- 229910052802 copper Inorganic materials 0.000 description 8
- 239000010949 copper Substances 0.000 description 8
- 230000006866 deterioration Effects 0.000 description 3
- 230000035882 stress Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- 229920006015 heat resistant resin Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
【産業上の利用分野1
−
本発明は、面付は部品搭載プリント基板及びその製造方
法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application 1] The present invention relates to a surface-mounted component-mounted printed circuit board and a manufacturing method thereof.
(従来の技術1
従来、例えばチップのごとき電子部品を面付は実装する
場合には、第6図に示すように基板1上の銅箔及びその
上の銅めっき皮膜3を選択エツチングすることにより、
銅箔導体回路2’ 、2’を形成すると共に2′上の銅
めっき皮膜3を面付はパッド4として形成し、このパッ
ド4上に電子部品6を搭載し、はんだ1oで接続するも
のであった。その際、図示のように部品6の実装下にお
ける導体回路8上を絶縁被覆すると共に、部品6を基材
に固定する接着剤の役割を兼ねてソルダーレジスト5を
塗布するが、余剰なソルダーレジスト5を吸収させるた
めに、導体回路8の周辺部に溝を設けている。(Conventional technology 1) Conventionally, when mounting electronic components such as chips, selectively etching the copper foil on the substrate 1 and the copper plating film 3 thereon as shown in FIG. ,
Copper foil conductor circuits 2', 2' are formed, and the copper plating film 3 on 2' is formed as a surface pad 4, an electronic component 6 is mounted on this pad 4, and connected with solder 1o. there were. At that time, as shown in the figure, a solder resist 5 is applied to insulate the conductor circuit 8 under the mounting of the component 6 and also to serve as an adhesive to fix the component 6 to the base material. A groove is provided in the periphery of the conductor circuit 8 in order to absorb the 5.
なお、この種の面付はプリント基板に関するものとして
は、例えば特開平1−69091号公報が挙げられる。Note that this type of imposition related to printed circuit boards is disclosed in, for example, Japanese Unexamined Patent Publication No. 1-69091.
【発明が解決しようとする課題]
4
上記従来の技術は、面付は部品の下部に塗布されるソル
ダーレジスト5の高さについて配慮がされておらず、ソ
ルダーレジストの高さが面付は部品搭載パッド4より高
い場合、面付は部品の底面がソルダーレジスト5に接触
し、部品6の接続部が搭載パッド4から浮く状態となる
ため、面付は部品搭載時の位置決めの不安定性を招き易
いこと、また、接触部のソルダーレジスト5が固化する
ことによる部品6へ及ぼす応力による信頼性の低下、さ
らに搭載部品6の発熱により部品接触部のソルダーレジ
スト5の熱劣化が進行する等の問題があった・
したがって、本発明の目的は、上記問題点を解消するこ
とにあり、その第1の目的は、面付は部品搭載の信頼性
の高いプリント基板を、そして第2の目的は改良された
その製造方法を提供することにある。Problems to be Solved by the Invention] 4. In the above conventional technology, no consideration is given to the height of the solder resist 5 applied to the lower part of the component in the case of imposition, and the height of the solder resist is If the mounting pad is higher than the mounting pad 4, the bottom of the component will come into contact with the solder resist 5, and the connecting part of the component 6 will float above the mounting pad 4, resulting in unstable positioning when mounting the component. In addition, there are problems such as a decrease in reliability due to the stress exerted on the component 6 due to the solidification of the solder resist 5 in the contact area, and further heat deterioration of the solder resist 5 in the component contact area due to heat generated by the mounted component 6. Therefore, the purpose of the present invention is to solve the above-mentioned problems, and the first purpose is to provide a highly reliable printed circuit board on which mounted components can be mounted, and the second purpose is to improve the printed circuit board. The purpose of this invention is to provide a method for manufacturing the same.
【課題を解決するための手段l
上記目的は、面付は部品の底面と部品下に存在するソル
ダーレジスト表面との間の間隙を確保することにより達
成される。[Means for Solving the Problems 1] The above object is achieved by securing a gap between the bottom surface of the component and the surface of the solder resist existing under the component.
以下、具体的に本発明の目的達成手段について詳述する
。上記第1の目的は、
(1)絶縁基板の少なくとも一方の面に形成された導体
回路パターンと、この導体回路パターン上の一部に設け
られた面付はパッドとを有し、この面付はパッドに電子
部品のパッドをはんだ接続形成した面付は部品搭載プリ
ント基板において、前記電子部品の搭載下領域の前記面
付はパッドに隣接して存在する導体回路パターン上に被
覆されたソルダーレジスト面と、このソルダーレジスト
対向面上の前記部品間に間隙を配設して前記部品をはん
だ接続形成して成る面付は部品搭載プリント基板により
、また、
(2)上記面付は部品搭載プリント基板に面付けはんだ
接続された電子部品下において、導体回路パターンを被
覆したソルダーレジスト面と前記部品間に配設された間
隙は、前記電子部品の面付けはんだ接続されるパッド領
域外の部分に凹部を設けて成る上記(1)記載の面付は
部品搭載プリント基板により、さらにまた、
(3)上記凹部の深さを、上記ソルダーレジスト膜の厚
さ相当より深くして、好ましくは、少なくとも15虜深
くして成る上記(2)記載の面付は部品搭載プリント基
板により、そしてまた、(4)絶縁基板の少なくとも一
方の面にソルダーレジストが被覆されて形成された導体
回路パターンと、前記導体回路パターン上の一部にその
主面が露出して形成された面付は部品の接続用パッドと
を有するプリント基板において、前記面付は部品の接続
用パッド表面が前記導体回路パターンを被覆したソルダ
ーレジスト面より高く配設して成る面付は部品搭載用プ
リント基板により、達成される。Hereinafter, the means for achieving the object of the present invention will be specifically explained in detail. The first object is to: (1) have a conductor circuit pattern formed on at least one surface of an insulating substrate and a pad provided on a part of the conductor circuit pattern; In a component-mounted printed circuit board in which a pad of an electronic component is soldered and connected to a pad, the surface-mounted area below the mounting area of the electronic component is a solder resist coated on a conductive circuit pattern existing adjacent to the pad. (2) The above-mentioned imposition is carried out by a component-mounted printed circuit board. Under the electronic component that is surface-mounted solder-connected to the board, the gap provided between the solder resist surface that covers the conductive circuit pattern and the component is located outside the pad area of the electronic component that is surface-mounted solder-connected. The imposition described in (1) above, which is provided with a concave portion, is performed by a component-mounted printed circuit board, and (3) the depth of the concave portion is made deeper than the thickness of the solder resist film, preferably at least 15. The imposition described in (2) above, which is formed by using a component-mounted printed circuit board, and (4) a conductive circuit pattern formed by coating at least one surface of an insulating substrate with a solder resist, and the above-mentioned In a printed circuit board having an imprint formed on a part of a conductive circuit pattern with its principal surface exposed and a pad for connecting a component, the imprint is formed by a surface of the pad for connecting the component covering the conductive circuit pattern. The surface mounting, which is arranged higher than the solder resist surface, is achieved by using a printed circuit board for mounting components.
そして、第2の目的は、
(5)絶縁基板の少なくとも一方の面に面付は部品の接
続用パッドを含む導体回路パターンをエツチングにより
形成した後、前記面付は部品の接続用パッドの主表面を
露出させて選択的に前記導体回路パターンを含む基板上
にソルダーレジストを被覆形成せしめ、次いで前記接続
用パッドの主表面に導体めっきを施す工程を有して成る
面付は部品搭載用プリント基板の製造方法により、また
、(6)絶縁基板の少なくとも一方の面に面付は部品の
接続用パッドを含む導体回路パターンをエツチングによ
り形成した後、前記基板を加熱下で、予め定められた電
子部品の搭載下領域の前記面付は部品の接続用パッドに
隣接して存在する導体回路パターン上を加圧して、この
導体回路パターンの下部を前記基板内に後に被覆される
ソルダーレジスト膜の厚さ相当より深く埋設し、しかる
後前記面付は部品の接続用パッド主表面を除いた領域の
導体回路パターンを含む基板上にソルダーレジストを被
覆形成せしめる工程を有して成る面付は部品搭載用プリ
ント基板の製造方法により、そしてまた好ましくは、
(7)上記絶縁基板を加熱により塑性変形可能な耐熱性
樹脂塑性物で構成して成る上記(6)記載の面付は部品
搭載用プリント基板の製造方法により、達成される。The second purpose is to (5) form a conductive circuit pattern including connection pads for the imprinted components on at least one surface of the insulating substrate by etching; Imposition is a printed circuit board for mounting components, which includes the steps of exposing the surface and selectively coating the board containing the conductor circuit pattern with a solder resist, and then applying conductor plating to the main surfaces of the connection pads. Depending on the manufacturing method of the board, and (6) imposition on at least one surface of the insulating board, after forming a conductor circuit pattern including connection pads for components by etching, the board is heated to form a predetermined pattern. The above-mentioned imposition of the lower area where the electronic component is mounted is performed by applying pressure on the conductor circuit pattern existing adjacent to the connection pad of the component, and applying pressure to the lower part of the conductor circuit pattern in the solder resist film that will be later covered in the board. Implanting is a process of embedding a solder resist deeper than the thickness of the component, and then coating the board with a solder resist in an area other than the main surface of the connection pad of the component, including the conductor circuit pattern. (7) The imposition described in (6) above, in which the insulating substrate is made of a heat-resistant resin plastic that can be plastically deformed by heating, is a printed circuit board for mounting. This is achieved by a method for manufacturing a substrate.
8−
【作 用1
本発明のプリント基板は、面付は部品(チップ)底部が
ソルダーレジストと接触しない構成となっている。それ
によって面付は部品が、基板の面付はパッドによる支持
となるため、従来のソルダーレジスト接触時に発生する
、中央支持による実装時の部品位置信頼性の低下が解消
され、−段と信頼性が向上する。また、部品がソルダー
レジストに接触することによって発生する機械的ストレ
スおよび部品発熱による熱ストレスに対するソルダーレ
ジストの劣化をも防止することができる。8- [Function 1] The printed circuit board of the present invention has a structure in which the bottom of the component (chip) does not come into contact with the solder resist when surface-mounted. As a result, the components are supported by the pads when mounting on a surface, and the pads are used when mounting on the board, which eliminates the deterioration in reliability of component position during mounting due to central support, which occurs when conventional solder resist contacts, and improves reliability by an even higher level. will improve. Further, it is also possible to prevent the solder resist from deteriorating due to mechanical stress caused by the contact of the component with the solder resist and thermal stress due to heat generated by the component.
【実施例]
実施例 1
以下、本発明の一実施例を第1図および第2図により説
明する。[Example] Example 1 An example of the present invention will be described below with reference to FIGS. 1 and 2.
第1図(a)は、本発明により、電子部品を面付は搭載
したプリント基板の実装断面斜視図である。第1図(b
)は第1図(a)におけるA−A′の断面図である。FIG. 1(a) is a perspective cross-sectional view of a printed circuit board on which electronic components are mounted according to the present invention. Figure 1 (b
) is a sectional view taken along line A-A' in FIG. 1(a).
第1図(b)に示すように、本発明による面付は部品搭
載パッド4は、絶縁基板1上に銅箔2によって形成され
た導体回路2′と、その上面に選択的に銅めっきにより
形成された銅めっき被膜3とから形成されており、銅め
っき被膜3の厚みは。As shown in FIG. 1(b), the component mounting pad 4 according to the present invention includes a conductive circuit 2' formed of a copper foil 2 on an insulating substrate 1, and a conductive circuit 2' formed by copper foil 2 on the top surface thereof. The thickness of the copper plating film 3 is as follows.
絶縁基材1上に銅箔2のみで形成された導体回路2″′
の上に予め形成されたソルダーレジスト5より厚く形成
されており、面付は部品搭載パッド4の高さが、ソルダ
ーレジスト5より常に高くなっており、電子部品の実装
に際して、面付はチップ6の下面がソルダーレジスト5
の表面と所定の間隔をおいて接触しない構成となってい
る。なお、この第1図(b)の構成と、従来例の第6図
に示した構成との面付けはんだ接続時における信頼性に
つき比較したところ、面付はパッド4からの面付はチッ
プ6の接続端子の位置ズレ不良率は、本実施例により従
来の約174程度に低減することができた。A conductor circuit 2″′ formed only of copper foil 2 on an insulating base material 1
The height of the component mounting pad 4 is always higher than the solder resist 5 when mounting electronic components. The bottom surface of is solder resist 5
The structure is such that it does not come into contact with the surface of the substrate at a predetermined distance. When comparing the reliability of surface solder connection between the structure shown in FIG. 1(b) and the conventional structure shown in FIG. According to this embodiment, the defective rate due to misalignment of the connecting terminals could be reduced to about 174 compared to the conventional method.
実施例 2
次に、第1図に示した面付は部品搭載パッドを有するプ
リント基板の製造方法について、第2図(a)乃至第2
図(e)に示した工程図により説明する。Example 2 Next, a method for manufacturing a printed circuit board having a component mounting pad for imposition shown in FIG. 1 will be described in FIGS.
This will be explained with reference to the process diagram shown in Figure (e).
第2図(a)に示すように、ガラス・エポキシ積層板の
ごとき絶縁基材1の両面に銅箔2を積層し、所定位置に
スルホール9をドリル又はパンチングにより形成したの
ち、P d / S nコロイド溶液に浸漬して化学銅
めっき触媒層(図示せず)を形成する。As shown in FIG. 2(a), copper foils 2 are laminated on both sides of an insulating base material 1 such as a glass-epoxy laminate, and through holes 9 are formed at predetermined positions by drilling or punching, and then P d / S is formed. n to form a chemical copper plating catalyst layer (not shown).
ついで第2図(b)に示すように、所定位置に銅箔2に
よる導体回路2′および2#を形成するため、印刷法ま
たは露光法により所定形状のエツチングレジストパター
ン7を形成する。Next, as shown in FIG. 2(b), in order to form conductive circuits 2' and 2# of copper foil 2 at predetermined positions, an etching resist pattern 7 of a predetermined shape is formed by a printing method or an exposure method.
ついで第2図(c)に示すように、導体回路2′、2″
以外の銅箔2をエツチングにより溶解除去したのち、エ
ツチングレジスト7を剥離する。Then, as shown in FIG. 2(c), conductor circuits 2', 2''
After removing the remaining copper foil 2 by etching, the etching resist 7 is peeled off.
ついで第2図(d)に示すように、面付は部品搭載パッ
ド形成部及びスルーホールランドを形成する導体回路2
′を除き、少なくとも面付は部品下となる領域の導体回
路2′上を含む必要な部位に周知の耐めっき性ソルダー
レジストを印刷法ま11−
たは露光法により形成する。Next, as shown in FIG. 2(d), the surface mounting is performed by attaching a conductive circuit 2 that forms a component mounting pad forming part and a through hole land.
Except for 11', at least for imposition, a well-known plating-resistant solder resist is formed on necessary parts including the area under the component on the conductor circuit 2' by a printing method or an exposure method.
ついで第2図(e)に示すように露光している導体回路
2′上およびスルホール9内に化学銅めっき3を析出さ
せ、面付は部品搭載パッド4を形成する。このときの銅
めっき3の厚みは導体回路2′上のソルダーレジスト5
の厚み以上とする。Next, as shown in FIG. 2(e), chemical copper plating 3 is deposited on the exposed conductive circuit 2' and in the through holes 9, and component mounting pads 4 are formed on the surface. The thickness of the copper plating 3 at this time is the thickness of the solder resist 5 on the conductor circuit 2'.
The thickness shall be greater than or equal to .
このようにして形成された面付は部品搭載パッド4は、
面付は部品下となる領域の導体回路2#上に形成された
ソルダーレジスト5の上面より高くなるため、第1図に
示したように面付はチップ6が、面付はパッド4に支持
され、ソルダーレジスト5と接触しない。また、本実施
例においては、スルホールのめっき工程と同一工程によ
り面付は部品搭載パッド4の高さが確保できるため、こ
のためにプロセスを特別に増加させる必要がない。The surface-mounted component mounting pad 4 formed in this way is
Since the surface mounting is higher than the top surface of the solder resist 5 formed on the conductor circuit 2# in the area under the component, as shown in FIG. and does not come into contact with the solder resist 5. Further, in this embodiment, since the height of the component mounting pad 4 can be secured in the same process as the through-hole plating process, there is no need to increase the number of processes for this purpose.
実施例 3
本発明の他の実施例を第3図および第4図により説明す
る。Example 3 Another example of the present invention will be described with reference to FIGS. 3 and 4.
第3図の断面図に示すように、面付は部品搭載パッド4
の間に形成された導体回路8は、M縁基12−
材1内に埋め込まれており、その埋め込み量が導体回路
8上のソルダーレジスト5の厚さ以上となっており、面
付はチップ6の下面がソルダーレジスト5の表面と接触
しない構成となっているものである。As shown in the cross-sectional view of Fig. 3, for surface mounting, the component mounting pad 4
The conductor circuit 8 formed between the M edge base 12 and the material 1 is embedded, and the amount of embedding is greater than the thickness of the solder resist 5 on the conductor circuit 8. The lower surface of the solder resist 6 does not come into contact with the surface of the solder resist 5.
この第3図に示した面付は部品搭載パッド4を有するプ
リント基板の製造方法について、第4図(a)乃至第4
図(c)の製作工程図により説明する。The imposition shown in FIG. 3 is similar to that shown in FIGS.
This will be explained using the manufacturing process diagram shown in Figure (c).
第4図(a)に示すように、従来のサブトラクト法に従
がい、面付はパッド4および、その間の導体回路8を形
成する。これらは、銅箔導体回路2’ 、2’および銅
めっき被膜3より形成されており、同一の高さである。As shown in FIG. 4(a), according to the conventional subtracting method, the pads 4 and the conductive circuits 8 between them are formed. These are formed of copper foil conductor circuits 2', 2' and copper plating film 3, and have the same height.
ついで、第4図(b)に示すように、絶縁基材1のガラ
ス転移点(90℃〜100℃)以上に昇温し、40’q
/+nm”〜10 Qkg/+om2で加圧して、面付
は部品下となる領域の導体回路8を絶縁基材1内に、こ
のあとの工程で形成される予め定められたソルダーレジ
スト5の厚さ以上の深さに埋め込む。Next, as shown in FIG. 4(b), the temperature was raised to the glass transition point (90°C to 100°C) of the insulating base material 1 or higher, and the temperature was increased to 40'q.
/+nm" ~ 10 Qkg/+om2, and the conductor circuit 8 in the area under the component is placed inside the insulating base material 1 with a predetermined thickness of the solder resist 5 that will be formed in the subsequent process. Embed to a depth greater than .
ついで第4図(c)に示すように、ソルダーレジスト5
を印刷法または露光法により形成することにより、面付
はパッド4が、ソルダーレジスト5の上面より高い基板
を得ることができる。Next, as shown in FIG. 4(c), a solder resist 5 is applied.
By forming by a printing method or an exposure method, it is possible to obtain a substrate in which the surface of the pad 4 is higher than the upper surface of the solder resist 5.
実施例 4
本発明の他の実施例として、第5図に示すように、搭載
される面付はチップ部品6の搭載パッドに接触しない部
分の底面6′に、ソルダーレジスト5の厚さ以上の、例
えば15庫の凹部を設けることにより、従来のサブトラ
クト法により形成された基板においてもソルダーレジス
ト5の表面と面付は部品6の下面とが接触しない基板を
得ることができる。Embodiment 4 As another embodiment of the present invention, as shown in FIG. By providing, for example, 15 recesses, it is possible to obtain a board in which the surface of the solder resist 5 does not come into contact with the bottom surface of the component 6 even in a board formed by the conventional subtract method.
以上、詳述したように本発明によれば、面付はチップ部
品がソルダーレジストに接触しないため、面付は実装時
の位置決め信頼性の向上および応力等による部品および
ソルダーレジストの劣化を防止できるので、実装信頼性
の高い面付は部品搭載プリント基板を得ることができる
。As detailed above, according to the present invention, with surface mounting, the chip components do not come into contact with the solder resist, so surface mounting can improve positioning reliability during mounting and prevent deterioration of the components and solder resist due to stress, etc. Therefore, it is possible to obtain a component-mounted printed circuit board by imposition with high mounting reliability.
第1図(a)は本発明の一実施例となる面付は部品搭載
プリント基板の断面斜視図および第1図(b)はそのA
−A’断面図、第2図は第1図の基板の製造工程を示す
断面図、第3図は本発明の他の実施例の断面図、第4図
は第3図の基板の製造工程を示す断面図、第5図は本発
明のさらに異なる他の実施例の断面図、そして第6図は
従来の基板の断面図である。
〈符号の説明〉
1・・・絶縁基材 2・・・銅箔3・・・銅め
っき皮膜
4・・・面付は部品搭載パッド
5・・・ソルダーレジスト 6・・・面付はチップ部品
7・・・エツチングレジストパターン
8・・・導体回路FIG. 1(a) is a cross-sectional perspective view of a printed circuit board with mounted components, which is an embodiment of the present invention, and FIG. 1(b) is its A.
-A' sectional view, FIG. 2 is a sectional view showing the manufacturing process of the substrate in FIG. 1, FIG. 3 is a sectional view of another embodiment of the present invention, and FIG. 4 is the manufacturing process of the substrate in FIG. 3. FIG. 5 is a cross-sectional view of still another embodiment of the present invention, and FIG. 6 is a cross-sectional view of a conventional substrate. <Explanation of symbols> 1... Insulating base material 2... Copper foil 3... Copper plating film 4... Component mounting pad for surface mounting 5... Solder resist 6... Chip component for surface mounting 7... Etching resist pattern 8... Conductor circuit
Claims (7)
路パターンと、この導体回路パターン上の一部に設けら
れた面付けパッドとを有し、この面付けパッドに電子部
品のパッドをはんだ接続形成した面付け部品搭載プリン
ト基板において、前記電子部品の搭載下領域の前記面付
けパッドに隣接して存在する導体回路パターン上に被覆
されたソルダーレジスト面と、このソルダーレジスト対
向面上の前記部品間に間隙を配設して前記部品をはんだ
接続形成して成る面付け部品搭載プリント基板。1. It has a conductor circuit pattern formed on at least one surface of an insulating substrate, and an imposition pad provided on a part of this conductor circuit pattern, and a pad of an electronic component is connected to the imposition pad by soldering. In the printed circuit board with surface-mounted components, there is a space between a solder resist surface coated on a conductive circuit pattern existing adjacent to the surface-mounted pad in the region below the mounting of the electronic component and the component on the surface facing the solder resist. A printed circuit board on which surface-mounted components are mounted, which is formed by providing a gap and connecting the components by soldering.
続された電子部品下において、導体回路パターンを被覆
したソルダーレジスト面と前記部品間に配設された間隙
は、前記電子部品の面付けはんだ接続されるパッド領域
外の部分に凹部を設けて成る請求項1記載の面付け部品
搭載プリント基板。2. Under the electronic component connected to the surface-mounted printed circuit board on which the surface-mounted component is mounted, the gap provided between the solder resist surface covered with the conductor circuit pattern and the component is connected to the surface-mounted solder of the electronic component. 2. The surface-mounted component-mounted printed circuit board according to claim 1, wherein a recess is provided in a portion outside the pad area.
相当より深くして成る請求項2記載の面付け部品搭載プ
リント基板。3. 3. The surface-mounted component-mounted printed circuit board according to claim 2, wherein the depth of the recess is greater than the thickness of the solder resist film.
が被覆されて形成された導体回路パターンと、前記導体
回路パターン上の一部にその主面が露出して形成された
面付け部品の接続用パッドとを有するプリント基板にお
いて、前記面付け部品の接続用パッド表面が前記導体回
路パターンを被覆したソルダーレジスト面より高く配設
して成る面付け部品搭載用プリント基板。4. A conductor circuit pattern formed by coating at least one surface of an insulating substrate with a solder resist, and a connection pad for a surface-mounted component formed with its main surface exposed on a part of the conductor circuit pattern. 1. A printed circuit board for mounting surface-mounted components, wherein a surface of a connection pad of the surface-mounted component is disposed higher than a surface of a solder resist covering the conductive circuit pattern.
用パッドを含む導体回路パターンをエッチングにより形
成した後、前記面付け部品の接続用パッドの主表面を露
出させて選択的に前記導体回路パターンを含む基板上に
ソルダーレジストを被覆形成せしめ、次いで前記接続用
パッドの主表面に導体めっきを施す工程を有して成る面
付け部品搭載用プリント基板の製造方法。5. After forming a conductive circuit pattern including connection pads of surface-mounted components on at least one surface of the insulating substrate by etching, the main surface of the connection pads of the surface-mounted components is exposed and the conductor circuit pattern is selectively formed. 1. A method for manufacturing a printed circuit board for mounting surface-mounted components, comprising the steps of: forming a solder resist on a substrate containing the solder resist, and then applying conductor plating to the main surface of the connection pad.
用パッドを含む導体回路パターンをエッチングにより形
成した後、前記基板を加熱下で、予め定められた電子部
品の搭載下領域の前記面付け部品の接続用パッドに隣接
して存在する導体回路パターン上を加圧して、この導体
回路パターンの下部を前記基板内に後に被覆されるソル
ダーレジスト膜の厚さ相当より深く埋設し、しかる後前
記面付け部品の接続用パッド主表面を除いた領域の導体
回路パターンを含む基板上にソルダーレジストを被覆形
成せしめる工程を有して成る面付け部品搭載用プリント
基板の製造方法。6. After forming a conductor circuit pattern including connection pads for surface-mounted components on at least one surface of an insulating substrate by etching, the substrate is heated to form a pattern of the surface-mounted components in a predetermined area under mounting electronic components. Pressure is applied to the conductor circuit pattern existing adjacent to the connection pad to bury the lower part of the conductor circuit pattern deeper into the substrate than the thickness of the solder resist film that will be coated later, and then the surface mounting. A method of manufacturing a printed circuit board for mounting surface-mounted components, comprising the step of coating a solder resist on a substrate including a conductor circuit pattern in an area other than the main surface of a connection pad of a component.
脂塑性物で構成して成る請求項6記載の面付け部品搭載
用プリント基板の製造方法。7. 7. The method of manufacturing a printed circuit board for mounting surface-mounted components according to claim 6, wherein the insulating substrate is made of a heat-resistant plastic material that can be plastically deformed by heating.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2176590A JPH03225992A (en) | 1990-01-31 | 1990-01-31 | Surface mount printed circuit board and its manufacture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2176590A JPH03225992A (en) | 1990-01-31 | 1990-01-31 | Surface mount printed circuit board and its manufacture |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03225992A true JPH03225992A (en) | 1991-10-04 |
Family
ID=12064166
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2176590A Pending JPH03225992A (en) | 1990-01-31 | 1990-01-31 | Surface mount printed circuit board and its manufacture |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03225992A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013069425A (en) * | 2011-09-20 | 2013-04-18 | Nec Corp | Wiring component, circuit board, wiring body unit and electric module |
-
1990
- 1990-01-31 JP JP2176590A patent/JPH03225992A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013069425A (en) * | 2011-09-20 | 2013-04-18 | Nec Corp | Wiring component, circuit board, wiring body unit and electric module |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2842378B2 (en) | High-density mounting structure for electronic circuit boards | |
JP3289858B2 (en) | Method of manufacturing multi-chip module and method of mounting on printed wiring board | |
JP2003188509A (en) | Printed circuit board | |
JPS63114299A (en) | Printed wiring board | |
JPH03225992A (en) | Surface mount printed circuit board and its manufacture | |
US5024734A (en) | Solder pad/circuit trace interface and a method for generating the same | |
JP2700259B2 (en) | Method of forming solder layer having recess in printed wiring board | |
JPH1079568A (en) | Manufacturing method of printed circuit board | |
JPH01145891A (en) | Manufacture of circuit substrate with solder bump | |
JPH08228066A (en) | Electronic-part loading substrate and manufacture thereof | |
JP2005268416A (en) | Printed wiring board and producing method thereof | |
KR101609268B1 (en) | Embedded board and method of manufacturing the same | |
JPH04263493A (en) | Manufacture of printed wiring board | |
JPH1051094A (en) | Printed wiring board, and its manufacture | |
JPH06334067A (en) | Multilayer printed wiring board and production thereof | |
JPH0722735A (en) | Printed wiring board | |
JPH08167676A (en) | Semiconductor device | |
JP3777687B2 (en) | Chip carrier | |
JP3855303B2 (en) | Method for manufacturing printed wiring board | |
JPH0590764A (en) | Manufacture of electronic component mounting board | |
JPH04186731A (en) | Circuit board with terminal for mounting circuit parts and manufacture thereof | |
JP2002026519A (en) | Printed-circuit board and its manufacturing method | |
KR20010019763A (en) | Printed circuit board | |
JPH03255691A (en) | Printed wiring board | |
JP3323114B2 (en) | Surface mount pad with adhesion enhancing hole |