JPH03220760A - Resin sealing type semiconductor device - Google Patents
Resin sealing type semiconductor deviceInfo
- Publication number
- JPH03220760A JPH03220760A JP1554590A JP1554590A JPH03220760A JP H03220760 A JPH03220760 A JP H03220760A JP 1554590 A JP1554590 A JP 1554590A JP 1554590 A JP1554590 A JP 1554590A JP H03220760 A JPH03220760 A JP H03220760A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- resin
- die pad
- semiconductor device
- frame die
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 239000011347 resin Substances 0.000 title abstract description 18
- 229920005989 resin Polymers 0.000 title abstract description 18
- 238000007789 sealing Methods 0.000 title abstract description 4
- 229910000679 solder Inorganic materials 0.000 abstract description 9
- 230000002093 peripheral effect Effects 0.000 abstract 3
- 230000000694 effects Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 1
- 230000008016 vaporization Effects 0.000 description 1
- 238000009834 vaporization Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】 産業上の利用分野 本発明は、樹脂封止型半導体装置に関するものである。[Detailed description of the invention] Industrial applications The present invention relates to a resin-sealed semiconductor device.
従来の技術
従来より、樹脂封止型半導体装置を半田リフローする際
、リードフレームダイパッド裏面に存在する水分の気化
膨脹によりリードフレームダイパッド裏面外周部から発
生ずる樹脂クラックを防止するため、樹脂特性の検討お
よび樹脂とり一トフレームダイパッドとの密着性を向上
させるためノートフレームダイパッド裏面に凹凸を設け
るなどの検討がなされているが、リードフレームダイパ
ッド裏面外周部はリードフレームが成形された時のまま
であり、その断面は直角もしくは鋭利な形状どなってい
る。Conventional technology When performing solder reflow on resin-sealed semiconductor devices, studies have been conducted on resin properties in order to prevent resin cracks from occurring from the outer periphery of the back surface of the lead frame die pad due to vaporization and expansion of moisture present on the back surface of the lead frame die pad. In order to improve the adhesion between the resin tray and the frame die pad, studies have been conducted such as providing unevenness on the back side of the notebook frame die pad, but the outer periphery of the back side of the lead frame die pad remains as it was when the lead frame was molded. , its cross section is a right angle or a sharp shape.
発明が解決しようとする課題
しかしながら、上記従来のような構成では、リードフレ
ームダイパッド裏面外周部が直角もしくは鋭利な形状と
なっているため、この部分で応力集中が起こり樹脂クラ
ックが容易に発生ずるという課題を有していた。Problems to be Solved by the Invention However, in the above-mentioned conventional configuration, since the outer periphery of the back surface of the lead frame die pad has a right-angled or sharp shape, stress concentration occurs in this part and resin cracks easily occur. I had an issue.
本発明は、上記従来の課題を解決するもので、半田リフ
ロー時にリードフレームダイパッド裏面外周部からの樹
脂クラックが発生しにくい、半田耐熱性を向上させた樹
脂封止型半導体装置を提供することを目的とする。The present invention solves the above-mentioned conventional problems, and aims to provide a resin-sealed semiconductor device with improved solder heat resistance, in which resin cracks are less likely to occur from the outer periphery of the back surface of a lead frame die pad during solder reflow. purpose.
課題を解決するための手段
この課題を解決するために本発明の樹脂封止型半導体装
置は、リードフレームダイパッド裏面外周部を滑らかに
テーパ加工したリードフレームダイパッドを使用してい
る。Means for Solving the Problem In order to solve this problem, the resin-sealed semiconductor device of the present invention uses a lead frame die pad in which the outer periphery of the back surface of the lead frame die pad is smoothly tapered.
作用
この構成によって、樹脂クラックの起点となるリードフ
レームダイパッド裏面外周部での応力集中を防止し、結
果として樹脂クラックを発生しにくくさせ、樹脂封止型
半導体装置の半田耐熱性を向上させることができること
となる。Effect: This configuration prevents stress concentration at the outer periphery of the back surface of the lead frame die pad, which is the starting point for resin cracks, making it difficult for resin cracks to occur and improving the solder heat resistance of resin-sealed semiconductor devices. It becomes possible.
実施例
以下本発明の一実施例について図面を参考にしながら説
明する。EXAMPLE An example of the present invention will be described below with reference to the drawings.
第1図は、本発明の一実施例における樹脂封止型半導体
装置の断面図を示すもので、1はリードフレームダイパ
ッド2に固着された半導体チップ3と、リードフレーム
インナーリード4を電気的に接続する結線ワイヤ、5は
リードフレームダイパッド裏面外周部で、全体を樹脂6
で封止している。第2図は、第1図のリードフレームダ
イパッド部の拡大図である。第3図は従来のリードフレ
ームダイパッド部の拡大図である。なお、第2図および
第3図の各部分の符号は第1図と同様である。FIG. 1 shows a cross-sectional view of a resin-sealed semiconductor device according to an embodiment of the present invention, in which 1 shows a semiconductor chip 3 fixed to a lead frame die pad 2 and a lead frame inner lead 4 electrically connected to each other. The connecting wire 5 is the outer periphery of the back side of the lead frame die pad, and the whole is covered with resin 6.
It is sealed with. FIG. 2 is an enlarged view of the lead frame die pad portion of FIG. 1. FIG. 3 is an enlarged view of a conventional lead frame die pad section. Note that the reference numerals of each part in FIGS. 2 and 3 are the same as in FIG. 1.
以上のように構成された本実施例の樹脂封止型半導体装
置について、以下その動作を説明する。The operation of the resin-sealed semiconductor device of this embodiment configured as described above will be described below.
第工図および第2図のとおり、使用するリードフレーム
ダイパッド裏面外周部が滑らかにテーパ加工されている
ことにより、第3図の直角もしくは鋭利な形状では発生
するこの部分での応力集中が発生しないため、樹脂クラ
ックが発生しにくい状態となり樹脂封止型半導体装置の
半田耐熱性を向上させることができる。As shown in Fig. 2 and Fig. 2, the outer periphery of the back surface of the lead frame die pad used is smoothly tapered, so that the stress concentration at this part that occurs with the right-angled or sharp shape shown in Fig. 3 does not occur. Therefore, resin cracks are less likely to occur, and the solder heat resistance of the resin-sealed semiconductor device can be improved.
発明の効果
以上のように本発明によれば、リードフレームダイパッ
ド裏面外周部を滑らかにテーパ加工したリードフレーム
ダイパッドを使用することにより、半田リフロー時に樹
脂クラックが発生しにくい、半田耐熱性が向上した樹脂
封止型半導体装置を実現できるという効果が得られる。Effects of the Invention As described above, according to the present invention, by using a lead frame die pad in which the outer periphery of the back surface of the lead frame die pad is smoothly tapered, resin cracks are less likely to occur during solder reflow, and solder heat resistance is improved. The effect of realizing a resin-sealed semiconductor device is obtained.
第1図は本発明の一実施例における樹脂封止型半導体装
置の断面図、第2図は本発明の樹脂封止型半導体装置で
使用されるリードフレームのダイパッド部の拡大−m1
図、第3図は従来の樹脂封止2・・・・・・リードフレ
ームダイパッド、5・・・・・・リードフレームダイパ
ッド裏面外周部。FIG. 1 is a cross-sectional view of a resin-sealed semiconductor device according to an embodiment of the present invention, and FIG. 2 is an enlarged view of the die pad portion of a lead frame used in the resin-sealed semiconductor device of the present invention - m1
Figures 3 and 3 show conventional resin sealing 2... lead frame die pad, 5... lead frame die pad back surface outer periphery.
Claims (1)
加工したリードフレームを使用した樹脂封止型半導体装
置。A resin-sealed semiconductor device that uses a lead frame with a smoothly tapered outer periphery of the back surface of the lead frame die pad.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1554590A JPH03220760A (en) | 1990-01-25 | 1990-01-25 | Resin sealing type semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1554590A JPH03220760A (en) | 1990-01-25 | 1990-01-25 | Resin sealing type semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03220760A true JPH03220760A (en) | 1991-09-27 |
Family
ID=11891759
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1554590A Pending JPH03220760A (en) | 1990-01-25 | 1990-01-25 | Resin sealing type semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03220760A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7755192B2 (en) | 2008-03-25 | 2010-07-13 | Tohoku University | Copper interconnection structure, barrier layer including carbon and hydrogen |
-
1990
- 1990-01-25 JP JP1554590A patent/JPH03220760A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7755192B2 (en) | 2008-03-25 | 2010-07-13 | Tohoku University | Copper interconnection structure, barrier layer including carbon and hydrogen |
US8163649B2 (en) | 2008-03-25 | 2012-04-24 | Advanced Interconnect Materials, Llc | Copper interconnection structure, semiconductor device, and method for forming copper interconnection structure |
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