JPH03215764A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To test an A/D and a D/A converter at the same time by applying data generated by a digital data generator to the input of the D/A converter and the output of the D/A converter to the input of the A/D converter, and comparing the output of the A/D converter with the input of the D/A converter by a comparator. CONSTITUTION:The parallel data consisting of specific (n) bits generated by the digital data generator 21 is applied to the comparator 22 and D/A converter 18 through a switch 20 and a digital data bus 17. The analog signal obtained by the converter 18 is applied to the A/D converter 12 through a switch 23. The (n)-bit parallel digital data obtained by the converter 12 is applied to the other input of the comparator 22. The comparator 22 compares the data generated by the generator 21 with the data outputted by the converter 12 and the comparison output is outputted from an output terminal 19 through the switch 23. Thus, linearity as basic characteristics of the converters 12 and 18 can be tested.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a digital semiconductor integrated circuit incorporating an A/D converter and a D/A converter, and particularly to a test circuit thereof.

BACKGROUND OF THE INVENTION Generally, testing of A/D converters and D/A converters requires test equipment for mixed analog and digital integrated circuits. Furthermore, as shown in FIG. 3, in a semiconductor integrated circuit in which an A/D converter 2, a D/A converter 8, a digital circuit 5 with a certain function, etc. are built into one chip, A test circuit, a test A/D converter output terminal 4, and a test D/A converter input terminal 6 are required to test the D converter 2 and the D/A converter 8 individually. In addition, in FIG. 3, 1 and 9 are analog input terminals and analog output terminals.

Problems to be Solved by the Invention The aforementioned test equipment for analog/digital mixed integrated circuits is extremely expensive equipment. Further, the number of test terminals 4 and 6 is required to correspond to the number of bits of digital data to be handled. It is conceivable to share this with other existing terminals, or to handle digital data by converting it from parallel to serial, but both require related test circuits. Solving these issues will all lead to increased costs for semiconductor integrated circuits.

The present invention provides a semiconductor integrated circuit that solves these problems.

Means for Solving the Problems In order to achieve this object, the present invention incorporates a digital data generator, a comparator, and a switch as a test circuit in one chip, in addition to the circuits necessary for the original function. A
Add the output of the converter to the input of the A/D converter, and
By comparing the input of the A converter and the output of the A/D converter, a test close to the actual operation of the A/D converter and D/A converter is performed.

Function: With this configuration, the A/
It becomes possible to simultaneously test D converters and D/A converters at low cost.

Example Hereinafter, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a semiconductor integrated circuit in one embodiment of the present invention.

In FIG. 1, an A/D converter 12, a digital circuit 15 having a certain function. It is assumed that the D/A converter 18 is completely the same as the conventional example shown in FIG. 3, and these 12, 15, 18 and digital data bus 13, 17 all handle n-bit parallel digital data. 21 is n for testing the A/D converter 12 and the D/A converter 18;
bit parallel digital data generation circuit; 22 is a comparator that receives the input of the D/A converter 12 and the output digital data of the A/D converter 18; 23 is the input of the A/D converter 12 and the D/A an analog switch 20 for switching the output analog signal of the converter 18 between standard time a and test time b;
D/A converts digital data from the digital circuit 15 during standard time and from the digital data generator 21 during test.
This is a switching circuit for adding to the input of the converter 18. In FIG. 1, 11 is an analog input terminal, and 19 is an analog output terminal and a test result output terminal.

The operation during testing will be explained below. Predetermined n-bit parallel digital data generated by the digital data generator 21 is applied to the comparator 22 and the D/A converter 18 via the switching circuit 21 and the digital data bus 17.
/A converter 18 converts the analog signal to switch 2
3 to the A/D converter 12. A/D converter 1
The n-bit parallel digital data converted in step 2 is applied to the other input of the comparator 22. A comparator 22 detects the difference between the data generated by the digital data generator 21 and the data output from the A/D converter 12, and its output is taken out from the output terminal 19 via the switch 23.

As is clear from the above description, if the linearity of the D/A converter 18 and A/D converter 12 is good, both inputs of the comparator 22 will match. Conversely, D/A converter 18 and A/D converter 1
If the linearity of one or both of the two inputs is poor, a difference will occur between the two inputs of the comparator 22. In other words, this is A
The linearity, which is a basic characteristic of the /D converter 12 and the D/A converter 18, can be tested.

Furthermore, by increasing the repetition rate of the digital data generated by the digital data generator 21, it is possible to test the operating speed of both converters.

On the other hand, if you want to loosen the linearity accuracy of both converters, use comparator 22.
This can be handled by increasing the offset.

If the voltage drop at switch 23 in Figure 1 becomes a problem when testing high-bit A/D converters and D/A converters, change the output of D/A converter 38 as shown in Figure 2. This can be solved by taking out the signal directly to the output terminal 39 and connecting it to the input terminal 31 of the A/D converter 32 outside the semiconductor integrated circuit. In addition, in Figure 2, 3
3.37 is a digital data bus, 35 is a digital circuit,
40 is a D/A converter input switching circuit, 41 is a digital data generation circuit, 42 is a comparator, and 44 is a comparison output terminal.

Effects of the Invention According to the present invention, an A/D converter and a D /A converter can be tested.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a block diagram of a second embodiment of the present invention, and FIG. 3 is a block diagram of a conventional A
1 is a block diagram of a digital semiconductor integrated circuit incorporating a D/D converter and a D/A converter; FIG. 1...Analog input terminal, 3,7...
n-bit parallel digital data bus, 9...analog output terminal, 11...analog input terminal,
33.37...n-bit parallel digital data bus, 35...digital circuit with a certain function,
40...D/A converter input switching circuit, 41...
...Digital data generation circuit, 42...Comparator.

Claims (1)

[Claims] A circuit with a digital operation function, an A/D converter, and a D
In addition to the D/A converter, a digital data generator, a comparator, and a switch are built into one chip as a test circuit, and the data generated by the digital data generator is applied to the input of the D/A converter. /A converter output to the A/D
In addition to the input of the converter, the output of the A/D converter and the D
By comparing the input of the /A converter with the comparator,
A semiconductor integrated circuit characterized in that the A/D converter and the D/A converter are tested.