JPH0320827A - Microprogram control system - Google Patents

Abstract

PURPOSE:To easily perform the generation and change of a program at an assembling level by switching the level of plural universal registers having multiple stages of level to the level higher by one step or to the one lower by one step with a prescribed microinstruction. CONSTITUTION:When one microinstruction to call a subroutine from a main routine is executed, a return address is stored in a stack area, and control is continued from a designated address by switching the levels of the plural universal registers 1 having the multiple stages of level to the one higher by one step. Meanwhile, when one microinstruction to return from the subroutine to the main routine is executed, the levels of the universal registers 1 having the multiple stages of level is switched to the one lower by one step, and the return address stored in the stack area is hopped up, then, the control is continued from the return address.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprogram control system for a microprocessor that performs vertical microglodal control. [Prior Art] Conventionally, in a microgrossing processor that performs vertical microprogram control, the only general-purpose register is a one-level register whose main purpose is to store a return address in response to a pla/chi instruction. It has 1f&. [Problem to be Solved by the Invention] As described above, since the conventional microprocessor described above has only one level of general-purpose registers, when creating a subroutine-format part of an f program, the main I had to pay close attention to the restrictions on the registers used in the routine. 19. When using a created subroutine-style program and creating a structure that calls it at multiple locations in the program's main routine, changing the register used by the subroutine will affect all multiple sections of the main routine. However, it is necessary to check the validity of the f-program, which has the drawback of placing significant restrictions on the creation and modification of f-programs. In addition, in order to avoid destroying the contents of registers used in the main routine, there is a way to store registers in memory that can be read and written individually at the beginning of the subroutine, but in this case, the execution speed may decrease or In addition to physical drawbacks such as an increase in program size, the need to secure memory space, and the need for pointers to indicate storage addresses. The drawback was that each subroutine required individual attention in terms of programming. In addition, in order to theoretically separate the variables in the main routine and subroutines, it is possible to use a high-level language such as PASCAL or Ct rather than assembler language, but this may be difficult due to the program capacity or processing speed. Control devices that require real-time performance, which is disadvantageous in terms of performance, often cannot be described in high-level languages because they require detailed control of the hardware.

The present invention improves these conventional drawbacks, and its purpose is to: The object of the present invention is to provide a microprogram control method that makes it extremely easy to create and change programs at the assembler level, and that can improve program reliability.

[Means to solve the problem]

The microprogram control system of the present invention has a plurality of general-purpose registers having multiple levels, a plurality of general-purpose registers having one level, and a stack area, and a predetermined microinstruction returns an address b to the stack area. means for continuing control from the specified address by switching the level t of the plurality of general-purpose registers having the multi-levels to a higher level by one step; It has means for switching D one step lower to pop up the return address stored in the stack area and continuing control from the return address. [Operation] When one microinstruction calls a subroutine from the main routine, the return b address is stored in the stack area, the levels of multiple general-purpose registers with multiple levels are switched one step higher, and control continues from the specified address. On the other hand, when returning from a subroutine to the main routine with one microinstruction, the level of a general-purpose register with multiple levels is lowered by one level, the return address stored in the stack area is pozzo-added, and control is performed from the return address. Continue. [Embodiment] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. Referring to FIG. 1, the microprocessor of this embodiment includes a plurality of general-purpose registers 1 having multiple levels 'k, a plurality of general-purpose registers 2 having one level, and contents t -1.
A stack pointer 3 having an up/down counter function that can go up or down in either direction of +1'''-1'', an achi emulator 4, a memory register 5 that exchanges data with the memory via the data path 131fc, and an arithmetic logic A controller 7 that generates control signals to each part, an address register 8 that provides address data for the address path 141C, and a function that indicates the instruction execution address and adds the contents by 1+1'' in terms of hardware. Motsu!
It consists of a program counter 9, an instruction register 10 having opcodes and address data, an input/output buffer 11 that exchanges data with an input/output device, and a level switching device '15 that controls the level of the general-purpose register 1. are connected by internal path 12. The operation code of the instruction register 10 is given to the control device 7, and the address data is given to the address register 8 through the internal path 12.

Next, we will explain the microprogram control processing applied to such a configuration. To read an instruction to be applied to a microprocessor, first set the value of the program counter 9 in the address register 8, send address information from the address register 8 to the address/4 channel, and then send the address information from the control unit [7 to the memory]. Send a read signal and set read data in the instruction register 10 via the data path 13. The instruction opcode is sent to the control device 7 and the program counter 9
The contents of the opcode are now returned to the address indicated by stack pointer 3 in memory, and the address is stored, and the level of multiple general-purpose registers 1, which have multiple levels, is raised by one step. If it is an instruction that performs a branch operation, read the instruction as in the previous procedure, and then perform the following processing.In other words, add 1+1'' to the value of stack pointer 3 and store program counter 9 in memory. The stack pointer 3 is transferred to the address register 8. Next, the contents of the memory register 5 are sent to the data node 13,
The contents of the address register 8 are sent to the address path 14, and the control device 7 sends a write signal to the memory. Then, the level switching device [15] switches the general-purpose register 10 level t-1 step higher, sets the address data of the instruction register 10 to the Groderam counter 9, and completes the execution of this instruction. next. The content of the operation code switches the level of multiple general-purpose registers 1 having many levels one step lower, pops up the return address stored at the memory address indicated by stack pointer 3, and performs a branch operation to the return b address. If it is an instruction, the instruction is read out according to the procedure shown above, and then the next process is performed. In other words, the general-purpose register 1 is first read by the level switching device 15.
The level of is switched one step lower and the value of stack pointer 3 is transferred to address register 8. Next, the contents of the address register 8 are sent to the address path 14, a read signal is sent from the control device 7 to the memory (if), and the data from the memory is set in the memory register 5 via the data path 13. The execution of this instruction is then completed by decrementing the value of the stack pointer 3 by "1" and setting the contents of the memory register 5 to the program counter 9 via the internal path 12. In this way, in this embodiment, one microinstruction in a subroutine switches the level of multiple general-purpose registers with multiple levels one step higher, and one microinstruction when returning from the subroutine to the main routine changes the level one step higher. By having a means to switch to a low value, the register can be treated as a local variable within the subroutine, and if a renostar with only one level is treated as an Oshiro variable, the local variable and Oshiro variable can be changed at the assembler level. Clarification becomes possible, and it becomes possible to greatly improve the ease of programming and the reliability of programs. Seal,? Since there is no need to save necessary registers in readable/writable memory when calling the second routine, execution speed can be improved.

〔Effect of the invention〕

As explained above, according to the present invention, a predetermined microinstruction switches the level of a plurality of general-purpose registers having multiple levels one step higher, and a predetermined microinstruction switches the level of a plurality of general-purpose registers having multiple levels by one Since it has a means to switch the level of the general-purpose resistor one step lower, this makes it extremely easy to create and change the bottom of the grodgram at the assembly/pull level, and the reliability of the grodgram can be significantly improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention. In FIG. 1, l...a plurality of general-purpose registers having multiple levels, 2
... Multiple general-purpose registers with one level, 3.
・・Stack point/ta. 4...accumulator, 5.
...Memory register, 6...Arithmetic logic unit, 7.
··Control device. 8...Address register, 9...Program counter/ta. 10...Instruction register%11...
・Person output pad 7a, 12...internal lotus. 13...Data path, 14...Address path. 15...Level cut him.

Claims (1)

[Scope of Claims] A plurality of general-purpose registers having multiple levels, a plurality of general-purpose registers having one level, and a stack area, and a return address is stored in the stack area by a predetermined microinstruction. Means for switching the level of the plurality of general-purpose registers having multiple levels one level higher to continue control from a specified address, and switching the level of the general-purpose register having multiple levels one level lower by a predetermined microinstruction. A microprogram control system comprising means for popping up a return address stored in the stack area and continuing control from the return address.