JPH03180904A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make it unnecessary to prepare a signal generator for generating a timing pulse for driving an individual integrated circuit and signal lines connecting the signal generator to respective integrated circuits by including timers in individual integrated circuits. CONSTITUTION:The semiconductor device is provided with the integrated circuits IC1 to ICn, signal lines R1 to Rn for transmitting operation timing and a clock input CLK for driving the timers. The IC1 is driven by the timing pulse of the line R1 and a pulse delayed from the pulse of the R1 by time T is outputted to the R2 from the timer incorporated to the IC1. On the other hand, the IC2 is driven by the timing pulse of the R2 and outputs a pulse delayed from the timing pulse of the R2 by time T to drive the succeeding integrated circuit. Since the individual integrated circuits IC1 to ICn are provided with the timers, the IC1 to ICn can be driven by the timer output pulses from the preceding integrated circuits. Thereby, it is unnecessary to prepare the signal generator and the signal lines connecting the signal generator to the individual integrated circuits.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor device comprised of a plurality of integrated circuits that operate at the same delay timing.

Conventional technology Traditionally, when multiple integrated circuits are operated at different timings with the same delay, independent signal lines are provided that connect to a signal generator to convey the operating timing to each integrated circuit. Ta.

FIG. 3 is a circuit diagram of a conventional semiconductor device that operates with the same delay timing.
o is an integrated circuit, 1 is a signal generator, RR2,...
・Ro is a signal line for transmitting operation timing.

In this way, a signal generating device for generating timing pulses for operating each integrated circuit, and a signal line connecting the signal generating device to each integrated circuit were provided.

Problems to be Solved by the Invention However, in the conventional configuration described above, signal lines for transmitting operation timing are provided independently for each integrated circuit, and therefore the same number of signal lines as there are integrated circuits are required. Furthermore, a signal generator for generating different timing pulses having the same delay is also required, and the structure of the semiconductor device becomes more complicated as the number of integrated circuits increases.

The present invention solves the above conventional problems, and is a semiconductor device that eliminates the need to provide a signal generator that generates timing pulses for operating individual integrated circuits, and a signal line that connects the signal generator to each integrated circuit. The purpose is to provide

Means for Solving the Problems In order to achieve this object, the semiconductor device of the present invention has a configuration in which each integrated circuit has a built-in timer.

As a result of this measure, the operating timing of the integrated circuit is received from the previous integrated circuit, and the signal generator that generates the timing pulses that operate each integrated circuit and the signal line that connects the signal generator to each integrated circuit are connected. It is possible to eliminate the need to provide one.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 shows a circuit diagram of a semiconductor device in an embodiment of the present invention. In FIG. 1, ICI C2+ =
---I C is an integrated circuit, R, and R2Ro are signal lines for transmitting operation timing, and CLK is a clock input for operating a timer.

The operation of the semiconductor device configured as described above will be described below.

FIG. 2 shows R1 in FIG. R2,...R
, shows the operation timing pulse of .

First, IC+ is operated by the timing pulse of R1, and a timer built in IC1 outputs a pulse delayed by a time T from the pulse of R to R2. IC2 is R2
It operates with the timing pulse of R2, outputs a pulse delayed by a time T from the timing pulse of R2, and operates the next stage integrated circuit.

As described above, according to this embodiment, by providing each integrated circuit with a timer, each integrated circuit can be operated by the timer output pulse of the previous integrated circuit.

Effects of the Invention As described above, according to the present invention, by providing a timer in each integrated circuit, a signal generator that generates a timing pulse for operating each integrated circuit, and a signal generator that generates a timing pulse for operating each integrated circuit can be transmitted from the signal generator to each integrated circuit. It is possible to realize an excellent semiconductor device that eliminates the need for connecting signal lines.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a conductor device of a semiconductor device in an embodiment of the present invention. I C, I C2, I Co-=-・Integrated circuit, R,,
R,! . R1,... Signal line, 1... Signal generator.

Claims (1)

[Claims] A semiconductor device characterized in that a plurality of integrated circuit blocks each having a built-in timer for generating delay timing are integrally integrated into a single semiconductor substrate.