JPH03179762A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve a wiring in coverage between single crystal Si islands by a method wherein insulator or silicon is selectively formed on an isolation insulating film whose oxidation speed is the slowest of those of thermal oxide films formed on a substrate at a thermal treatment, and then a semiconductor element is formed on the single crystal silicon island. CONSTITUTION:A dielectric isolated substrate provided with an N-type single crystal Si island 3 is provided to a groove provided to a polycrystalline Si 1 through the intermediary of an isolating SiO2 film 2, an an SiO2 film 4 is formed on the surface of the substrate concerned so thin as not to induce a steep recessed groove on the isolating SiO2 film. Then, a polycrystalline Si 5 is formed on the surface of the substrate. In succession, the polycrystalline Si 5 is selectively removed by etching so as to make the upside of the isolating SiO2 film 2 protrude, and an Si pattern 6 is formed. Next, to form a semiconductor element on the single crystal Si island 3, the oxide film 4 is made thick by a heat treatment so as to serve as a diffusion preventive thick film in a base diffusion process, a P<+> region 7 is formed as a base region, and an N<+> contact region 8 is formed through an N-type forming process. Then, a wiring material of Al or the like is patterned into a wiring 9.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device using a dielectric isolation substrate.

(Prior Art) Conventionally, such a dielectric isolation substrate has been disclosed in, for example, Japanese Patent Application Laid-Open No. 1986-
A semiconductor device disclosed in Japanese Patent No. 143646 and using such a dielectric isolation substrate is generally formed as follows.

First, an N-type single crystal silicon (hereinafter referred to as St) substrate is prepared, and grooves are formed by photolithography and anisotropic etching to form desired single crystal St islands, and trenches are formed for electrical insulation. Separate oxidation is performed by forming SiO2. Next, after forming a polycrystalline silicon layer to serve as a support region on the front surface, the back surface of the single-crystal St substrate is polished to create a dielectric isolation substrate. Next, when forming a diode as a semiconductor element on this dielectric isolation substrate, firstly, this substrate is subjected to steam oxidation treatment at a temperature of 1060°C for 60 minutes to form an appropriate SiO245 film on the diffusion prevention film outside the pattern.
00A is formed. Next, paste photolithography and paste deposition are performed, and a paste portion is formed through a paste drive-in process using steam oxidation at a temperature of 1120° C. for 30 minutes. At this time, the pace section was 5oool.

Outside the nosetan, the S t O2 thickness is about 7000X.

Next, furnace photolithography, N+ deposition and temperature 950℃
, an N+ drive-in process using steam oxidation for 50 minutes is performed to form an N+ region that forms ohmic contact with the wiring. At this time, the thickness is 4000× on the - region and 5102× 7500× on the outside of the pattern. Thereafter, contact photolithography is performed, At vapor deposition is performed, and Att photolithography and At sintering are performed to form a wiring pattern.

(Problem to be Solved by the Invention) However, according to the method for manufacturing a semiconductor device as described above, in the semiconductor element formation process, for example, the oxidation, base drive-in, and N+ drive-in steps, single crystal St.
Since the thermal oxidation rates of the thermal oxide films formed on the island, on the isolation 5102, and on the polycrystalline St are different, a steep groove is formed with the isolation 8102 part where the thermal oxidation rate is the lowest being concave. However, when forming element wiring between each single-crystal St island, there was a problem in that the wiring was broken at the groove portion. In particular, when the isolation oxide film is thin, the width of the groove formed in the isolation oxide film becomes narrow, resulting in poor resist coverage and a higher rate of interconnect breakage.

An object of the present invention is to provide a manufacturing method that provides good wiring coverage between each single-crystal St island when manufacturing a semiconductor device using a dielectric isolation substrate.

(Means for Solving the Problems) In order to solve the above problems, the present invention prepares a single crystal silicon substrate and forms grooves by selectively etching away the surface of the substrate when manufacturing a semiconductor device. death,
After depositing an insulating film on the surface of this substrate, a polycrystalline silicon layer is laminated on this insulating film, and the back surface of this substrate is polished with a casing that reaches the bottom of the groove to separate the parts by the insulating film. A plurality of single crystal silicon islands are formed, an insulator or silicon is selectively formed on the insulating film exposed by polishing, and then a semiconductor element is formed on the single crystal silicon islands. .

(Function) As described above, according to the method for manufacturing a semiconductor device of the present invention,
After selectively forming an insulator or silicon on the isolation insulating film, which has the slowest oxidation rate of the thermal oxide film formed on the substrate during heat treatment, the semiconductor element is formed on the single crystal silicon island. The thermal oxide film formed along with element formation does not become concave in the isolation oxide film portion, and a flatter oxide film can be formed.

(Example) FIG. 1 (, ) to 0) is a cross-sectional view of the process of a semiconductor device.
Embodiments of the present invention will be described below with reference to the drawings.

1. First, as shown in FIG. 1(a), by a known technique, a dielectric isolation material having an N-type single crystal S1 island 3 is formed inside a groove of a polycrystalline St 1 serving as a support through an isolation 5IO2 film 2. A substrate is prepared, and the 8102 film 4 is formed on the surface of the substrate to be as thin as not to form a steep concave groove on the separation 5t02. Next, as shown in FIG. 1(b), liquid phase growth (L
Polycrystalline Si5 is formed on the surface of the substrate by, for example, PCVD. Next, as shown in FIG. 1(c), the polycrystalline St 5 is selectively etched away so that the top of the isolation 5IO2 film 2 has a convex shape, and a Si/# turn body 6 is formed. Next, in order to form a semiconductor element on the single crystal S1 island 3,
As shown in FIG. 1(d), the oxide film 4 is thickened by heat treatment so as to have the thickness of the diffusion prevention film in the pace diffusion process.
At this time, an oxide film is also formed on the Si layer and the turn body 6. Next, as shown in FIG. 1(,), a P+ region 7 is formed as a υ pace region by a known method such as pace photolithography, deposition, or diffusion, and similarly as shown in FIG. 1(f), , a furnace forming process is performed to form the N+ contact region 8.

Thereafter, by patterning a wiring material such as At to form wiring 9, a semiconductor device having a cross-sectional structure as shown in FIG. 1(g) can be obtained.

As described above, according to the embodiment of the present invention, since the St. The oxidation rate of the dielectric separation substrate WJc can be made uniform, and the top of the separation S t O2 film 2 can be made into a convex shape corresponding to the film thickness of the Si□ turn body 6. The coverage of the wiring 9 formed on the isolated SiO2 film 2 can be controlled, and breakage of the wiring 9 due to poor coverage on the isolated SiO2 film 2 can be prevented.

In the embodiment of the present invention, a polycrystalline 5iz4 tantalum body 6 is formed on the isolated SiO□ film 2, but the same effect can be obtained by forming an insulating film such as an S io 2 film in a convex shape. be able to. Furthermore, by determining the thickness of the diagonal body provided on the isolated SiO2 film according to the thickness of the thermal oxide film formed in the element formation process, it is possible to achieve better planarization of the casing. not.

(Effects of the Invention) As described above in detail, according to the present invention, when manufacturing a semiconductor device using a dielectric isolation substrate, a polycrystalline silicon or insulating pattern body is formed on an isolation insulating film. Therefore, even if a thermal oxide film is formed during semiconductor element formation, the isolation insulating film does not have a flat or convex shape, and the problem of disconnection of wiring extending over the isolation insulating film can be solved.

[Brief explanation of drawings]

FIGS. 1(a) to 10) are process cross-sectional views of a semiconductor device for explaining the present invention in detail. 1... Polycrystalline Si, 2... Separated S z O2 film, 3
...Single crystal St island, 4...S 102 film, 5...
Polycrystalline st, 6...Si nog turn body, 7...P+
Area, 8...N+ contact area, 9... Wiring.

Claims (1)

[Claims] A step of preparing a single-crystal silicon substrate, a step of forming a groove by selectively etching a surface of the substrate, and a step of depositing an insulating film on the surface of the substrate, a step of laminating a polycrystalline silicon layer on the insulating film; a step of polishing the back surface of the substrate to the bottom of the groove to form a plurality of single-crystal silicon islands separated by the insulating film; The method is characterized by comprising the steps of: selectively forming a polycrystalline silicon or insulating pattern on the insulating film exposed by the polishing; and forming a semiconductor element on the single crystal silicon island. A method for manufacturing a semiconductor device.